/*******************************************************************************
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/*******************************************************************************
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*
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*
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* Copyright (c) 1993 Intel Corporation
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* Copyright (c) 1993 Intel Corporation
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*
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*
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* Intel hereby grants you permission to copy, modify, and distribute this
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* Intel hereby grants you permission to copy, modify, and distribute this
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* software and its documentation. Intel grants this permission provided
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* software and its documentation. Intel grants this permission provided
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* that the above copyright notice appears in all copies and that both the
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* that the above copyright notice appears in all copies and that both the
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* copyright notice and this permission notice appear in supporting
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* copyright notice and this permission notice appear in supporting
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* documentation. In addition, Intel grants this permission provided that
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* documentation. In addition, Intel grants this permission provided that
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* you prominently mark as "not part of the original" any modifications
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* you prominently mark as "not part of the original" any modifications
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* made to this software or documentation, and that the name of Intel
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* made to this software or documentation, and that the name of Intel
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* Corporation not be used in advertising or publicity pertaining to
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* Corporation not be used in advertising or publicity pertaining to
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* distribution of the software or the documentation without specific,
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* distribution of the software or the documentation without specific,
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* written prior permission.
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* written prior permission.
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*
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*
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* Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR
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* Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR
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* IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY
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* IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY
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* OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or
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* OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or
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* representations regarding the use of, or the results of the use of,
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* representations regarding the use of, or the results of the use of,
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* the software and documentation in terms of correctness, accuracy,
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* the software and documentation in terms of correctness, accuracy,
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* reliability, currentness, or otherwise; and you rely on the software,
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* reliability, currentness, or otherwise; and you rely on the software,
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* documentation and results solely at your own risk.
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* documentation and results solely at your own risk.
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*
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*
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* IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS,
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* IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS,
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* LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES
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* LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES
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* OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM
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* OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM
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* PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER.
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* PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER.
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*
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*
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******************************************************************************/
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******************************************************************************/
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.file "memcm_ca.s"
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.file "memcm_ca.s"
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#ifdef __PIC
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#ifdef __PIC
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.pic
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.pic
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#endif
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#endif
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#ifdef __PID
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#ifdef __PID
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.pid
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.pid
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#endif
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#endif
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/*
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/*
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* (c) copyright 1988,1992,1993 Intel Corp., all rights reserved
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* (c) copyright 1988,1992,1993 Intel Corp., all rights reserved
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*/
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*/
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/*
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/*
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procedure memcmp (optimized assembler version for the CA)
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procedure memcmp (optimized assembler version for the CA)
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result = memcmp (src1_addr, src2_addr, max_bytes)
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result = memcmp (src1_addr, src2_addr, max_bytes)
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compare the byte array pointed to by src1_addr to the byte array
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compare the byte array pointed to by src1_addr to the byte array
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pointed to by src2_addr. Return 0 iff the arrays are equal, -1 if
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pointed to by src2_addr. Return 0 iff the arrays are equal, -1 if
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src1_addr is lexicly less than src2_addr, and 1 if it is lexicly
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src1_addr is lexicly less than src2_addr, and 1 if it is lexicly
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greater. Do not compare more than max_bytes bytes.
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greater. Do not compare more than max_bytes bytes.
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Undefined behavior will occur if the end of either source array
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Undefined behavior will occur if the end of either source array
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is in the last word of the program's allocated memory space. This
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is in the last word of the program's allocated memory space. This
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is so because, in several cases, memcmp will fetch ahead one word.
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is so because, in several cases, memcmp will fetch ahead one word.
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Disallowing the fetch ahead would impose a severe performance penalty.
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Disallowing the fetch ahead would impose a severe performance penalty.
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This program handles five cases:
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This program handles five cases:
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1) both arguments start on a word boundary
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1) both arguments start on a word boundary
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2) neither are word aligned, but they are offset by the same amount
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2) neither are word aligned, but they are offset by the same amount
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3) source1 is word aligned, source2 is not
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3) source1 is word aligned, source2 is not
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4) source2 is word aligned, source1 is not
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4) source2 is word aligned, source1 is not
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5) neither is word aligned, and they are offset by differing amounts
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5) neither is word aligned, and they are offset by differing amounts
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At the time of this writing, only g0 thru g7 and g14 are available
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At the time of this writing, only g0 thru g7 and g14 are available
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for use in this leafproc; other registers would have to be saved and
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for use in this leafproc; other registers would have to be saved and
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restored. These nine registers are sufficient to implement the routine.
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restored. These nine registers are sufficient to implement the routine.
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The registers are used as follows:
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The registers are used as follows:
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g0 original src1 ptr; extracted word; return result
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g0 original src1 ptr; extracted word; return result
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g1 src2 ptr; byt extraction mask
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g1 src2 ptr; byt extraction mask
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g2 maximum number of bytes to compare
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g2 maximum number of bytes to compare
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g3 src2 word ptr
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g3 src2 word ptr
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Little endian
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Little endian
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g4 lsw of src1
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g4 lsw of src1
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g5 msw of src1
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g5 msw of src1
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g6 src2 word
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g6 src2 word
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g7 src1 word ptr
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g7 src1 word ptr
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Big endian
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Big endian
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g4 msw of src1
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g4 msw of src1
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g5 lsw of src1
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g5 lsw of src1
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g6 src1 word ptr
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g6 src1 word ptr
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g7 src2 word
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g7 src2 word
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g13 return address
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g13 return address
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g14 shift count
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g14 shift count
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*/
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*/
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#if __i960_BIG_ENDIAN__
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#if __i960_BIG_ENDIAN__
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#define MSW g4
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#define MSW g4
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#define LSW g5
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#define LSW g5
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#define SRC1 g6
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#define SRC1 g6
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#define SRC2 g7
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#define SRC2 g7
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#else
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#else
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#define LSW g4
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#define LSW g4
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#define MSW g5
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#define MSW g5
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#define SRC2 g6
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#define SRC2 g6
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#define SRC1 g7
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#define SRC1 g7
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#endif
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#endif
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.globl _memcmp
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.globl _memcmp
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.globl __memcmp
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.globl __memcmp
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.leafproc _memcmp, __memcmp
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.leafproc _memcmp, __memcmp
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.align 2
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.align 2
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_memcmp:
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_memcmp:
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#ifndef __PIC
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#ifndef __PIC
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lda Lrett,g14
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lda Lrett,g14
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#else
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#else
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lda Lrett-(.+8)(ip),g14
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lda Lrett-(.+8)(ip),g14
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#endif
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#endif
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__memcmp:
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__memcmp:
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Lrestart:
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Lrestart:
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#if __i960_BIG_ENDIAN__
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#if __i960_BIG_ENDIAN__
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subo 1,g0,SRC1
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subo 1,g0,SRC1
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notand SRC1,3,SRC1 # extract word addr of start of src1
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notand SRC1,3,SRC1 # extract word addr of start of src1
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#else
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#else
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notand g0,3,SRC1 # extract word addr of start of src1
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notand g0,3,SRC1 # extract word addr of start of src1
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#endif
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#endif
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lda (g14),g13 # preserve return address
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lda (g14),g13 # preserve return address
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cmpibge.f 0,g2,Lequal_exit # return equality if number bytes 0
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cmpibge.f 0,g2,Lequal_exit # return equality if number bytes 0
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notand g1,3,g3 # extract word addr of start of src2
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notand g1,3,g3 # extract word addr of start of src2
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ld (SRC1),LSW # fetch word with at least first byte of src1
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ld (SRC1),LSW # fetch word with at least first byte of src1
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cmpo g3,g1 # check alignment of src2
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cmpo g3,g1 # check alignment of src2
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ld 4(SRC1),MSW # fetch second word of src1
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ld 4(SRC1),MSW # fetch second word of src1
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shlo 3,g0,g14 # compute shift count for src1
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shlo 3,g0,g14 # compute shift count for src1
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#if __i960_BIG_ENDIAN__
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#if __i960_BIG_ENDIAN__
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subo g14,0,g14 # adjust shift count for big endian.
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subo g14,0,g14 # adjust shift count for big endian.
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#endif
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#endif
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ld (g3),SRC2 # fetch word with at least first byte of src2
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ld (g3),SRC2 # fetch word with at least first byte of src2
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eshro g14,g4,LSW # extract word of src1
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eshro g14,g4,LSW # extract word of src1
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lda 8(SRC1),SRC1 # advance src1 word addr
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lda 8(SRC1),SRC1 # advance src1 word addr
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bne.f Lsrc2_unaligned # branch if src2 is NOT word aligned
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bne.f Lsrc2_unaligned # branch if src2 is NOT word aligned
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mov LSW,g0 # at least src2 is word aligned
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mov LSW,g0 # at least src2 is word aligned
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lda 0xff,g1
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lda 0xff,g1
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Lwloop: # word comparing loop
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Lwloop: # word comparing loop
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cmpo SRC2,g0 # compare src1 and src2 words
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cmpo SRC2,g0 # compare src1 and src2 words
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lda 4(g3),g3 # pre-increment src2 addr
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lda 4(g3),g3 # pre-increment src2 addr
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mov MSW,LSW # move msw of src1 to lsw
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mov MSW,LSW # move msw of src1 to lsw
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ld (SRC1),MSW # pre-fetch next msw of src1
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ld (SRC1),MSW # pre-fetch next msw of src1
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subi 4,g2,g2 # decrement maximum byte count
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subi 4,g2,g2 # decrement maximum byte count
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bne.f Lcloop # branch if src1 and src2 unequal
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bne.f Lcloop # branch if src1 and src2 unequal
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cmpi 0,g2
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cmpi 0,g2
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ld (g3),SRC2 # pre-fetch next word of src2
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ld (g3),SRC2 # pre-fetch next word of src2
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eshro g14,g4,g0 # extract word of src1
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eshro g14,g4,g0 # extract word of src1
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lda 4(SRC1),SRC1 # post-increment src1 addr
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lda 4(SRC1),SRC1 # post-increment src1 addr
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bl.t Lwloop # branch if max_bytes not reached yet
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bl.t Lwloop # branch if max_bytes not reached yet
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b Lequal_exit # strings were equal up through max_bytes
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b Lequal_exit # strings were equal up through max_bytes
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Lcloop_setup: # setup for coming from Lsrc2_unaligned
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Lcloop_setup: # setup for coming from Lsrc2_unaligned
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mov LSW,g0 # restore extracted src1 word
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mov LSW,g0 # restore extracted src1 word
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subo 4,g2,g2 # make up for later re-incrementing
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subo 4,g2,g2 # make up for later re-incrementing
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lda 0xff,g1 # byte extraction mask
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lda 0xff,g1 # byte extraction mask
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Lcloop: # character comparing loop
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Lcloop: # character comparing loop
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#if __i960_BIG_ENDIAN__
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#if __i960_BIG_ENDIAN__
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rotate 24,g1,g1 # shift mask for next byte
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rotate 24,g1,g1 # shift mask for next byte
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#endif
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#endif
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and SRC2,g1,g3 # extract next char of src2
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and SRC2,g1,g3 # extract next char of src2
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and g0,g1,LSW # extract next char of src1
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and g0,g1,LSW # extract next char of src1
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cmpobne.f LSW,g3,.diff # check for equality
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cmpobne.f LSW,g3,.diff # check for equality
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#if ! __i960_BIG_ENDIAN__
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#if ! __i960_BIG_ENDIAN__
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shlo 8,g1,g1 # shift mask for next byte
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shlo 8,g1,g1 # shift mask for next byte
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#endif
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#endif
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subi 1,g2,g2 # decrement character counter
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subi 1,g2,g2 # decrement character counter
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b Lcloop # branch if null not reached
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b Lcloop # branch if null not reached
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Lequal_exit: # words are equal up thru null byte
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Lequal_exit: # words are equal up thru null byte
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mov 0,g14 # conform to register conventions
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mov 0,g14 # conform to register conventions
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lda 0,g0 # return zero, indicating equality
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lda 0,g0 # return zero, indicating equality
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bx (g13) # return
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bx (g13) # return
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Lrett:
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Lrett:
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ret
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ret
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.diff:
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.diff:
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addo 4,g2,g2 # to make up for extra decrement in loop
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addo 4,g2,g2 # to make up for extra decrement in loop
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lda 0,g14
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lda 0,g14
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bl Lless_than_exit
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bl Lless_than_exit
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Lgreater_than_exit:
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Lgreater_than_exit:
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cmpibge.f 0,g2,Lequal_exit # branch if difference is beyond max_bytes
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cmpibge.f 0,g2,Lequal_exit # branch if difference is beyond max_bytes
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mov 1,g0
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mov 1,g0
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bx (g13) # g0 = 1 (src1 > src2)
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bx (g13) # g0 = 1 (src1 > src2)
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Lless_than_exit:
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Lless_than_exit:
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cmpibge.f 0,g2,Lequal_exit # branch if difference is beyond max_bytes
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cmpibge.f 0,g2,Lequal_exit # branch if difference is beyond max_bytes
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subi 1,0,g0
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subi 1,0,g0
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bx (g13) # g0 = -1 (src1 < src2)
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bx (g13) # g0 = -1 (src1 < src2)
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Lsrc2_unaligned:
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Lsrc2_unaligned:
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notor g1,3,g14 # first step in computing new src1 ptr
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notor g1,3,g14 # first step in computing new src1 ptr
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ld 4(g3),SRC1 # fetch second word of src2
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ld 4(g3),SRC1 # fetch second word of src2
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shlo 3,g1,MSW # compute shift count for src2
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shlo 3,g1,MSW # compute shift count for src2
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#if __i960_BIG_ENDIAN__
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#if __i960_BIG_ENDIAN__
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subo MSW,0,MSW
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subo MSW,0,MSW
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#endif
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#endif
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eshro MSW,g6,SRC2 # extract word of src2
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eshro MSW,g6,SRC2 # extract word of src2
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cmpo LSW,SRC2 # compare src1 and src2 words
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cmpo LSW,SRC2 # compare src1 and src2 words
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lda 4(g3),g1 # set new src2 ptr
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lda 4(g3),g1 # set new src2 ptr
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bne.f Lcloop_setup # first four bytes differ
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bne.f Lcloop_setup # first four bytes differ
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subo g14,g0,g0 # second (final) step in computing new src1 ptr
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subo g14,g0,g0 # second (final) step in computing new src1 ptr
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addi g14,g2,g2 # compute new max_bytes too
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addi g14,g2,g2 # compute new max_bytes too
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lda (g13),g14 # prepare return pointer for Lrestart
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lda (g13),g14 # prepare return pointer for Lrestart
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b Lrestart # continue with both string fetches shifted
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b Lrestart # continue with both string fetches shifted
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