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[/] [openrisc/] [tags/] [gnu-src/] [newlib-1.18.0/] [newlib-1.18.0-or32-1.0rc1/] [newlib/] [libc/] [machine/] [i960/] [strrchr.S] - Diff between revs 207 and 345

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Rev 207 Rev 345
/*******************************************************************************
/*******************************************************************************
 *
 *
 * Copyright (c) 1993 Intel Corporation
 * Copyright (c) 1993 Intel Corporation
 *
 *
 * Intel hereby grants you permission to copy, modify, and distribute this
 * Intel hereby grants you permission to copy, modify, and distribute this
 * software and its documentation.  Intel grants this permission provided
 * software and its documentation.  Intel grants this permission provided
 * that the above copyright notice appears in all copies and that both the
 * that the above copyright notice appears in all copies and that both the
 * copyright notice and this permission notice appear in supporting
 * copyright notice and this permission notice appear in supporting
 * documentation.  In addition, Intel grants this permission provided that
 * documentation.  In addition, Intel grants this permission provided that
 * you prominently mark as "not part of the original" any modifications
 * you prominently mark as "not part of the original" any modifications
 * made to this software or documentation, and that the name of Intel
 * made to this software or documentation, and that the name of Intel
 * Corporation not be used in advertising or publicity pertaining to
 * Corporation not be used in advertising or publicity pertaining to
 * distribution of the software or the documentation without specific,
 * distribution of the software or the documentation without specific,
 * written prior permission.
 * written prior permission.
 *
 *
 * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR
 * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR
 * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY
 * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY
 * OR FITNESS FOR A PARTICULAR PURPOSE.  Intel makes no guarantee or
 * OR FITNESS FOR A PARTICULAR PURPOSE.  Intel makes no guarantee or
 * representations regarding the use of, or the results of the use of,
 * representations regarding the use of, or the results of the use of,
 * the software and documentation in terms of correctness, accuracy,
 * the software and documentation in terms of correctness, accuracy,
 * reliability, currentness, or otherwise; and you rely on the software,
 * reliability, currentness, or otherwise; and you rely on the software,
 * documentation and results solely at your own risk.
 * documentation and results solely at your own risk.
 *
 *
 * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS,
 * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS,
 * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES
 * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES
 * OF ANY KIND.  IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM
 * OF ANY KIND.  IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM
 * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER.
 * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER.
 *
 *
 ******************************************************************************/
 ******************************************************************************/
        .file "strrchr.s"
        .file "strrchr.s"
#ifdef  __i960_BIG_ENDIAN__
#ifdef  __i960_BIG_ENDIAN__
#error  "This does not work in big-endian"
#error  "This does not work in big-endian"
#endif
#endif
#ifdef  __PIC
#ifdef  __PIC
        .pic
        .pic
#endif
#endif
#ifdef  __PID
#ifdef  __PID
        .pid
        .pid
#endif
#endif
/*
/*
 * (c) copyright 1988,1993 Intel Corp., all rights reserved
 * (c) copyright 1988,1993 Intel Corp., all rights reserved
 */
 */
/*
/*
        procedure strrchr  (optimized assembler version for the 80960K series)
        procedure strrchr  (optimized assembler version for the 80960K series)
        src_addr = strrchr (src_addr, char)
        src_addr = strrchr (src_addr, char)
        return a pointer to the last byte that contains the indicated
        return a pointer to the last byte that contains the indicated
        byte in the source string.  Return null if the byte is not found.
        byte in the source string.  Return null if the byte is not found.
        Undefined behavior will occur if the end of the source string (i.e.
        Undefined behavior will occur if the end of the source string (i.e.
        the terminating null byte) is in the last two words of the program's
        the terminating null byte) is in the last two words of the program's
        allocated memory space.  This is so because strrchr fetches ahead.
        allocated memory space.  This is so because strrchr fetches ahead.
        Disallowing the fetch ahead would impose a severe performance penalty.
        Disallowing the fetch ahead would impose a severe performance penalty.
        Strategy:
        Strategy:
        Fetch the source string by words and scanbyte the words for the
        Fetch the source string by words and scanbyte the words for the
        char until either a word with the byte is found or the null byte is
        char until either a word with the byte is found or the null byte is
        encountered.  In the former case, move through the word to find the
        encountered.  In the former case, move through the word to find the
        matching byte and save its memory address, then continue the search.
        matching byte and save its memory address, then continue the search.
        In the latter case, return the saved address, or zero (null) if none
        In the latter case, return the saved address, or zero (null) if none
        was ever found to save.
        was ever found to save.
        Tactics:
        Tactics:
        1) Do NOT try to fetch the words in a word aligned manner because,
        1) Do NOT try to fetch the words in a word aligned manner because,
        in my judgement, the performance degradation experienced due to
        in my judgement, the performance degradation experienced due to
        non-aligned accesses does NOT outweigh the time and complexity added
        non-aligned accesses does NOT outweigh the time and complexity added
        by the preamble that would be necessary to assure alignment.  This
        by the preamble that would be necessary to assure alignment.  This
        is supported by the intuition that most source arrays (even more
        is supported by the intuition that most source arrays (even more
        true of most big source arrays) will be word aligned to begin with.
        true of most big source arrays) will be word aligned to begin with.
*/
*/
        .globl  _strrchr
        .globl  _strrchr
        .globl  __strrchr
        .globl  __strrchr
        .leafproc       _strrchr, __strrchr
        .leafproc       _strrchr, __strrchr
        .align  2
        .align  2
_strrchr:
_strrchr:
#ifdef __PIC
#ifdef __PIC
        lda     Lrett-(.+8)(ip),g14
        lda     Lrett-(.+8)(ip),g14
#else
#else
        lda     Lrett,g14
        lda     Lrett,g14
#endif
#endif
__strrchr:
__strrchr:
        ld      (g0),g4         # fetch first word
        ld      (g0),g4         # fetch first word
        lda     0xff,g7         # byte extraction mask
        lda     0xff,g7         # byte extraction mask
        and     g1,g7,g1        # make char an 8-bit ordinal
        and     g1,g7,g1        # make char an 8-bit ordinal
        shlo    8,g1,g2         # broadcast the char to four bytes
        shlo    8,g1,g2         # broadcast the char to four bytes
        or      g1,g2,g2
        or      g1,g2,g2
        shlo    16,g2,g5
        shlo    16,g2,g5
        or      g2,g5,g3
        or      g2,g5,g3
        mov     g14,g13         # preserve return address
        mov     g14,g13         # preserve return address
        addo    4,g0,g2         # post-increment src pointer
        addo    4,g0,g2         # post-increment src pointer
        mov     1,g0            # prepare to return null pointer
        mov     1,g0            # prepare to return null pointer
        mov     g3,g6           # prepare to return null pointer
        mov     g3,g6           # prepare to return null pointer
Lsearch_for_word_with_char_or_null:
Lsearch_for_word_with_char_or_null:
        mov     g4,g5           # copy word
        mov     g4,g5           # copy word
        scanbyte 0,g5           # check for null byte
        scanbyte 0,g5           # check for null byte
        ld      (g2),g4         # fetch next word of src
        ld      (g2),g4         # fetch next word of src
        bo      Lword_has_null  # branch if null found
        bo      Lword_has_null  # branch if null found
        scanbyte g3,g5          # check for byte with char
        scanbyte g3,g5          # check for byte with char
        addo    4,g2,g2         # post-increment src pointer
        addo    4,g2,g2         # post-increment src pointer
        bno     Lsearch_for_word_with_char_or_null   # branch if no copy of char
        bno     Lsearch_for_word_with_char_or_null   # branch if no copy of char
        mov     g5,g6           # save word that has char in it (at least once)
        mov     g5,g6           # save word that has char in it (at least once)
        subo    4,g2,g0         # save addr of byte after word with char
        subo    4,g2,g0         # save addr of byte after word with char
        b       Lsearch_for_word_with_char_or_null
        b       Lsearch_for_word_with_char_or_null
Lword_has_null:
Lword_has_null:
        subo    4,g2,g2         # move src pointer back to word with null
        subo    4,g2,g2         # move src pointer back to word with null
Lfind_null:
Lfind_null:
        addo    1,g2,g2         # advance src pointer to byte after current
        addo    1,g2,g2         # advance src pointer to byte after current
        and     g7,g5,g14       # extract next byte
        and     g7,g5,g14       # extract next byte
        cmpo    g1,g14          # is current byte char?
        cmpo    g1,g14          # is current byte char?
        shro    8,g5,g5         # position next byte for extraction
        shro    8,g5,g5         # position next byte for extraction
        bne     1f              # skip if not char sought after
        bne     1f              # skip if not char sought after
        mov     g2,g0           # save addr of byte after char
        mov     g2,g0           # save addr of byte after char
        mov     g3,g6           # save word of all char to short circuit search
        mov     g3,g6           # save word of all char to short circuit search
1:      cmpobne 0,g14,Lfind_null        # is current byte null?
1:      cmpobne 0,g14,Lfind_null        # is current byte null?
Lfind_last_char:
Lfind_last_char:
        rotate  8,g6,g6         # position next highest byte
        rotate  8,g6,g6         # position next highest byte
        and     g7,g6,g5        # extract byte
        and     g7,g6,g5        # extract byte
        subo    1,g0,g0         # move pointer to that byte (or nullify)
        subo    1,g0,g0         # move pointer to that byte (or nullify)
        cmpobne g5,g1,Lfind_last_char   # branch if not at char
        cmpobne g5,g1,Lfind_last_char   # branch if not at char
        bx      (g13)           # g0 = addr of char in src (or null);  g14 = 0
        bx      (g13)           # g0 = addr of char in src (or null);  g14 = 0
Lrett:
Lrett:
        ret
        ret
/* end of strrchr */
/* end of strrchr */
 
 

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