OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.3.0/] [build/] [tick/] [.libs/] [libtick.a] - Diff between revs 19 and 21

Go to most recent revision | Only display areas with differences | Details | Blame | View Log

Rev 19 Rev 21
!
!
/               1223831544  0     0     0       118       `
/               1223831544  0     0     0       118       `
spr_read_ttcr__i686.get_pc_thunk.bxtick_countspr_write_ttmrspr_write_ttcrtick_resettick.o/         1223831544  500   500   100664  16724     `
spr_read_ttcr__i686.get_pc_thunk.bxtick_countspr_write_ttmrspr_write_ttcrtick_resettick.o/         1223831544  500   500   100664  16724     `
ELFX*4(U(]uuU@t,D$t$t$D$T$$]u]Íp +릍&USt$D$-D$T$$@@[]Ðt&UWVS,@E%EƁ t
E9%=@w=u D$D$$9u})E%=@Hv.==t&tn,[^_]Í&uvuցe0} uƍD$D$D$$뜍t&e0} zD$|$D$$Q})D$|$|$D$t$$t&D$@D$$v7D$@|$D$$e0} ,[^_]Í&u[sD$|$D$뢐t&D$D$$vD$D$t$$|&D$D$t$$&D$D$t$$&D$D$t$$&U8]Eu}E싓@UE%@uZp x$1ҋ@E)׋%=tAE]u}]t&p x$+@됍e;Mu뫍t&ED$ET$$D$D$D$@t&U(]uu}t(D$Ht$D$T$$1P$@ )]u}@]t&UVS P$@ dž@t3@T$$%D$D$;D$D$@D$%D$@$ [^]ÐU]u@D$$t@$D$]u]Ív'US@t+@D$D$D$$ǀ@ǀ@[]%:;I$>$>$>I&I	:;
ELFX*4(U(]uuU@t,D$t$t$D$T$$]u]Íp +릍&USt$D$-D$T$$@@[]Ðt&UWVS,@E%EƁ t
E9%=@w=u D$D$$9u})E%=@Hv.==t&tn,[^_]Í&uvuցe0} uƍD$D$D$$뜍t&e0} zD$|$D$$Q})D$|$|$D$t$$t&D$@D$$v7D$@|$D$$e0} ,[^_]Í&u[sD$|$D$뢐t&D$D$$vD$D$t$$|&D$D$t$$&D$D$t$$&D$D$t$$&U8]Eu}E싓@UE%@uZp x$1ҋ@E)׋%=tAE]u}]t&p x$+@됍e;Mu뫍t&ED$ET$$D$D$D$@t&U(]uu}t(D$Ht$D$T$$1P$@ )]u}@]t&UVS P$@ dž@t3@T$$%D$D$;D$D$@D$%D$@$ [^]ÐU]u@D$$t@$D$]u]Ív'US@t+@D$D$D$$ǀ@ǀ@[]%:;I$>$>$>I&I	:;

:;I8

:;I8
:;
:;I8
:;
:;I8

I!I/:;'II':;
:;I8

I!I/:;'II':;
:;I8
:;!I/:;(
.?:;I@4:;I4:;I4I4
:;!I/:;(
.?:;I@4:;I4:;I4I4
&I.:;'@ :;I
&I.:;'@ :;I
!:;I"4:;I
!:;I"4:;I
#4:;I$.?:;'@%.?:;'@&4:;I'4:;I?<(!)4:;I?
#4:;I$.?:;'@%.?:;'@&4:;I'4:;I?<(!)4:;I?
vfxW0intNSQK38vfFS[401   3-
vfxW0intNSQK38vfFS[401   3-
A#
A#
I#
I#
6#
6#
#
#
#
#
p#
p#
#
#
Y#
Y#
E#
E#
#$
#$
#(
#(
k #,
k #,
"#0
"#0
$#4
$#4
&&A#8
&&A#8
*A#<
*A#<
,#@
,#@
:0:#D
:0:#D
1h#F
1h#F
2#G
2#G
6#H
6#H
?#L
?#L
hH#T
hH#T
oI#X
oI#X
vJ#\
vJ#\
}K#`
}K#`
L%#d
L%#d
*NA#h
*NA#h
PP#l  9#_#A#
S7
S7'./  @GG
PP#l  9#_#A#
S7
S7'./  @GG
HA#DI#;J#       9!      :#   ;#x   >#aaaaaa@    D      EA#   FA#   HA#E   I#   KA#   L#+   NA#   OA#   PA# M   Qv#$   Rv#,   SA#4   U#8   V#<	ZC	[A#	\A#	]A#	^A#	_#	c, 	d#	eA#+	fA#	gA#%	hA#	lm	mA#	nA#	oA#	pA#$	tC	uA#	vA#	wA#*	xA#.	yA#x	zA#i	{A#a	|A#	}A# pic	C	A#x	A#	4C	A#	C	A#U	A#	A#	A#	A#	A#	C	A#	A#	A#>      a#          7next      AM#sim   W#a   `#Lcuc   i#`cpu   q,#tdc    ~m#pic  #pm   #bpb  4#  #T    e      G#   G#   G#   G#   A#0   #D   A#O   A#   v#    v#(   e#0<   a#8^   A#<   A#@   A#D~   v#H   A#P      [      v#   v#   A#   A#z   A#     C      A#o   G#   A#                  #      e#
A# 7          h      sim n#cpu   l#Ta   ̻#pcuc   #|
HA#DI#;J#       9!      :#   ;#x   >#aaaaaa@    D      EA#   FA#   HA#E   I#   KA#   L#+   NA#   OA#   PA# M   Qv#$   Rv#,   SA#4   U#8   V#<	ZC	[A#	\A#	]A#	^A#	_#	c, 	d#	eA#+	fA#	gA#%	hA#	lm	mA#	nA#	oA#	pA#$	tC	uA#	vA#	wA#*	xA#.	yA#x	zA#i	{A#a	|A#	}A# pic	C	A#x	A#	4C	A#	C	A#U	A#	A#	A#	A#	A#	C	A#	A#	A#>      a#          7next      AM#sim   W#a   `#Lcuc   i#`cpu   q,#tdc    ~m#pic  #pm   #bpb  4#  #T    e      G#   G#   G#   G#   A#0   #D   A#O   A#   v#    v#(   e#0<   a#8^   A#<   A#@   A#D~   v#H   A#P      [      v#   v#   A#   A#z   A#     C      A#o   G#   A#                  #      e#
A# 7          h      sim n#cpu   l#Ta   ̻#pcuc   #|
5
5
reg
reg
6
6
#L
#L
7
7
#"
#"
8#5
8#5
9A#pc
9A#pc
:#<
:#<
;#M
;#M
<#
<#
=#F
=#F
>#

>#

7
%
7
%
7J
7J
( 
( 
ret,:f
ret,:f
4
4
.
.
Q
H%
Q
H%
jJ dati4k
jJ dati4k
.k
.k
Q
-siv+!pr"tul#Vu#v[4
Q
-siv+!pr"tul#Vu#v[4
.
.
4
4
.
.
4
4
.
.
@4
@4
.
.
@i4
@i4
.
.
Q
$p!#h4Ǫ
Q
$p!#h4Ǫ
.ǯ
.ǯ
Q
$i;4!`4
Q
$i;4!`4
.
.
Q
H_@O
 dat^>
4b
Q
H_@O
 dat^>
4b
.b
.b
Q
;yNVv
 datM%e@`
S
7

S
7

S
7


S
7


&4
"7v''d'      '    #      '
Q
;yNVv
 datM%e@`
S
7

S
7

S
7


S
7


&4
"7v''d'      '    #      '
Rh      
SZ('4O)^;A!
../../tick/usr/lib/gcc/i386-redhat-linux/4.3.0/include/usr/include/bits/usr/include../../cpu/or1k../../cpu/common../..../../supporttick.cstddef.htypes.hstdint.hstdio.hlibio.harch.habstract.hsim-config.hexecute.hdebug.hi7~t!/uYO_3b=.K^*oE(        
Rh      
SZ('4O)^;A!
../../tick/usr/lib/gcc/i386-redhat-linux/4.3.0/include/usr/include/bits/usr/include../../cpu/or1k../../cpu/common../..../../supporttick.cstddef.htypes.hstdint.hstdio.hlibio.harch.habstract.hsim-config.hexecute.hdebug.hi7~t!/uYO_3b=.K^*oE(        
<rYS#*(s00o0&0=$y:LT04=s(mrH3Zdg;0egegeg8/igjbZf<!+read ttcr %d (0x%08x)
<rYS#*(s00o0&0=$y:LT04=s(mrH3Zdg;0egegeg8/igjbZf<!+read ttcr %d (0x%08x)
Stopping one-shot timer
Stopping one-shot timer
tick_raise_excepttick_restartScheduleing one-shot timer.
tick_raise_excepttick_restartScheduleing one-shot timer.
tick_one_shotset ttcr = %08x
tick_one_shotset ttcr = %08x
Resetting Tick Timer.
Resetting Tick Timer.
Cycles to go until match: %u (0x%x)
Cycles to go until match: %u (0x%x)
Scheduleing exception when timer match (in disabled mode).
Scheduleing exception when timer match (in disabled mode).
Scheduleing auto-restarting timer.
Scheduleing auto-restarting timer.
Scheduleing exception when timer match (in cont. mode).
Scheduleing exception when timer match (in cont. mode).
set ttmr = %08x (previous: %08x)
set ttmr = %08x (previous: %08x)
Scheduleing timer restart job for %d
Scheduleing timer restart job for %d
spr_read_ttcrspr_write_ttmrsched_timer_jobtick_one_shottick_restartspr_write_ttcr|AB
FNkAB
AiAB
ADp;AB
FT AB
FNF@AB
BfAB
FN`vAB
Attu/nVVttuttiuPWWWW-upWWupWupGWIWupiW4VVVVpqtqstsupulupP#upJdupdkPkupPtt;uV*VW*-uW-;u@AtACtCuttVu`atactcudzJ
spr_read_ttcrspr_write_ttmrsched_timer_jobtick_one_shottick_restartspr_write_ttcr|AB
FNkAB
AiAB
ADp;AB
FT AB
FNF@AB
BfAB
FN`vAB
Attu/nVVttuttiuPWWWW-upWWupWupGWIWupiW4VVVVpqtqstsupulupP#upJdupdkPkupPtt;uV*VW*-uW-;u@AtACtCuttVu`atactcudzJ
spr_read_ttcr+spr_write_ttmrspr_write_ttcrv
tick_resetgtick_countvapi_fniqueuedebug_shortbuf_IO_lock_tblocksize__dbchinsn_addr_IO_buf_end__FUNCTION__mem_cyclesspr_write_ttcrwrite_up_IO_write_endunsigned intttmr_flagsnways__ORSIM_DBCL_FIXMEbticclkcycle_ps_markersloadcyclesspr_write_ttmrdependstats__orsim_dbch___defaultmprof_fnclass_ptrcalling_conventionvapi_idicompletiprompt_runuint32_tstdout_IO_save_end/home/jeremy/partners/OpenCores/cvstrees/or1k/or1ksim/build/tickfoutmdelaylong long unsigned intfexe_logsbp_bf_fwdexe_log_IO_backup_base_offsetinitvaluetime_point_fileno__dbcldelay_insniqueue_entrypic_linessize_ttick_countstore_hitdelayedge_triggersched_timer_job_IO_read_baseruntimestdin__ORSIM_DBCL_ERRcycle_duration_next_poshazardwaitttcr_periodstorecycles__orsim_dbch_ticksuperscalarcharinsn_ea_modefilename_IO_markerinsn_IO_read_ptrmatch_timeload_missdelayprev_ttmrsupercyclesmemory_orderfmproforaddr_t_IO_write_basetick_one_shotgdb_enabledlong long int_IO_save_basehazardsmprofilesbuf_lenread_upinsn_indexend_cyclestimings_fnhistory__quad_tpc_delayprof_fnexe_log_startinstructions__pad1__pad2__pad3__pad4__pad5enable_burstsuorreg_t_vtable_offset__ORSIM_DEBUG_CLASSfprofhushreset_instructions__ORSIM_DBCL_TRACEstalledcycles_startload_hitdelayconfigspr_read_ttcrustates_IO_read_endenabledshort intsbp_bnf_fwdvapilong intvapi_filetick_raise_excepthide_device_idhitdelaylog_enabledGNU C 4.3.0 20080428 (Red Hat 4.3.0-8)nsetsprev_valexe_log_markerexe_log_type_locklong unsigned int_old_offsetno_multicycle_IO_FILEext_intipromptsprsunsigned char_sbuftick_reset_IO_write_ptrreset_cyclescpu_stateserver_port__off_tverbosesigned charprofileshort unsigned intexe_log_fndoublemissdelaycycles_chainFILEtick_restart_flags2exe_log_end__ORSIM_DBCL_WARN_cur_column__off64_t_unused2_IO_buf_base../../tick/tick.cstore_missdelayGCC: (GNU) 4.3.0 20080428 (Red Hat 4.3.0-8)$.symtab.strtab.shstrtab.rel.text.data.bss.debug_abbrev.rel.debug_info.rel.debug_line.rodata.str1.1.rodata.str1.4.rodata.rel.debug_frame.debug_loc.rel.debug_pubnames.rel.debug_aranges.debug_str.comment.text.__i686.get_pc_thunk.bx.note.GNU-stack.group4.@    4%+0B6
spr_read_ttcr+spr_write_ttmrspr_write_ttcrv
tick_resetgtick_countvapi_fniqueuedebug_shortbuf_IO_lock_tblocksize__dbchinsn_addr_IO_buf_end__FUNCTION__mem_cyclesspr_write_ttcrwrite_up_IO_write_endunsigned intttmr_flagsnways__ORSIM_DBCL_FIXMEbticclkcycle_ps_markersloadcyclesspr_write_ttmrdependstats__orsim_dbch___defaultmprof_fnclass_ptrcalling_conventionvapi_idicompletiprompt_runuint32_tstdout_IO_save_end/home/jeremy/partners/OpenCores/cvstrees/or1k/or1ksim/build/tickfoutmdelaylong long unsigned intfexe_logsbp_bf_fwdexe_log_IO_backup_base_offsetinitvaluetime_point_fileno__dbcldelay_insniqueue_entrypic_linessize_ttick_countstore_hitdelayedge_triggersched_timer_job_IO_read_baseruntimestdin__ORSIM_DBCL_ERRcycle_duration_next_poshazardwaitttcr_periodstorecycles__orsim_dbch_ticksuperscalarcharinsn_ea_modefilename_IO_markerinsn_IO_read_ptrmatch_timeload_missdelayprev_ttmrsupercyclesmemory_orderfmproforaddr_t_IO_write_basetick_one_shotgdb_enabledlong long int_IO_save_basehazardsmprofilesbuf_lenread_upinsn_indexend_cyclestimings_fnhistory__quad_tpc_delayprof_fnexe_log_startinstructions__pad1__pad2__pad3__pad4__pad5enable_burstsuorreg_t_vtable_offset__ORSIM_DEBUG_CLASSfprofhushreset_instructions__ORSIM_DBCL_TRACEstalledcycles_startload_hitdelayconfigspr_read_ttcrustates_IO_read_endenabledshort intsbp_bnf_fwdvapilong intvapi_filetick_raise_excepthide_device_idhitdelaylog_enabledGNU C 4.3.0 20080428 (Red Hat 4.3.0-8)nsetsprev_valexe_log_markerexe_log_type_locklong unsigned int_old_offsetno_multicycle_IO_FILEext_intipromptsprsunsigned char_sbuftick_reset_IO_write_ptrreset_cyclescpu_stateserver_port__off_tverbosesigned charprofileshort unsigned intexe_log_fndoublemissdelaycycles_chainFILEtick_restart_flags2exe_log_end__ORSIM_DBCL_WARN_cur_column__off64_t_unused2_IO_buf_base../../tick/tick.cstore_missdelayGCC: (GNU) 4.3.0 20080428 (Red Hat 4.3.0-8)$.symtab.strtab.shstrtab.rel.text.data.bss.debug_abbrev.rel.debug_info.rel.debug_line.rodata.str1.1.rodata.str1.4.rodata.rel.debug_frame.debug_loc.rel.debug_pubnames.rel.debug_aranges.debug_str.comment.text.__i686.get_pc_thunk.bx.note.GNU-stack.group4.@    4%+0B6
z>      $8RN @ ^2m2`|nW @0!h 
z>      $8RN @ ^2m2`|nW @0!h 
.
.
/0%112< F b3z4 .
/0%112< F b3z4 .
/2  310     .
/2  310     .
/1.-j t 52  66` j ~62   3  5 ! )6W0g "q   5 # 3 $ 3 % 03B &L       `3}.
/1.-j t 52  66` j ~62   3  5 ! )6W0g "q   5 # 3 $ 3 % 03B &L       `3}.
/1210410  *401>  ' 31.
/1210410  *401>  ' 31.
/2 ( 34 1  F.L
/2 ( 34 1  F.L
/U4[1q w2}  ) 3 ! 6.
/U4[1q w2}  ) 3 ! 6.
/     1     )9H:e.k
/     1     )9H:e.k
/t<4 *=10!&3=V]dkry"1@O^m|!0?N]l{+9Vdr,:HVdr5CQ_v&=KYgu_w-;IWhu    $ L i        &
/t<4 *=10!&3=V]dkry"1@O^m|!0?N]l{+9Vdr,:HVdr5CQ_v&=KYgu_w-;IWhu    $ L i        &
2
2
8
8
>
>
D
D
L
L
V
V
Z
Z
^
^
q
q
v
v
z
z


























#,6;ISXbgkt&-48<EOT^cgp{



(
3
?
J
P
W
[
_
x





2

#,6;ISXbgkt&-48<EOT^cgp{



(
3
?
J
P
W
[
_
x





2

 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.