/* tick.c -- Tests all aspects of the tick timer
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/* tick.c -- Tests all aspects of the tick timer
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Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org
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Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org
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This file is part of OpenRISC 1000 Architectural Simulator.
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This file is part of OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include "spr_defs.h"
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#include "spr_defs.h"
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#include "support.h"
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#include "support.h"
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#define ASSERT(x) ((x)? printf(" Test succeeded %s:%i\n", __FILE__, __LINE__) : fail (__FILE__, __LINE__))
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#define ASSERT(x) ((x)? printf(" Test succeeded %s:%i\n", __FILE__, __LINE__) : fail (__FILE__, __LINE__))
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void fail (char *func, int line)
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void fail (char *func, int line)
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{
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{
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#ifndef __FUNCTION__
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#ifndef __FUNCTION__
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#define __FUNCTION__ "?"
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#define __FUNCTION__ "?"
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#endif
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#endif
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printf ("Test failed in %s:%i\n", func, line);
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printf ("Test failed in %s:%i\n", func, line);
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report(0xeeeeeeee);
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report(0xeeeeeeee);
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exit (1);
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exit (1);
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}
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}
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static volatile int tick_cnt = 0;
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static volatile int tick_cnt = 0;
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static int clear_ip = 1;
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static int clear_ip = 1;
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void tick_int(void)
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void tick_int(void)
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{
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{
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int ttcr = mfspr(SPR_TTCR);
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int ttcr = mfspr(SPR_TTCR);
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int ttmr = mfspr(SPR_TTMR);
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int ttmr = mfspr(SPR_TTMR);
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/* Make sure that the tick timer interrupt pending bit is set */
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/* Make sure that the tick timer interrupt pending bit is set */
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ASSERT(mfspr(SPR_TTMR) & SPR_TTMR_IP);
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ASSERT(mfspr(SPR_TTMR) & SPR_TTMR_IP);
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tick_cnt++;
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tick_cnt++;
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/* Clear interrupt (Write a 0 to SPR_TTMR_IP) */
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/* Clear interrupt (Write a 0 to SPR_TTMR_IP) */
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/* If we programmed a one-shot timer, make sure to disable the interrupts,
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/* If we programmed a one-shot timer, make sure to disable the interrupts,
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* else we'd get a spurious interrupt */
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* else we'd get a spurious interrupt */
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if((ttmr & SPR_TTMR_M) != 0x80000000)
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if((ttmr & SPR_TTMR_M) != 0x80000000)
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mtspr(SPR_TTMR, mfspr(SPR_TTMR) & ~SPR_TTMR_IP);
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mtspr(SPR_TTMR, mfspr(SPR_TTMR) & ~SPR_TTMR_IP);
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else
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else
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mtspr(SPR_TTMR, mfspr(SPR_TTMR) & ~(SPR_TTMR_IP | SPR_TTMR_IE));
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mtspr(SPR_TTMR, mfspr(SPR_TTMR) & ~(SPR_TTMR_IP | SPR_TTMR_IE));
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}
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}
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void tick_int_spurious(void)
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void tick_int_spurious(void)
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{
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{
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/* Make sure that the tick timer interrupt pending bit is set */
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/* Make sure that the tick timer interrupt pending bit is set */
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ASSERT(mfspr(SPR_TTMR) & SPR_TTMR_IP);
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ASSERT(mfspr(SPR_TTMR) & SPR_TTMR_IP);
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/* Clear interrupt (Write a 0 to SPR_TTMR_IP) */
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/* Clear interrupt (Write a 0 to SPR_TTMR_IP) */
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if(clear_ip)
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if(clear_ip)
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mtspr(SPR_TTMR, mfspr(SPR_TTMR) & ~SPR_TTMR_IP);
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mtspr(SPR_TTMR, mfspr(SPR_TTMR) & ~SPR_TTMR_IP);
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/* Make sure we actually get a spurious interrupt */
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/* Make sure we actually get a spurious interrupt */
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if(++tick_cnt == 5)
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if(++tick_cnt == 5)
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/* We should get spurious tick interrupts so disable it */
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/* We should get spurious tick interrupts so disable it */
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mtspr(SPR_TTMR, 0);
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mtspr(SPR_TTMR, 0);
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}
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}
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/* Does nothing for a small amount of time (waiting for TTCR to increment) */
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/* Does nothing for a small amount of time (waiting for TTCR to increment) */
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void waste_time(void)
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void waste_time(void)
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{
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{
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int i;
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int i;
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volatile int x;
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volatile int x;
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for(i = 0; i < 50; i++)
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for(i = 0; i < 50; i++)
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x = i;
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x = i;
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}
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}
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/* Waits for a tick timer exception */
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/* Waits for a tick timer exception */
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void wait_match(void)
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void wait_match(void)
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{
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{
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while(!tick_cnt);
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while(!tick_cnt);
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tick_cnt = 0;
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tick_cnt = 0;
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}
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}
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int main()
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int main()
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{
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{
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int ttcr;
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int ttcr;
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excpt_tick = (unsigned long)tick_int;
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excpt_tick = (unsigned long)tick_int;
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/* Enable tick interrupt */
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/* Enable tick interrupt */
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mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_TEE);
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mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_TEE);
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/* Disable timer */
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/* Disable timer */
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mtspr(SPR_TTMR, 0);
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mtspr(SPR_TTMR, 0);
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mtspr(SPR_TTCR, 0);
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mtspr(SPR_TTCR, 0);
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/* Waste some time to check if the timer is really disabled */
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/* Waste some time to check if the timer is really disabled */
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waste_time();
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waste_time();
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/* Timer is disabled and shouldn't count, TTCR should still be 0 */
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/* Timer is disabled and shouldn't count, TTCR should still be 0 */
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ASSERT(mfspr(SPR_TTCR) == 0);
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ASSERT(mfspr(SPR_TTCR) == 0);
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/* Start timer in continous timeing mode. Enable timer interrupt and set the
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/* Start timer in continous timeing mode. Enable timer interrupt and set the
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* value to match */
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* value to match */
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mtspr(SPR_TTMR, (3 << 30) | SPR_TTMR_IE | 0x100);
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mtspr(SPR_TTMR, (3 << 30) | SPR_TTMR_IE | 0x100);
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/* Wait for the timer to count up to the match value */
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/* Wait for the timer to count up to the match value */
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wait_match();
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wait_match();
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ttcr = mfspr(SPR_TTCR);
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ttcr = mfspr(SPR_TTCR);
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waste_time();
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waste_time();
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/* The timer should have kept counting and our saved ttcr should not be the
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/* The timer should have kept counting and our saved ttcr should not be the
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* same as SPR_TTCR */
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* same as SPR_TTCR */
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ASSERT(ttcr < mfspr(SPR_TTCR));
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ASSERT(ttcr < mfspr(SPR_TTCR));
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mtspr(SPR_TTMR, 0);
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mtspr(SPR_TTMR, 0);
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ttcr = mfspr(SPR_TTCR);
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ttcr = mfspr(SPR_TTCR);
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/* Restart the timer */
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/* Restart the timer */
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mtspr(SPR_TTMR, (3 << 30));
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mtspr(SPR_TTMR, (3 << 30));
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waste_time();
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waste_time();
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/* The timer should have carried on from what was SPR_TTCR when we started it.
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/* The timer should have carried on from what was SPR_TTCR when we started it.
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*/
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*/
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ASSERT(ttcr < mfspr(SPR_TTCR));
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ASSERT(ttcr < mfspr(SPR_TTCR));
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mtspr(SPR_TTMR, 0);
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mtspr(SPR_TTMR, 0);
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ttcr = mfspr(SPR_TTCR);
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ttcr = mfspr(SPR_TTCR);
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waste_time();
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waste_time();
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/* Timer should be disabled and should not have counted */
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/* Timer should be disabled and should not have counted */
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ASSERT(ttcr == mfspr(SPR_TTCR));
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ASSERT(ttcr == mfspr(SPR_TTCR));
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/* Stop the timer when a match occured */
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/* Stop the timer when a match occured */
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mtspr(SPR_TTCR, 0);
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mtspr(SPR_TTCR, 0);
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mtspr(SPR_TTMR, (2 << 30) | SPR_TTMR_IE | 0x100);
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mtspr(SPR_TTMR, (2 << 30) | SPR_TTMR_IE | 0x100);
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wait_match();
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wait_match();
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ttcr = mfspr(SPR_TTCR);
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ttcr = mfspr(SPR_TTCR);
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waste_time();
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waste_time();
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/* The timer should have stoped and thus SPR_TTCR sould = ttcr */
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/* The timer should have stoped and thus SPR_TTCR sould = ttcr */
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ASSERT(ttcr == mfspr(SPR_TTCR));
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ASSERT(ttcr == mfspr(SPR_TTCR));
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/* The counter should still indicate one-shot mode */
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/* The counter should still indicate one-shot mode */
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ASSERT((mfspr(SPR_TTMR) >> 30) == 2);
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ASSERT((mfspr(SPR_TTMR) >> 30) == 2);
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/* Set auto-restarting timer */
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/* Set auto-restarting timer */
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mtspr(SPR_TTMR, 0);
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mtspr(SPR_TTMR, 0);
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mtspr(SPR_TTCR, 0);
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mtspr(SPR_TTCR, 0);
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mtspr(SPR_TTMR, (1 << 30) | SPR_TTMR_IE | 0x1000);
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mtspr(SPR_TTMR, (1 << 30) | SPR_TTMR_IE | 0x1000);
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wait_match();
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wait_match();
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ttcr = mfspr(SPR_TTCR);
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ttcr = mfspr(SPR_TTCR);
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wait_match();
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wait_match();
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/* Disable timer */
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/* Disable timer */
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mtspr(SPR_TTMR, 0);
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mtspr(SPR_TTMR, 0);
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/* Start a one-shot counter but keep interrupts disabled */
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/* Start a one-shot counter but keep interrupts disabled */
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mtspr(SPR_TTCR, 0);
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mtspr(SPR_TTCR, 0);
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mtspr(SPR_TTMR, (2 << 30) | 0x100);
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mtspr(SPR_TTMR, (2 << 30) | 0x100);
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/* Wait for the counter to stop */
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/* Wait for the counter to stop */
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while(mfspr(SPR_TTCR) != 0x100);
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while(mfspr(SPR_TTCR) != 0x100);
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/* Make sure the counter has actually stopped */
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/* Make sure the counter has actually stopped */
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waste_time();
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waste_time();
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ASSERT(mfspr(SPR_TTCR) == 0x100);
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ASSERT(mfspr(SPR_TTCR) == 0x100);
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ASSERT(tick_cnt == 0);
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ASSERT(tick_cnt == 0);
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/* SPR_TTMR_IP should not be set */
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/* SPR_TTMR_IP should not be set */
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ASSERT(!(mfspr(SPR_TTMR) & SPR_TTMR_IP));
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ASSERT(!(mfspr(SPR_TTMR) & SPR_TTMR_IP));
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/* Start a perpetual counter (makeing sure that no interrupts occur while it's
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/* Start a perpetual counter (makeing sure that no interrupts occur while it's
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* counting) */
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* counting) */
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mtspr(SPR_TTMR, 0);
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mtspr(SPR_TTMR, 0);
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mtspr(SPR_TTCR, 0);
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mtspr(SPR_TTCR, 0);
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mtspr(SPR_TTMR, (3 << 30) | 0x100);
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mtspr(SPR_TTMR, (3 << 30) | 0x100);
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while(mfspr(SPR_TTCR) < 0x100);
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while(mfspr(SPR_TTCR) < 0x100);
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waste_time();
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waste_time();
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ASSERT(mfspr(SPR_TTCR) > 0x100);
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ASSERT(mfspr(SPR_TTCR) > 0x100);
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ASSERT(tick_cnt == 0);
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ASSERT(tick_cnt == 0);
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ASSERT(!(mfspr(SPR_TTMR) & SPR_TTMR_IP));
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ASSERT(!(mfspr(SPR_TTMR) & SPR_TTMR_IP));
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/* Disable the timer interrupt */
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/* Disable the timer interrupt */
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mtspr(SPR_SR, mfspr(SPR_SR) & ~SPR_SR_TEE);
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mtspr(SPR_SR, mfspr(SPR_SR) & ~SPR_SR_TEE);
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/* Set one-shot timer */
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/* Set one-shot timer */
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mtspr(SPR_TTCR, 0);
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mtspr(SPR_TTCR, 0);
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mtspr(SPR_TTMR, (2 << 30) | SPR_TTMR_IE | 0x100);
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mtspr(SPR_TTMR, (2 << 30) | SPR_TTMR_IE | 0x100);
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while(!(mfspr(SPR_TTMR) & SPR_TTMR_IP));
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while(!(mfspr(SPR_TTMR) & SPR_TTMR_IP));
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/* Give some time for a potential interrupt to occur */
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/* Give some time for a potential interrupt to occur */
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waste_time();
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waste_time();
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/* No interrupt should have occured */
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/* No interrupt should have occured */
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ASSERT(tick_cnt == 0);
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ASSERT(tick_cnt == 0);
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/* Enable tick interrupt */
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/* Enable tick interrupt */
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mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_TEE);
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mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_TEE);
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/* Test Setting TTCR while counting */
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/* Test Setting TTCR while counting */
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mtspr(SPR_TTMR, 0);
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mtspr(SPR_TTMR, 0);
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mtspr(SPR_TTCR, 0);
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mtspr(SPR_TTCR, 0);
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mtspr(SPR_TTMR, (3 << 30) | 0x3000);
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mtspr(SPR_TTMR, (3 << 30) | 0x3000);
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while(mfspr(SPR_TTCR) < 0x30000);
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while(mfspr(SPR_TTCR) < 0x30000);
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waste_time();
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waste_time();
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mtspr(SPR_TTCR, 0x50);
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mtspr(SPR_TTCR, 0x50);
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waste_time();
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waste_time();
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ttcr = mfspr(SPR_TTCR);
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ttcr = mfspr(SPR_TTCR);
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ASSERT(ttcr > 0x50 && ttcr < 0x30000);
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ASSERT(ttcr > 0x50 && ttcr < 0x30000);
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mtspr(SPR_TTMR, 0);
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mtspr(SPR_TTMR, 0);
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/* Set ttcr to a high value */
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/* Set ttcr to a high value */
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mtspr(SPR_TTCR, 0x20000);
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mtspr(SPR_TTCR, 0x20000);
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/* Now, start timer in one-shot mode */
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/* Now, start timer in one-shot mode */
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mtspr(SPR_TTMR, (2 << 30) | SPR_TTMR_IE | 0x100);
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mtspr(SPR_TTMR, (2 << 30) | SPR_TTMR_IE | 0x100);
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/* The counter should start counting from 0x20000 and wrap around to 0x100
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/* The counter should start counting from 0x20000 and wrap around to 0x100
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* causeing an interrupt */
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* causeing an interrupt */
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waste_time();
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waste_time();
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ASSERT(mfspr(SPR_TTCR) > 0x20000);
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ASSERT(mfspr(SPR_TTCR) > 0x20000);
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wait_match();
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wait_match();
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ASSERT(1);
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ASSERT(1);
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/* If TTCR is greater than TTMR_PERIOD then the interrupt gets delivered after
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/* If TTCR is greater than TTMR_PERIOD then the interrupt gets delivered after
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* TTCR wraps around to 0 and counts to SPR_TTMR_PERIOD */
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* TTCR wraps around to 0 and counts to SPR_TTMR_PERIOD */
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mtspr(SPR_TTMR, 0);
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mtspr(SPR_TTMR, 0);
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mtspr(SPR_TTCR, 0xffffc00);
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mtspr(SPR_TTCR, 0xffffc00);
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mtspr(SPR_TTMR, (1 << 30) | SPR_TTMR_IE | 0x10000);
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mtspr(SPR_TTMR, (1 << 30) | SPR_TTMR_IE | 0x10000);
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wait_match();
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wait_match();
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ASSERT(1);
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ASSERT(1);
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/* test continuous mode */
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/* test continuous mode */
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mtspr(SPR_TTMR, 0);
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mtspr(SPR_TTMR, 0);
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mtspr(SPR_TTCR, 0xffffc00);
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mtspr(SPR_TTCR, 0xffffc00);
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mtspr(SPR_TTMR, (3 << 30) | SPR_TTMR_IE | 0x10000);
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mtspr(SPR_TTMR, (3 << 30) | SPR_TTMR_IE | 0x10000);
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wait_match();
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wait_match();
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mtspr(SPR_TTMR, 0);
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mtspr(SPR_TTMR, 0);
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ASSERT(1);
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ASSERT(1);
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excpt_tick = (unsigned long)tick_int_spurious;
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excpt_tick = (unsigned long)tick_int_spurious;
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/* Make sure sure that TTMR_PERIOD is not 0!! */
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/* Make sure sure that TTMR_PERIOD is not 0!! */
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mtspr(SPR_TTMR, 1);
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mtspr(SPR_TTMR, 1);
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/* Set SPR_TTMR_PERIOD to some value, while keeping the timer disabled */
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/* Set SPR_TTMR_PERIOD to some value, while keeping the timer disabled */
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mtspr(SPR_TTCR, 0);
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mtspr(SPR_TTCR, 0);
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mtspr(SPR_TTMR, SPR_TTMR_IE | 0x100);
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mtspr(SPR_TTMR, SPR_TTMR_IE | 0x100);
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/* Set SPR_TTCR with the same value */
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/* Set SPR_TTCR with the same value */
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mtspr(SPR_TTCR, 0x100);
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mtspr(SPR_TTCR, 0x100);
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while(tick_cnt != 5);
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while(tick_cnt != 5);
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tick_cnt = 0;
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tick_cnt = 0;
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ASSERT(mfspr(SPR_TTCR) == 0x100);
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ASSERT(mfspr(SPR_TTCR) == 0x100);
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/* Test setting TTCR first then TTMR */
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/* Test setting TTCR first then TTMR */
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mtspr(SPR_TTCR, 0x101);
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mtspr(SPR_TTCR, 0x101);
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mtspr(SPR_TTMR, SPR_TTMR_IE | 0x101);
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mtspr(SPR_TTMR, SPR_TTMR_IE | 0x101);
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while(tick_cnt != 5);
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while(tick_cnt != 5);
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tick_cnt = 0;
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tick_cnt = 0;
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ASSERT(mfspr(SPR_TTCR) == 0x101);
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ASSERT(mfspr(SPR_TTCR) == 0x101);
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/* Set countinous counter, but make sure we never clear the TTMR_IP bit */
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/* Set countinous counter, but make sure we never clear the TTMR_IP bit */
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clear_ip = 0;
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clear_ip = 0;
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mtspr(SPR_TTCR, 0);
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mtspr(SPR_TTCR, 0);
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mtspr(SPR_TTMR, (3 << 30) | SPR_TTMR_IE | 0x100);
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mtspr(SPR_TTMR, (3 << 30) | SPR_TTMR_IE | 0x100);
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while(tick_cnt != 5);
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while(tick_cnt != 5);
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report(0xdeaddead);
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report(0xdeaddead);
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return 0;
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return 0;
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}
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}
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