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[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.3.0/] [testbench/] [uos/] [tick.c] - Diff between revs 19 and 21

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Rev 19 Rev 21
/* This file is part of test microkernel for OpenRISC 1000. */
/* This file is part of test microkernel for OpenRISC 1000. */
/* (C) 2001 Simon Srot, srot@opencores.org */
/* (C) 2001 Simon Srot, srot@opencores.org */
 
 
#include "spr_defs.h"
#include "spr_defs.h"
#include "support.h"
#include "support.h"
 
 
/* Tick timer period */
/* Tick timer period */
unsigned long tick_period;
unsigned long tick_period;
 
 
/* Inform of tick interrupt */
/* Inform of tick interrupt */
void (*tick_inf)();
void (*tick_inf)();
 
 
/* Tick interrupt routine */
/* Tick interrupt routine */
void tick_int()
void tick_int()
{
{
  /* Call inf routine */
  /* Call inf routine */
  (*tick_inf)();
  (*tick_inf)();
 
 
  /* Set new counter period iand clear inet pending bit */
  /* Set new counter period iand clear inet pending bit */
        mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (tick_period & SPR_TTMR_PERIOD));
        mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (tick_period & SPR_TTMR_PERIOD));
}
}
 
 
/* Initialize routine */
/* Initialize routine */
int tick_init(unsigned long period, void (* inf)())
int tick_init(unsigned long period, void (* inf)())
{
{
  /* Save tick timer period and inform routine */
  /* Save tick timer period and inform routine */
  tick_period = period;
  tick_period = period;
  tick_inf = inf;
  tick_inf = inf;
 
 
  /* Set counter period, enable timer and interrupt */
  /* Set counter period, enable timer and interrupt */
  mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (period & SPR_TTMR_PERIOD));
  mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (period & SPR_TTMR_PERIOD));
 
 
  return 0;
  return 0;
}
}
 
 

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