/* is-sub-test.S. l.sub instruction test of Or1ksim
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/* is-sub-test.S. l.sub instruction test of Or1ksim
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*
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*
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* Copyright (C) 1999-2006 OpenCores
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* Copyright (C) 1999-2006 OpenCores
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* Copyright (C) 2010 Embecosm Limited
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* Copyright (C) 2010 Embecosm Limited
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*
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*
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* Contributors various OpenCores participants
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* Contributors various OpenCores participants
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* Contributor Jeremy Bennett
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* Contributor Jeremy Bennett
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*
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*
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* This file is part of OpenRISC 1000 Architectural Simulator.
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* This file is part of OpenRISC 1000 Architectural Simulator.
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 3 of the License, or (at your option)
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* Software Foundation; either version 3 of the License, or (at your option)
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* any later version.
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* any later version.
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*
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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* more details.
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*
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*
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* You should have received a copy of the GNU General Public License along
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see .
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* with this program. If not, see .
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*/
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*/
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/* ----------------------------------------------------------------------------
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/* ----------------------------------------------------------------------------
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* Coding conventions are described in inst-set-test.S
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* Coding conventions are described in inst-set-test.S
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* ------------------------------------------------------------------------- */
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* ------------------------------------------------------------------------- */
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/* ----------------------------------------------------------------------------
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/* ----------------------------------------------------------------------------
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* Test coverage
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* Test coverage
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*
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*
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* The l.sub instruction should set the carry and overflow flags.
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* The l.sub instruction should set the carry and overflow flags.
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*
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*
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* Problems in this area were reported in Bugs 1782, 1783 and 1784. Having
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* Problems in this area were reported in Bugs 1782, 1783 and 1784. Having
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* fixed the problem, this is (in good software engineering style), a
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* fixed the problem, this is (in good software engineering style), a
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* regression test to go with the fix.
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* regression test to go with the fix.
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*
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*
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* This is not a comprehensive test of any instruction (yet).
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* This is not a comprehensive test of any instruction (yet).
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*
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*
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* Of course what is really needed is a comprehensive instruction test...
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* Of course what is really needed is a comprehensive instruction test...
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* ------------------------------------------------------------------------- */
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* ------------------------------------------------------------------------- */
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#include "inst-set-test.h"
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#include "inst-set-test.h"
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/* ----------------------------------------------------------------------------
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/* ----------------------------------------------------------------------------
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* A macro to carry out a test of subtraction in registers
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* A macro to carry out a test of subtraction in registers
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*
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*
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*
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*
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* Arguments
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* Arguments
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* set_flags: Flags to set in the SR
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* set_flags: Flags to set in the SR
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* clr_flags: Flags to clear in the SR
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* clr_flags: Flags to clear in the SR
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* op1: First operand value
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* op1: First operand value
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* op2: Second operand value
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* op2: Second operand value
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* res: Expected result
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* res: Expected result
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* cy: Expected carry flag
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* cy: Expected carry flag
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* ov: Expected overflow flag
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* ov: Expected overflow flag
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* ------------------------------------------------------------------------- */
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* ------------------------------------------------------------------------- */
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#define TEST_SUB(set_flags, clr_flags, op1, op2, res, cy, ov) \
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#define TEST_SUB(set_flags, clr_flags, op1, op2, res, cy, ov) \
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l.mfspr r3,r0,SPR_SR ;\
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l.mfspr r3,r0,SPR_SR ;\
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LOAD_CONST (r2, set_flags) /* Set flags */ ;\
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LOAD_CONST (r2, set_flags) /* Set flags */ ;\
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l.or r3,r3,r2 ;\
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l.or r3,r3,r2 ;\
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LOAD_CONST (r2, ~clr_flags) /* Clear flags */ ;\
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LOAD_CONST (r2, ~clr_flags) /* Clear flags */ ;\
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l.and r3,r3,r2 ;\
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l.and r3,r3,r2 ;\
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l.mtspr r0,r3,SPR_SR ;\
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l.mtspr r0,r3,SPR_SR ;\
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;\
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;\
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LOAD_CONST (r5,op1) /* Load numbers to subtract */ ;\
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LOAD_CONST (r5,op1) /* Load numbers to subtract */ ;\
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LOAD_CONST (r6,op2) ;\
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LOAD_CONST (r6,op2) ;\
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l.mtspr r0,r0,SPR_EPCR_BASE /* Clear record */ ;\
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l.mtspr r0,r0,SPR_EPCR_BASE /* Clear record */ ;\
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50: l.sub r4,r5,r6 ;\
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50: l.sub r4,r5,r6 ;\
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l.mfspr r2,r0,SPR_SR /* So we can examine flags */ ;\
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l.mfspr r2,r0,SPR_SR /* So we can examine flags */ ;\
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l.mfspr r5,r0,SPR_EPCR_BASE /* What triggered exception */ ;\
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l.mfspr r5,r0,SPR_EPCR_BASE /* What triggered exception */ ;\
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PUSH (r5) /* Save EPCR for later */ ;\
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PUSH (r5) /* Save EPCR for later */ ;\
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PUSH (r2) ;\
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PUSH (r2) ;\
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PUSH (r4) /* Save result for later */ ;\
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PUSH (r4) /* Save result for later */ ;\
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;\
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;\
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PUTS (" 0x") ;\
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PUTS (" 0x") ;\
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PUTH (op1) ;\
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PUTH (op1) ;\
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PUTS (" - 0x") ;\
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PUTS (" - 0x") ;\
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PUTH (op2) ;\
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PUTH (op2) ;\
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PUTS (" = 0x") ;\
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PUTS (" = 0x") ;\
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PUTH (res) ;\
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PUTH (res) ;\
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PUTS (": ") ;\
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PUTS (": ") ;\
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POP (r4) ;\
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POP (r4) ;\
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CHECK_RES1 (r4, res) ;\
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CHECK_RES1 (r4, res) ;\
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;\
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;\
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POP(r2) /* Retrieve SR */ ;\
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POP(r2) /* Retrieve SR */ ;\
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PUSH(r2) ;\
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PUSH(r2) ;\
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LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */ ;\
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LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */ ;\
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l.and r2,r2,r4 ;\
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l.and r2,r2,r4 ;\
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l.sfeq r2,r4 ;\
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l.sfeq r2,r4 ;\
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CHECK_FLAG ("- carry flag set: ", cy) ;\
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CHECK_FLAG ("- carry flag set: ", cy) ;\
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;\
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;\
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POP(r2) /* Retrieve SR */ ;\
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POP(r2) /* Retrieve SR */ ;\
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LOAD_CONST (r4, SPR_SR_OV) /* The overflow bit */ ;\
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LOAD_CONST (r4, SPR_SR_OV) /* The overflow bit */ ;\
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l.and r2,r2,r4 ;\
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l.and r2,r2,r4 ;\
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l.sfeq r2,r4 ;\
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l.sfeq r2,r4 ;\
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CHECK_FLAG ("- overflow flag set: ", ov) ;\
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CHECK_FLAG ("- overflow flag set: ", ov) ;\
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;\
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;\
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POP (r2) /* Retrieve EPCR */ ;\
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POP (r2) /* Retrieve EPCR */ ;\
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LOAD_CONST (r4, 50b) /* The opcode of interest */ ;\
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LOAD_CONST (r4, 50b) /* The opcode of interest */ ;\
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l.and r2,r2,r4 ;\
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l.and r2,r2,r4 ;\
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l.sfeq r2,r4 ;\
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l.sfeq r2,r4 ;\
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l.bnf 53f ;\
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l.bnf 53f ;\
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;\
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;\
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PUTS (" - exception triggered: TRUE\n") ;\
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PUTS (" - exception triggered: TRUE\n") ;\
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l.j 54f ;\
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l.j 54f ;\
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l.nop ;\
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l.nop ;\
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;\
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;\
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53: PUTS (" - exception triggered: FALSE\n") ;\
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53: PUTS (" - exception triggered: FALSE\n") ;\
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54:
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54:
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/* ----------------------------------------------------------------------------
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/* ----------------------------------------------------------------------------
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* Start of code
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* Start of code
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* ------------------------------------------------------------------------- */
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* ------------------------------------------------------------------------- */
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.section .text
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.section .text
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.global _start
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.global _start
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_start:
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_start:
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l.mfspr r3,r0,SPR_SR
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l.mfspr r3,r0,SPR_SR
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LOAD_CONST (r2, ~SPR_SR_OVE) /* Clear OVE */
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LOAD_CONST (r2, ~SPR_SR_OVE) /* Clear OVE */
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l.and r3,r3,r2
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l.and r3,r3,r2
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l.mtspr r0,r3,SPR_SR
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l.mtspr r0,r3,SPR_SR
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LOAD_STR (r3, " ** OVE flag cleared **\n")
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LOAD_STR (r3, " ** OVE flag cleared **\n")
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l.jal _puts
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l.jal _puts
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l.nop
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l.nop
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/* ----------------------------------------------------------------------------
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/* ----------------------------------------------------------------------------
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* Test of subtract signed, l.sub
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* Test of subtract signed, l.sub
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* ------------------------------------------------------------------------- */
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* ------------------------------------------------------------------------- */
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_sub:
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_sub:
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LOAD_STR (r3, "l.sub\n")
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LOAD_STR (r3, "l.sub\n")
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l.jal _puts
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l.jal _puts
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l.nop
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l.nop
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/* Subtract two small positive numbers. Sets the carry, but never the
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/* Subtract two small positive numbers. Sets the carry, but never the
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overflow if the result is negative. */
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overflow if the result is negative. */
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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0x00000003, 0x00000002, 0x00000001,
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0x00000003, 0x00000002, 0x00000001,
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FALSE, FALSE)
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FALSE, FALSE)
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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0x00000001, 0x00000002, 0xffffffff,
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0x00000001, 0x00000002, 0xffffffff,
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TRUE, FALSE)
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TRUE, FALSE)
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/* Check carry in is ignored. */
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/* Check carry in is ignored. */
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TEST_SUB (SPR_SR_CY, SPR_SR_OV,
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TEST_SUB (SPR_SR_CY, SPR_SR_OV,
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0x00000003, 0x00000002, 0x00000001,
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0x00000003, 0x00000002, 0x00000001,
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FALSE, FALSE)
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FALSE, FALSE)
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/* Subtract two small negative numbers. Sets the carry flag if the
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/* Subtract two small negative numbers. Sets the carry flag if the
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result is negative, but never the overflow flag. */
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result is negative, but never the overflow flag. */
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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0xfffffffd, 0xfffffffe, 0xffffffff,
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0xfffffffd, 0xfffffffe, 0xffffffff,
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TRUE, FALSE)
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TRUE, FALSE)
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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0xffffffff, 0xfffffffe, 0x00000001,
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0xffffffff, 0xfffffffe, 0x00000001,
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FALSE, FALSE)
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FALSE, FALSE)
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/* Subtract two quite large positive numbers. Should set neither the
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/* Subtract two quite large positive numbers. Should set neither the
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overflow nor the carry flag. */
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overflow nor the carry flag. */
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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0x7fffffff, 0x3fffffff, 0x40000000,
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0x7fffffff, 0x3fffffff, 0x40000000,
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FALSE, FALSE)
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FALSE, FALSE)
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/* Subtract two quite large negative numbers. Should set neither the
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/* Subtract two quite large negative numbers. Should set neither the
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overflow nor the carry flag. */
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overflow nor the carry flag. */
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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0x40000000, 0x40000000, 0x00000000,
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0x40000000, 0x40000000, 0x00000000,
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FALSE, FALSE)
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FALSE, FALSE)
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/* Subtract two large positive numbers with a negative result. Should
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/* Subtract two large positive numbers with a negative result. Should
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set the carry, but not the overflow flag. */
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set the carry, but not the overflow flag. */
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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0x3fffffff, 0x40000000, 0xffffffff,
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0x3fffffff, 0x40000000, 0xffffffff,
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TRUE, FALSE)
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TRUE, FALSE)
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/* Subtract two large negative numbers with a positive result. Should
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/* Subtract two large negative numbers with a positive result. Should
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set niether the carry nor the overflow flag. */
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set niether the carry nor the overflow flag. */
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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0x40000000, 0x3fffffff, 0x00000001,
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0x40000000, 0x3fffffff, 0x00000001,
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FALSE, FALSE)
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FALSE, FALSE)
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/* Subtract a large positive from a large negative number. Should set
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/* Subtract a large positive from a large negative number. Should set
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overflow but not the carry flag. */
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overflow but not the carry flag. */
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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0x80000000, 0x7fffffff, 0x00000001,
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0x80000000, 0x7fffffff, 0x00000001,
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FALSE, TRUE)
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FALSE, TRUE)
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/* Subtract a large negative from a large positive number. Should set
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/* Subtract a large negative from a large positive number. Should set
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both the overflow and carry flags. */
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both the overflow and carry flags. */
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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0x7fffffff, 0x80000000, 0xffffffff,
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0x7fffffff, 0x80000000, 0xffffffff,
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TRUE, TRUE)
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TRUE, TRUE)
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/* Check that range exceptions are triggered */
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/* Check that range exceptions are triggered */
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l.mfspr r3,r0,SPR_SR
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l.mfspr r3,r0,SPR_SR
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LOAD_CONST (r2, SPR_SR_OVE) /* Set OVE */
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LOAD_CONST (r2, SPR_SR_OVE) /* Set OVE */
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l.or r3,r3,r2
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l.or r3,r3,r2
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l.mtspr r0,r3,SPR_SR
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l.mtspr r0,r3,SPR_SR
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LOAD_STR (r3, " ** OVE flag set **\n")
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LOAD_STR (r3, " ** OVE flag set **\n")
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l.jal _puts
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l.jal _puts
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l.nop
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l.nop
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/* Check that an overflow alone causes a RANGE Exception. */
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/* Check that an overflow alone causes a RANGE Exception. */
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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0x80000000, 0x7fffffff, 0x00000001,
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0x80000000, 0x7fffffff, 0x00000001,
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FALSE, TRUE)
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FALSE, TRUE)
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/* Check that a carry alone does not cause a RANGE Exception. */
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/* Check that a carry alone does not cause a RANGE Exception. */
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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0x3fffffff, 0x40000000, 0xffffffff,
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0x3fffffff, 0x40000000, 0xffffffff,
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TRUE, FALSE)
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TRUE, FALSE)
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/* Check that carry and overflow together cause an exception. */
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/* Check that carry and overflow together cause an exception. */
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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TEST_SUB (0, SPR_SR_CY | SPR_SR_OV,
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0x7fffffff, 0x80000000, 0xffffffff,
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0x7fffffff, 0x80000000, 0xffffffff,
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TRUE, TRUE)
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TRUE, TRUE)
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/* Finished checking range exceptions */
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/* Finished checking range exceptions */
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l.mfspr r3,r0,SPR_SR
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l.mfspr r3,r0,SPR_SR
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LOAD_CONST (r2, ~SPR_SR_OVE) /* Clear OVE */
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LOAD_CONST (r2, ~SPR_SR_OVE) /* Clear OVE */
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l.and r3,r3,r2
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l.and r3,r3,r2
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l.mtspr r0,r3,SPR_SR
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l.mtspr r0,r3,SPR_SR
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LOAD_STR (r3, " ** OVE flag cleared **\n")
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LOAD_STR (r3, " ** OVE flag cleared **\n")
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l.jal _puts
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l.jal _puts
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l.nop
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l.nop
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/* ----------------------------------------------------------------------------
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/* ----------------------------------------------------------------------------
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* All done
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* All done
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* ------------------------------------------------------------------------- */
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* ------------------------------------------------------------------------- */
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_exit:
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_exit:
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LOAD_STR (r3, "Test completed\n")
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LOAD_STR (r3, "Test completed\n")
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l.jal _puts
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l.jal _puts
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l.nop
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l.nop
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