/* op-1t-op.h -- Micro operations useing only one temporary
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/* op-1t-op.h -- Micro operations useing only one temporary
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Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org
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Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org
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This file is part of OpenRISC 1000 Architectural Simulator.
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This file is part of OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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__or_dynop void glue(op_imm, T)(void)
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__or_dynop void glue(op_imm, T)(void)
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{
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{
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T0 = OP_PARAM1;
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T0 = OP_PARAM1;
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}
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}
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__or_dynop void glue(op_clear, T)(void)
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__or_dynop void glue(op_clear, T)(void)
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{
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{
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T0 = 0;
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T0 = 0;
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}
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}
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__or_dynop void glue(op_check_null_except_delay, T)(void)
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__or_dynop void glue(op_check_null_except_delay, T)(void)
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{
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{
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if(!T0) {
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if(!T0) {
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/* Do exception */
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/* Do exception */
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env->sprs[SPR_EEAR_BASE] = env->pc - 4;
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env->sprs[SPR_EEAR_BASE] = env->pc - 4;
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env->delay_insn = 0;
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env->delay_insn = 0;
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do_jump(EXCEPT_ILLEGAL);
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do_jump(EXCEPT_ILLEGAL);
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}
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}
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}
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}
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__or_dynop void glue(op_check_null_except, T)(void)
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__or_dynop void glue(op_check_null_except, T)(void)
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{
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{
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if(!T0) {
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if(!T0) {
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/* Do exception */
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/* Do exception */
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env->sprs[SPR_EEAR_BASE] = env->pc;
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env->sprs[SPR_EEAR_BASE] = env->pc;
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do_jump(EXCEPT_ILLEGAL);
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do_jump(EXCEPT_ILLEGAL);
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}
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}
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}
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}
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__or_dynop void glue(op_calc_insn_ea, T)(void)
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__or_dynop void glue(op_calc_insn_ea, T)(void)
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{
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{
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env->insn_ea = T0 + OP_PARAM1;
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env->insn_ea = T0 + OP_PARAM1;
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}
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}
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__or_dynop void glue(op_macrc, T)(void)
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__or_dynop void glue(op_macrc, T)(void)
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{
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{
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/* FIXME: How is this supposed to work? The architechture manual says that
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/* FIXME: How is this supposed to work? The architechture manual says that
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* the low 32-bits shall be saved into rD. I have just copied this code from
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* the low 32-bits shall be saved into rD. I have just copied this code from
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* insnset.c to make testbench/mul pass */
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* insnset.c to make testbench/mul pass */
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int64_t temp = env->sprs[SPR_MACLO] | ((int64_t)env->sprs[SPR_MACHI] << 32);
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int64_t temp = env->sprs[SPR_MACLO] | ((int64_t)env->sprs[SPR_MACHI] << 32);
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T0 = (orreg_t)(temp >> 28);
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T0 = (orreg_t)(temp >> 28);
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env->sprs[SPR_MACLO] = 0;
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env->sprs[SPR_MACLO] = 0;
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env->sprs[SPR_MACHI] = 0;
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env->sprs[SPR_MACHI] = 0;
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}
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}
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__or_dynop void glue(op_mac_imm, T)(void)
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__or_dynop void glue(op_mac_imm, T)(void)
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{
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{
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int64_t temp = env->sprs[SPR_MACLO] | ((int64_t)env->sprs[SPR_MACHI] << 32);
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int64_t temp = env->sprs[SPR_MACLO] | ((int64_t)env->sprs[SPR_MACHI] << 32);
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temp += (int64_t)T0 * (int64_t)OP_PARAM1;
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temp += (int64_t)T0 * (int64_t)OP_PARAM1;
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env->sprs[SPR_MACLO] = temp & 0xffffffff;
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env->sprs[SPR_MACLO] = temp & 0xffffffff;
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env->sprs[SPR_MACHI] = temp >> 32;
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env->sprs[SPR_MACHI] = temp >> 32;
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}
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}
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