/* eth.h -- Simulation of Ethernet MAC header
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/* eth.h -- Simulation of Ethernet MAC header
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Copyright (C) 2001 Erez Volk, erez@mailandnews.comopencores.org
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Copyright (C) 2001 Erez Volk, erez@mailandnews.comopencores.org
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Copyright (C) 2008 Embecosm Limited
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Copyright (C) 2008 Embecosm Limited
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Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
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This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify it
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This program is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the Free
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under the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3 of the License, or (at your option)
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Software Foundation; either version 3 of the License, or (at your option)
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any later version.
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any later version.
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This program is distributed in the hope that it will be useful, but WITHOUT
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This program is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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more details.
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You should have received a copy of the GNU General Public License along
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You should have received a copy of the GNU General Public License along
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with this program. If not, see <http://www.gnu.org/licenses/>. */
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with this program. If not, see <http://www.gnu.org/licenses/>. */
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/* This program is commented throughout in a fashion suitable for processing
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/* This program is commented throughout in a fashion suitable for processing
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with Doxygen. */
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with Doxygen. */
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#ifndef ETH__H
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#ifndef ETH__H
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#define ETH__H
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#define ETH__H
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#if HAVE_ETH_PHY
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#if HAVE_ETH_PHY
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#include <netpacket/packet.h>
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#include <netpacket/packet.h>
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#endif /* HAVE_ETH_PHY */
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#endif /* HAVE_ETH_PHY */
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#if HAVE_NET_ETHERNET_H
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#if HAVE_NET_ETHERNET_H
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# include <net/ethernet.h>
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# include <net/ethernet.h>
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#elif defined(HAVE_SYS_ETHERNET_H)
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#elif defined(HAVE_SYS_ETHERNET_H)
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# include <sys/ethernet.h>
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# include <sys/ethernet.h>
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#else /* !HAVE_NET_ETHERNET_H && !HAVE_SYS_ETHERNET_H - */
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#else /* !HAVE_NET_ETHERNET_H && !HAVE_SYS_ETHERNET_H - */
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#include <sys/types.h>
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#include <sys/types.h>
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#endif
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#endif
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/* Address space required by one Ethernet MAC */
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/* Address space required by one Ethernet MAC */
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#define ETH_ADDR_SPACE 0x1000
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#define ETH_ADDR_SPACE 0x1000
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/* Relative Register Addresses */
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/* Relative Register Addresses */
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#define ETH_MODER (4 * 0x00)
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#define ETH_MODER (4 * 0x00)
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#define ETH_INT_SOURCE (4 * 0x01)
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#define ETH_INT_SOURCE (4 * 0x01)
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#define ETH_INT_MASK (4 * 0x02)
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#define ETH_INT_MASK (4 * 0x02)
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#define ETH_IPGT (4 * 0x03)
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#define ETH_IPGT (4 * 0x03)
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#define ETH_IPGR1 (4 * 0x04)
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#define ETH_IPGR1 (4 * 0x04)
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#define ETH_IPGR2 (4 * 0x05)
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#define ETH_IPGR2 (4 * 0x05)
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#define ETH_PACKETLEN (4 * 0x06)
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#define ETH_PACKETLEN (4 * 0x06)
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#define ETH_COLLCONF (4 * 0x07)
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#define ETH_COLLCONF (4 * 0x07)
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#define ETH_TX_BD_NUM (4 * 0x08)
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#define ETH_TX_BD_NUM (4 * 0x08)
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#define ETH_CTRLMODER (4 * 0x09)
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#define ETH_CTRLMODER (4 * 0x09)
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#define ETH_MIIMODER (4 * 0x0A)
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#define ETH_MIIMODER (4 * 0x0A)
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#define ETH_MIICOMMAND (4 * 0x0B)
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#define ETH_MIICOMMAND (4 * 0x0B)
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#define ETH_MIIADDRESS (4 * 0x0C)
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#define ETH_MIIADDRESS (4 * 0x0C)
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#define ETH_MIITX_DATA (4 * 0x0D)
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#define ETH_MIITX_DATA (4 * 0x0D)
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#define ETH_MIIRX_DATA (4 * 0x0E)
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#define ETH_MIIRX_DATA (4 * 0x0E)
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#define ETH_MIISTATUS (4 * 0x0F)
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#define ETH_MIISTATUS (4 * 0x0F)
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#define ETH_MAC_ADDR0 (4 * 0x10)
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#define ETH_MAC_ADDR0 (4 * 0x10)
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#define ETH_MAC_ADDR1 (4 * 0x11)
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#define ETH_MAC_ADDR1 (4 * 0x11)
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#define ETH_HASH0 (4 * 0x12)
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#define ETH_HASH0 (4 * 0x12)
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#define ETH_HASH1 (4 * 0x13)
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#define ETH_HASH1 (4 * 0x13)
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/* Where BD's are stored */
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/* Where BD's are stored */
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#define ETH_BD_BASE 0x400
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#define ETH_BD_BASE 0x400
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#define ETH_BD_COUNT 0x100
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#define ETH_BD_COUNT 0x100
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#define ETH_BD_SPACE (4 * ETH_BD_COUNT)
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#define ETH_BD_SPACE (4 * ETH_BD_COUNT)
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/* Where to point DMA to transmit/receive */
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/* Where to point DMA to transmit/receive */
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#define ETH_DMA_RX_TX 0x800
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#define ETH_DMA_RX_TX 0x800
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/* Field definitions for MODER */
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/* Field definitions for MODER */
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#define ETH_MODER_DMAEN_OFFSET 17
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#define ETH_MODER_DMAEN_OFFSET 17
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#define ETH_MODER_RECSMALL_OFFSET 16
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#define ETH_MODER_RECSMALL_OFFSET 16
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#define ETH_MODER_PAD_OFFSET 15
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#define ETH_MODER_PAD_OFFSET 15
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#define ETH_MODER_HUGEN_OFFSET 14
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#define ETH_MODER_HUGEN_OFFSET 14
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#define ETH_MODER_CRCEN_OFFSET 13
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#define ETH_MODER_CRCEN_OFFSET 13
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#define ETH_MODER_DLYCRCEN_OFFSET 12
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#define ETH_MODER_DLYCRCEN_OFFSET 12
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#define ETH_MODER_RST_OFFSET 11
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#define ETH_MODER_RST_OFFSET 11
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#define ETH_MODER_FULLD_OFFSET 10
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#define ETH_MODER_FULLD_OFFSET 10
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#define ETH_MODER_EXDFREN_OFFSET 9
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#define ETH_MODER_EXDFREN_OFFSET 9
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#define ETH_MODER_NOBCKOF_OFFSET 8
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#define ETH_MODER_NOBCKOF_OFFSET 8
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#define ETH_MODER_LOOPBCK_OFFSET 7
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#define ETH_MODER_LOOPBCK_OFFSET 7
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#define ETH_MODER_IFG_OFFSET 6
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#define ETH_MODER_IFG_OFFSET 6
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#define ETH_MODER_PRO_OFFSET 5
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#define ETH_MODER_PRO_OFFSET 5
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#define ETH_MODER_IAM_OFFSET 4
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#define ETH_MODER_IAM_OFFSET 4
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#define ETH_MODER_BRO_OFFSET 3
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#define ETH_MODER_BRO_OFFSET 3
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#define ETH_MODER_NOPRE_OFFSET 2
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#define ETH_MODER_NOPRE_OFFSET 2
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#define ETH_MODER_TXEN_OFFSET 1
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#define ETH_MODER_TXEN_OFFSET 1
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#define ETH_MODER_RXEN_OFFSET 0
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#define ETH_MODER_RXEN_OFFSET 0
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/* Field definitions for INT_SOURCE */
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/* Field definitions for INT_SOURCE */
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#define ETH_INT_SOURCE_RXC_OFFSET 6
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#define ETH_INT_SOURCE_RXC_OFFSET 6
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#define ETH_INT_SOURCE_TXC_OFFSET 5
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#define ETH_INT_SOURCE_TXC_OFFSET 5
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#define ETH_INT_SOURCE_BUSY_OFFSET 4
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#define ETH_INT_SOURCE_BUSY_OFFSET 4
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#define ETH_INT_SOURCE_RXE_OFFSET 3
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#define ETH_INT_SOURCE_RXE_OFFSET 3
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#define ETH_INT_SOURCE_RXB_OFFSET 2
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#define ETH_INT_SOURCE_RXB_OFFSET 2
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#define ETH_INT_SOURCE_TXE_OFFSET 1
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#define ETH_INT_SOURCE_TXE_OFFSET 1
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#define ETH_INT_SOURCE_TXB_OFFSET 0
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#define ETH_INT_SOURCE_TXB_OFFSET 0
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/* Field definitions for INT_MASK */
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/* Field definitions for INT_MASK */
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#define ETH_INT_MASK_RXC_M_OFFSET 6
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#define ETH_INT_MASK_RXC_M_OFFSET 6
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#define ETH_INT_MASK_TXC_M_OFFSET 5
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#define ETH_INT_MASK_TXC_M_OFFSET 5
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#define ETH_INT_MASK_BUSY_M_OFFSET 4
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#define ETH_INT_MASK_BUSY_M_OFFSET 4
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#define ETH_INT_MASK_RXE_M_OFFSET 3
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#define ETH_INT_MASK_RXE_M_OFFSET 3
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#define ETH_INT_MASK_RXB_M_OFFSET 2
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#define ETH_INT_MASK_RXB_M_OFFSET 2
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#define ETH_INT_MASK_TXE_M_OFFSET 1
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#define ETH_INT_MASK_TXE_M_OFFSET 1
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#define ETH_INT_MASK_TXB_M_OFFSET 0
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#define ETH_INT_MASK_TXB_M_OFFSET 0
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/* Field definitions for PACKETLEN */
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/* Field definitions for PACKETLEN */
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#define ETH_PACKETLEN_MINFL_OFFSET 16
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#define ETH_PACKETLEN_MINFL_OFFSET 16
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#define ETH_PACKETLEN_MINFL_WIDTH 16
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#define ETH_PACKETLEN_MINFL_WIDTH 16
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#define ETH_PACKETLEN_MAXFL_OFFSET 0
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#define ETH_PACKETLEN_MAXFL_OFFSET 0
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#define ETH_PACKETLEN_MAXFL_WIDTH 16
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#define ETH_PACKETLEN_MAXFL_WIDTH 16
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/* Field definitions for COLLCONF */
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/* Field definitions for COLLCONF */
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#define ETH_COLLCONF_MAXRET_OFFSET 16
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#define ETH_COLLCONF_MAXRET_OFFSET 16
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#define ETH_COLLCONF_MAXRET_WIDTH 4
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#define ETH_COLLCONF_MAXRET_WIDTH 4
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#define ETH_COLLCONF_COLLVALID_OFFSET 0
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#define ETH_COLLCONF_COLLVALID_OFFSET 0
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#define ETH_COLLCONF_COLLVALID_WIDTH 6
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#define ETH_COLLCONF_COLLVALID_WIDTH 6
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/* Field definitions for CTRLMODER */
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/* Field definitions for CTRLMODER */
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#define ETH_CMODER_TXFLOW_OFFSET 2
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#define ETH_CMODER_TXFLOW_OFFSET 2
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#define ETH_CMODER_RXFLOW_OFFSET 1
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#define ETH_CMODER_RXFLOW_OFFSET 1
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#define ETH_CMODER_PASSALL_OFFSET 0
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#define ETH_CMODER_PASSALL_OFFSET 0
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/* Field definitions for MIIMODER */
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/* Field definitions for MIIMODER */
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#define ETH_MIIMODER_MRST_OFFSET 9
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#define ETH_MIIMODER_MRST_OFFSET 9
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#define ETH_MIIMODER_NOPRE_OFFSET 8
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#define ETH_MIIMODER_NOPRE_OFFSET 8
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#define ETH_MIIMODER_CLKDIV_OFFSET 0
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#define ETH_MIIMODER_CLKDIV_OFFSET 0
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#define ETH_MIIMODER_CLKDIV_WIDTH 8
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#define ETH_MIIMODER_CLKDIV_WIDTH 8
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/* Field definitions for MIICOMMAND */
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/* Field definitions for MIICOMMAND */
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#define ETH_MIICOMM_WCDATA_OFFSET 2
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#define ETH_MIICOMM_WCDATA_OFFSET 2
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#define ETH_MIICOMM_RSTAT_OFFSET 1
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#define ETH_MIICOMM_RSTAT_OFFSET 1
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#define ETH_MIICOMM_SCANS_OFFSET 0
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#define ETH_MIICOMM_SCANS_OFFSET 0
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/* Field definitions for MIIADDRESS */
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/* Field definitions for MIIADDRESS */
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#define ETH_MIIADDR_RGAD_OFFSET 8
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#define ETH_MIIADDR_RGAD_OFFSET 8
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#define ETH_MIIADDR_RGAD_WIDTH 5
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#define ETH_MIIADDR_RGAD_WIDTH 5
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#define ETH_MIIADDR_FIAD_OFFSET 0
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#define ETH_MIIADDR_FIAD_OFFSET 0
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#define ETH_MIIADDR_FIAD_WIDTH 5
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#define ETH_MIIADDR_FIAD_WIDTH 5
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/* Field definitions for MIISTATUS */
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/* Field definitions for MIISTATUS */
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#define ETH_MIISTAT_NVALID_OFFSET 1
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#define ETH_MIISTAT_NVALID_OFFSET 1
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#define ETH_MIISTAT_BUSY_OFFSET 1
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#define ETH_MIISTAT_BUSY_OFFSET 1
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#define ETH_MIISTAT_FAIL_OFFSET 0
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#define ETH_MIISTAT_FAIL_OFFSET 0
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/* Field definitions for TX buffer descriptors */
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/* Field definitions for TX buffer descriptors */
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#define ETH_TX_BD_LENGTH_OFFSET 16
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#define ETH_TX_BD_LENGTH_OFFSET 16
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#define ETH_TX_BD_LENGTH_WIDTH 16
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#define ETH_TX_BD_LENGTH_WIDTH 16
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#define ETH_TX_BD_READY_OFFSET 15
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#define ETH_TX_BD_READY_OFFSET 15
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#define ETH_TX_BD_IRQ_OFFSET 14
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#define ETH_TX_BD_IRQ_OFFSET 14
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#define ETH_TX_BD_WRAP_OFFSET 13
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#define ETH_TX_BD_WRAP_OFFSET 13
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#define ETH_TX_BD_PAD_OFFSET 12
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#define ETH_TX_BD_PAD_OFFSET 12
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#define ETH_TX_BD_CRC_OFFSET 11
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#define ETH_TX_BD_CRC_OFFSET 11
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#define ETH_TX_BD_LAST_OFFSET 10
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#define ETH_TX_BD_LAST_OFFSET 10
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#define ETH_TX_BD_PAUSE_OFFSET 9
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#define ETH_TX_BD_PAUSE_OFFSET 9
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#define ETH_TX_BD_UNDERRUN_OFFSET 8
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#define ETH_TX_BD_UNDERRUN_OFFSET 8
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#define ETH_TX_BD_RETRY_OFFSET 4
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#define ETH_TX_BD_RETRY_OFFSET 4
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#define ETH_TX_BD_RETRY_WIDTH 4
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#define ETH_TX_BD_RETRY_WIDTH 4
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#define ETH_TX_BD_RETRANSMIT_OFFSET 3
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#define ETH_TX_BD_RETRANSMIT_OFFSET 3
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#define ETH_TX_BD_COLLISION_OFFSET 2
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#define ETH_TX_BD_COLLISION_OFFSET 2
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#define ETH_TX_BD_DEFER_OFFSET 1
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#define ETH_TX_BD_DEFER_OFFSET 1
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#define ETH_TX_BD_NO_CARRIER_OFFSET 0
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#define ETH_TX_BD_NO_CARRIER_OFFSET 0
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/* Field definitions for RX buffer descriptors */
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/* Field definitions for RX buffer descriptors */
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#define ETH_RX_BD_LENGTH_OFFSET 16
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#define ETH_RX_BD_LENGTH_OFFSET 16
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#define ETH_RX_BD_LENGTH_WIDTH 16
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#define ETH_RX_BD_LENGTH_WIDTH 16
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#define ETH_RX_BD_READY_OFFSET 15
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#define ETH_RX_BD_READY_OFFSET 15
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#define ETH_RX_BD_IRQ_OFFSET 14
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#define ETH_RX_BD_IRQ_OFFSET 14
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#define ETH_RX_BD_WRAP_OFFSET 13
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#define ETH_RX_BD_WRAP_OFFSET 13
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#define ETH_RX_BD_MISS_OFFSET 7
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#define ETH_RX_BD_MISS_OFFSET 7
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#define ETH_RX_BD_UVERRUN_OFFSET 6
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#define ETH_RX_BD_UVERRUN_OFFSET 6
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#define ETH_RX_BD_INVALID_OFFSET 5
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#define ETH_RX_BD_INVALID_OFFSET 5
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#define ETH_RX_BD_DRIBBLE_OFFSET 4
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#define ETH_RX_BD_DRIBBLE_OFFSET 4
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#define ETH_RX_BD_TOOBIG_OFFSET 3
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#define ETH_RX_BD_TOOBIG_OFFSET 3
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#define ETH_RX_BD_TOOSHORT_OFFSET 2
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#define ETH_RX_BD_TOOSHORT_OFFSET 2
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#define ETH_RX_BD_CRC_OFFSET 1
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#define ETH_RX_BD_CRC_OFFSET 1
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#define ETH_RX_BD_COLLISION_OFFSET 0
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#define ETH_RX_BD_COLLISION_OFFSET 0
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/*
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/*
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* Ethernet protocol definitions
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* Ethernet protocol definitions
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*/
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*/
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#ifdef HAVE_NET_ETHERNET_H
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#ifdef HAVE_NET_ETHERNET_H
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#elif defined(HAVE_SYS_ETHERNET_H)
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#elif defined(HAVE_SYS_ETHERNET_H)
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#ifndef ETHER_ADDR_LEN
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#ifndef ETHER_ADDR_LEN
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#define ETHER_ADDR_LEN ETHERADDRL
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#define ETHER_ADDR_LEN ETHERADDRL
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#endif
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#endif
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#ifndef ETHER_HDR_LEN
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#ifndef ETHER_HDR_LEN
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#define ETHER_HDR_LEN sizeof(struct ether_header)
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#define ETHER_HDR_LEN sizeof(struct ether_header)
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#endif
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#endif
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#else /* !HAVE_NET_ETHERNET_H && !HAVE_SYS_ETHERNET_H - */
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#else /* !HAVE_NET_ETHERNET_H && !HAVE_SYS_ETHERNET_H - */
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#ifdef __CYGWIN__
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#ifdef __CYGWIN__
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/* define some missing cygwin defines.
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/* define some missing cygwin defines.
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*/
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*/
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#define ETH_HLEN 14
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#define ETH_HLEN 14
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#endif /* __CYGWIN__ */
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#endif /* __CYGWIN__ */
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#define ETH_ALEN 6
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#define ETH_ALEN 6
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struct ether_addr
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struct ether_addr
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{
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{
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u_int8_t ether_addr_octet[ETH_ALEN];
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u_int8_t ether_addr_octet[ETH_ALEN];
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};
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};
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struct ether_header
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struct ether_header
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{
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{
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u_int8_t ether_dhost[ETH_ALEN]; /* destination eth addr */
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u_int8_t ether_dhost[ETH_ALEN]; /* destination eth addr */
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u_int8_t ether_shost[ETH_ALEN]; /* source ether addr */
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u_int8_t ether_shost[ETH_ALEN]; /* source ether addr */
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u_int16_t ether_type; /* packet type ID field */
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u_int16_t ether_type; /* packet type ID field */
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};
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};
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/* Ethernet protocol ID's */
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/* Ethernet protocol ID's */
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#define ETHERTYPE_PUP 0x0200 /* Xerox PUP */
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#define ETHERTYPE_PUP 0x0200 /* Xerox PUP */
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#define ETHERTYPE_IP 0x0800 /* IP */
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#define ETHERTYPE_IP 0x0800 /* IP */
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#define ETHERTYPE_ARP 0x0806 /* Address resolution */
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#define ETHERTYPE_ARP 0x0806 /* Address resolution */
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#define ETHERTYPE_REVARP 0x8035 /* Reverse ARP */
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#define ETHERTYPE_REVARP 0x8035 /* Reverse ARP */
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#define ETHER_ADDR_LEN ETH_ALEN /* size of ethernet addr */
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#define ETHER_ADDR_LEN ETH_ALEN /* size of ethernet addr */
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#define ETHER_TYPE_LEN 2 /* bytes in type field */
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#define ETHER_TYPE_LEN 2 /* bytes in type field */
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#define ETHER_CRC_LEN 4 /* bytes in CRC field */
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#define ETHER_CRC_LEN 4 /* bytes in CRC field */
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#define ETHER_HDR_LEN ETH_HLEN /* total octets in header */
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#define ETHER_HDR_LEN ETH_HLEN /* total octets in header */
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#define ETHER_MIN_LEN (ETH_ZLEN + ETHER_CRC_LEN) /* min packet length */
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#define ETHER_MIN_LEN (ETH_ZLEN + ETHER_CRC_LEN) /* min packet length */
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#define ETHER_MAX_LEN (ETH_FRAME_LEN + ETHER_CRC_LEN) /* max packet length */
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#define ETHER_MAX_LEN (ETH_FRAME_LEN + ETHER_CRC_LEN) /* max packet length */
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/* make sure ethenet length is valid */
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/* make sure ethenet length is valid */
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#define ETHER_IS_VALID_LEN(foo) \
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#define ETHER_IS_VALID_LEN(foo) \
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((foo) >= ETHER_MIN_LEN && (foo) <= ETHER_MAX_LEN)
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((foo) >= ETHER_MIN_LEN && (foo) <= ETHER_MAX_LEN)
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/*
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/*
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* The ETHERTYPE_NTRAILER packet types starting at ETHERTYPE_TRAIL have
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* The ETHERTYPE_NTRAILER packet types starting at ETHERTYPE_TRAIL have
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* (type-ETHERTYPE_TRAIL)*512 bytes of data followed
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* (type-ETHERTYPE_TRAIL)*512 bytes of data followed
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* by an ETHER type (as given above) and then the (variable-length) header.
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* by an ETHER type (as given above) and then the (variable-length) header.
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*/
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*/
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#define ETHERTYPE_TRAIL 0x1000 /* Trailer packet */
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#define ETHERTYPE_TRAIL 0x1000 /* Trailer packet */
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#define ETHERTYPE_NTRAILER 16
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#define ETHERTYPE_NTRAILER 16
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#define ETHERMTU ETH_DATA_LEN
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#define ETHERMTU ETH_DATA_LEN
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#define ETHERMIN (ETHER_MIN_LEN-ETHER_HDR_LEN-ETHER_CRC_LEN)
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#define ETHERMIN (ETHER_MIN_LEN-ETHER_HDR_LEN-ETHER_CRC_LEN)
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#endif /* HAVE_NET_ETHERNET_H */
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#endif /* HAVE_NET_ETHERNET_H */
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/*
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/*
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* Implementatino of Ethernet MAC Registers and State
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* Implementatino of Ethernet MAC Registers and State
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*/
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*/
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#define ETH_TXSTATE_IDLE 0
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#define ETH_TXSTATE_IDLE 0
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#define ETH_TXSTATE_WAIT4BD 10
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#define ETH_TXSTATE_WAIT4BD 10
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#define ETH_TXSTATE_READFIFO 20
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#define ETH_TXSTATE_READFIFO 20
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#define ETH_TXSTATE_TRANSMIT 30
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#define ETH_TXSTATE_TRANSMIT 30
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#define ETH_RXSTATE_IDLE 0
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#define ETH_RXSTATE_IDLE 0
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#define ETH_RXSTATE_WAIT4BD 10
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#define ETH_RXSTATE_WAIT4BD 10
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#define ETH_RXSTATE_RECV 20
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#define ETH_RXSTATE_RECV 20
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#define ETH_RXSTATE_WRITEFIFO 30
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#define ETH_RXSTATE_WRITEFIFO 30
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#define ETH_RTX_FILE 0
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#define ETH_RTX_FILE 0
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#define ETH_RTX_SOCK 1
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#define ETH_RTX_SOCK 1
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#define ETH_RTX_VAPI 2
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#define ETH_RTX_VAPI 2
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#define ETH_MAXPL 0x10000
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#define ETH_MAXPL 0x10000
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enum
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enum
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{ ETH_VAPI_DATA = 0,
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{ ETH_VAPI_DATA = 0,
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ETH_VAPI_CTRL,
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ETH_VAPI_CTRL,
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ETH_NUM_VAPI_IDS
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ETH_NUM_VAPI_IDS
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};
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};
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/* Prototypes for external use */
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/* Prototypes for external use */
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extern void reg_ethernet_sec ();
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extern void reg_ethernet_sec ();
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#endif /* ETH__H */
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#endif /* ETH__H */
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