/* int-logger.c. Test of Or1ksim handling of interrupts
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/* int-logger.c. Test of Or1ksim handling of interrupts
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Copyright (C) 2010 Embecosm Limited
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Copyright (C) 2010 Embecosm Limited
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Contributors various OpenCores participants
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Contributors various OpenCores participants
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Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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This file is part of OpenRISC 1000 Architectural Simulator.
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This file is part of OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify it
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This program is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the Free
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under the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3 of the License, or (at your option)
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Software Foundation; either version 3 of the License, or (at your option)
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any later version.
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any later version.
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This program is distributed in the hope that it will be useful, but WITHOUT
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This program is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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more details.
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You should have received a copy of the GNU General Public License along
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You should have received a copy of the GNU General Public License along
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with this program. If not, see <http: www.gnu.org/licenses/>. */
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with this program. If not, see <http: www.gnu.org/licenses/>. */
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/* ----------------------------------------------------------------------------
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/* ----------------------------------------------------------------------------
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This code is commented throughout for use with Doxygen.
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This code is commented throughout for use with Doxygen.
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--------------------------------------------------------------------------*/
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--------------------------------------------------------------------------*/
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#include "support.h"
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#include "support.h"
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#include "spr-defs.h"
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#include "spr-defs.h"
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#include "board.h"
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#include "board.h"
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/* --------------------------------------------------------------------------*/
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/* --------------------------------------------------------------------------*/
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/*!Write a memory mapped register
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/*!Write a memory mapped register
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@param[in] addr Memory mapped address
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@param[in] addr Memory mapped address
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@param[in] value Value to set */
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@param[in] value Value to set */
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/* --------------------------------------------------------------------------*/
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/* --------------------------------------------------------------------------*/
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static void
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static void
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setreg (unsigned long addr,
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setreg (unsigned long addr,
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unsigned char value)
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unsigned char value)
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{
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{
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*((volatile unsigned char *) addr) = value;
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*((volatile unsigned char *) addr) = value;
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} /* setreg () */
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} /* setreg () */
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/* --------------------------------------------------------------------------*/
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/* --------------------------------------------------------------------------*/
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/*!Read a memory mapped register
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/*!Read a memory mapped register
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@param[in] addr Memory mapped address
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@param[in] addr Memory mapped address
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@return Value read */
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@return Value read */
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/* --------------------------------------------------------------------------*/
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/* --------------------------------------------------------------------------*/
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unsigned long
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unsigned long
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getreg (unsigned long addr)
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getreg (unsigned long addr)
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{
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{
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return *((volatile unsigned char *) addr);
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return *((volatile unsigned char *) addr);
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} /* getreg () */
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} /* getreg () */
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/* --------------------------------------------------------------------------*/
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/* --------------------------------------------------------------------------*/
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/*!Count the number of ones in a register
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/*!Count the number of ones in a register
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SIMD Within A Register (SWAR) algorithm from Aggregate Magic Algorithms
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SIMD Within A Register (SWAR) algorithm from Aggregate Magic Algorithms
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(http://aggregate.org/MAGIC/) from the University of Kentucky.
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(http://aggregate.org/MAGIC/) from the University of Kentucky.
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32-bit recursive reduction using SWAR. First step is mapping 2-bit
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32-bit recursive reduction using SWAR. First step is mapping 2-bit
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values into sum of 2 1-bit values in sneaky way.
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values into sum of 2 1-bit values in sneaky way.
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@param[in] x The 32-bit register whose bits are to be counted.
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@param[in] x The 32-bit register whose bits are to be counted.
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@return The number of bits that are set to 1. */
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@return The number of bits that are set to 1. */
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/* --------------------------------------------------------------------------*/
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/* --------------------------------------------------------------------------*/
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static int
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static int
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ones32 (unsigned long int x)
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ones32 (unsigned long int x)
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{
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{
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x -= ((x >> 1) & 0x55555555);
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x -= ((x >> 1) & 0x55555555);
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x = (((x >> 2) & 0x33333333) + (x & 0x33333333));
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x = (((x >> 2) & 0x33333333) + (x & 0x33333333));
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x = (((x >> 4) + x) & 0x0f0f0f0f);
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x = (((x >> 4) + x) & 0x0f0f0f0f);
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x += (x >> 8);
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x += (x >> 8);
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x += (x >> 16);
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x += (x >> 16);
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return (x & 0x0000003f);
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return (x & 0x0000003f);
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} /* ones32 () */
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} /* ones32 () */
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/* --------------------------------------------------------------------------*/
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/* --------------------------------------------------------------------------*/
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/*!Count the number of ones in a register
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/*!Count the number of ones in a register
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SIMD Within A Register (SWAR) algorithm from Aggregate Magic Algorithms
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SIMD Within A Register (SWAR) algorithm from Aggregate Magic Algorithms
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(http://aggregate.org/MAGIC/) from the University of Kentucky.
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(http://aggregate.org/MAGIC/) from the University of Kentucky.
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Compute the log to base 2 of a supplied numger. In this case we know it will
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Compute the log to base 2 of a supplied numger. In this case we know it will
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be an exact power of 2. We return -1 if asked for log (0).
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be an exact power of 2. We return -1 if asked for log (0).
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@param[in] x The 32-bit register whose log to base 2 we want.
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@param[in] x The 32-bit register whose log to base 2 we want.
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@return The log to base 2 of the argument, or -1 if the argument was
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@return The log to base 2 of the argument, or -1 if the argument was
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zero. */
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zero. */
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/* --------------------------------------------------------------------------*/
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/* --------------------------------------------------------------------------*/
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static int
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static int
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int_log2 (unsigned int x)
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int_log2 (unsigned int x)
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{
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{
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x |= (x >> 1);
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x |= (x >> 1);
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x |= (x >> 2);
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x |= (x >> 2);
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x |= (x >> 4);
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x |= (x >> 4);
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x |= (x >> 8);
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x |= (x >> 8);
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x |= (x >> 16);
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x |= (x >> 16);
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return ones32 (x) - 1;
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return ones32 (x) - 1;
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} /* int_log2 () */
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} /* int_log2 () */
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/* --------------------------------------------------------------------------*/
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/* --------------------------------------------------------------------------*/
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/*!Generic interrupt handler
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/*!Generic interrupt handler
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This should receive the interrupt exception. Report the value in PICSR.
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This should receive the interrupt exception. Report the value in PICSR.
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Potentially PICSR has multiple bits set, so we report the least significant
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Potentially PICSR has multiple bits set, so we report the least significant
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bit. This is consistent with an approach which gives highest priority to
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bit. This is consistent with an approach which gives highest priority to
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any NMI lines (0 or 1).
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any NMI lines (0 or 1).
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It is up to the external agent to clear the interrupt. We prompt it by
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It is up to the external agent to clear the interrupt. We prompt it by
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writing the number of the interrupt we have just received. */
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writing the number of the interrupt we have just received. */
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/* --------------------------------------------------------------------------*/
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/* --------------------------------------------------------------------------*/
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static void
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static void
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interrupt_handler ()
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interrupt_handler ()
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{
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{
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unsigned long int picsr = mfspr (SPR_PICSR);
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unsigned long int picsr = mfspr (SPR_PICSR);
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printf ("PICSR = 0x%08lx\n", picsr);
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printf ("PICSR = 0x%08lx\n", picsr);
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setreg (GENERIC_BASE, int_log2 (picsr & -picsr));
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setreg (GENERIC_BASE, int_log2 (picsr & -picsr));
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} /* interrupt_handler () */
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} /* interrupt_handler () */
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/* --------------------------------------------------------------------------*/
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/* --------------------------------------------------------------------------*/
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/*!Main program to set up interrupt handler
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/*!Main program to set up interrupt handler
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We make a series of read upcalls, after 500 us and then every 1000us, which
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We make a series of read upcalls, after 500 us and then every 1000us, which
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prompt some interrupts being set and cleared. By doing this, our upcalls
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prompt some interrupts being set and cleared. By doing this, our upcalls
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should always be well clear of any calling function interrupt generation,
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should always be well clear of any calling function interrupt generation,
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which is on millisecond boundaries.
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which is on millisecond boundaries.
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A read upcall is a request to trigger an interrupt. We will subsequently
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A read upcall is a request to trigger an interrupt. We will subsequently
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use a write upcall in the interrupt handler to request clearing of the
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use a write upcall in the interrupt handler to request clearing of the
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interrupt.
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interrupt.
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@return The return code from the program (always zero). */
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@return The return code from the program (always zero). */
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/* --------------------------------------------------------------------------*/
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/* --------------------------------------------------------------------------*/
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int
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int
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main ()
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main ()
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{
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{
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printf ("Starting interrupt handler\n");
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printf ("Starting interrupt handler\n");
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excpt_int = (unsigned long)interrupt_handler;
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excpt_int = (unsigned long)interrupt_handler;
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/* Enable interrupts */
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/* Enable interrupts */
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printf ("Enabling interrupts.\n");
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printf ("Enabling interrupts.\n");
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mtspr (SPR_SR, mfspr(SPR_SR) | SPR_SR_IEE);
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mtspr (SPR_SR, mfspr(SPR_SR) | SPR_SR_IEE);
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mtspr (SPR_PICMR, 0xffffffff);
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mtspr (SPR_PICMR, 0xffffffff);
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/* Loop forever, upcalling at the desired intervals. */
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/* Loop forever, upcalling at the desired intervals. */
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unsigned long int start = read_timer ();
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unsigned long int start = read_timer ();
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while (1)
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while (1)
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{
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{
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static long int end_time = 500;
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static long int end_time = 500;
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while ((read_timer () - start) < end_time)
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while ((read_timer () - start) < end_time)
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{
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{
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}
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}
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/* Read to request an interrupt */
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/* Read to request an interrupt */
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(void)getreg (GENERIC_BASE);
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(void)getreg (GENERIC_BASE);
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/* Wait 1000us before next upcall. */
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/* Wait 1000us before next upcall. */
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end_time += 1000;
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end_time += 1000;
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}
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}
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/* We don't actually ever return */
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/* We don't actually ever return */
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return 0;
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return 0;
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} /* main () */
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} /* main () */
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