/* This file is part of test microkernel for OpenRISC 1000. */
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/* This file is part of test microkernel for OpenRISC 1000. */
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/* (C) 2001 Simon Srot, srot@opencores.org */
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/* (C) 2001 Simon Srot, srot@opencores.org */
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#include "common.h"
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#include "common.h"
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#include "support.h"
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#include "support.h"
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#include "spr-defs.h"
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#include "spr-defs.h"
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#include "int.h"
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#include "int.h"
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#ifdef OR1K
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#ifdef OR1K
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/* Interrupt handlers table */
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/* Interrupt handlers table */
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struct ihnd int_handlers[MAX_INT_HANDLERS];
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struct ihnd int_handlers[MAX_INT_HANDLERS];
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/* Initialize routine */
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/* Initialize routine */
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int int_init()
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int int_init()
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{
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{
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int i;
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int i;
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for(i = 0; i < MAX_INT_HANDLERS; i++) {
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for(i = 0; i < MAX_INT_HANDLERS; i++) {
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int_handlers[i].handler = 0;
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int_handlers[i].handler = 0;
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}
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}
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return 0;
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return 0;
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}
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}
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/* Add interrupt handler */
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/* Add interrupt handler */
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int int_add(unsigned long vect, void (* handler)(void))
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int int_add(unsigned long vect, void (* handler)(void))
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{
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{
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if(vect >= MAX_INT_HANDLERS) return -1;
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if(vect >= MAX_INT_HANDLERS) return -1;
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int_handlers[vect].handler = handler;
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int_handlers[vect].handler = handler;
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debug ("int_add %i: %08lx\n", vect, int_handlers[vect].handler);
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debug ("int_add %i: %08lx\n", vect, int_handlers[vect].handler);
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mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << vect));
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mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << vect));
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return 0;
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return 0;
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}
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}
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/* Disable interrupt */
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/* Disable interrupt */
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int int_disable(unsigned long vect)
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int int_disable(unsigned long vect)
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{
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{
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if(vect >= MAX_INT_HANDLERS) return -1;
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if(vect >= MAX_INT_HANDLERS) return -1;
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mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(0x00000001L << vect));
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mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(0x00000001L << vect));
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return 0;
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return 0;
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}
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}
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/* Enable interrupt */
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/* Enable interrupt */
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int int_enable(unsigned long vect)
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int int_enable(unsigned long vect)
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{
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{
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if(vect >= MAX_INT_HANDLERS) return -1;
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if(vect >= MAX_INT_HANDLERS) return -1;
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mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << vect));
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mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << vect));
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return 0;
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return 0;
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}
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}
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/* Main interrupt handler */
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/* Main interrupt handler */
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void int_main(void)
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void int_main(void)
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{
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{
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unsigned long picsr = mfspr(SPR_PICSR);
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unsigned long picsr = mfspr(SPR_PICSR);
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unsigned long i = 0;
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unsigned long i = 0;
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mtspr(SPR_PICSR, 0);
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mtspr(SPR_PICSR, 0);
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//printf ("int :%08lx\n", picsr);
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//printf ("int :%08lx\n", picsr);
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while(i < 32) {
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while(i < 32) {
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if((picsr & (0x01L << i)) && (int_handlers[i].handler != 0)) {
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if((picsr & (0x01L << i)) && (int_handlers[i].handler != 0)) {
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(*int_handlers[i].handler)();
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(*int_handlers[i].handler)();
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mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(0x00000001L << i));
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mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(0x00000001L << i));
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}
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}
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i++;
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i++;
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}
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}
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}
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}
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void
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void
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int_error(int vect)
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int_error(int vect, unsigned long epcr)
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{
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{
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printf("\n\nERROR - ");
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printf("\n\nERROR - ");
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switch(vect)
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switch(vect)
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{
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{
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case 2:
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case 2:
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printf("BUS ERROR (0x200)\n");
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printf("BUS ERROR (0x200)\n");
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break;
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break;
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case 6:
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case 6:
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printf("ALIGN ERROR (0x600)\n");
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printf("ALIGN ERROR (0x600)\n");
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break;
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break;
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case 7:
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case 7:
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printf("ILLEGAL INSN ERROR (0x700)\n");
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printf("ILLEGAL INSN ERROR (0x700)\n");
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break;
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break;
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default:
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default:
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printf("UNKNOWN ERROR (%d)\n",vect);
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printf("UNKNOWN ERROR (%d)\n",vect);
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break;
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break;
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}
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}
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printf("EPCR: 0x%.8x\n",epcr);
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printf("\n");
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printf("\n");
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// TODO - print some more diagnostics here
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// TODO - print some more diagnostics here
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printf("Attemping to reset...\n\n");
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printf("Attemping to reset...\n\n");
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asm volatile("l.ori r3, r0, 0x100");
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asm volatile("l.ori r3, r0, 0x100");
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asm volatile("l.jr r3");
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asm volatile("l.jr r3");
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asm volatile("l.nop");
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asm volatile("l.nop");
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// Stay here forever.
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// Stay here forever.
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//while(1);
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//while(1);
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}
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}
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#endif
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#endif
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