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[/] [openrisc/] [trunk/] [bootloaders/] [orpmon/] [flash.ld] - Diff between revs 353 and 467

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Rev 353 Rev 467
MEMORY
MEMORY
        {
        {
        flash   : ORIGIN = 0xf0000000, LENGTH = 0x04000000
        flash   : ORIGIN = 0xf0000000, LENGTH = 0x04000000
        vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000
        vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000
        ram     : ORIGIN = 0x00002000, LENGTH = 0x04000000 - 0x00002000
        ram     : ORIGIN = 0x00002000, LENGTH = 0x04000000 - 0x00002000
        }
        }
SECTIONS
SECTIONS
{
{
        .reset :
        .reset :
        {
        {
        *(.crc)
        *(.crc)
        *(.reset)
        *(.reset)
        } > flash
        } > flash
        .text ALIGN(0x04):
        .text ALIGN(0x04):
        {
        {
        *(.text)
        *(.text)
        } > flash
        } > flash
        .rodata :
        .rodata :
        {
        {
        *(.rodata)
        *(.rodata)
        *(.rodata.*)
        *(.rodata.*)
        } > flash
        } > flash
        .monitor ALIGN(0x40000) :
        .monitor ALIGN(0x40000) :
        {
        {
        *(.monitor)
        *(.monitor)
        } > flash
        } > flash
        . += 0x100000;
        . += 0x100000;
        .config ALIGN(0x40000) :
        .config ALIGN(0x40000) :
        {
        {
        _config_end = .;
        _config_end = .;
        *(.config)
        *(.config)
        } > flash
        } > flash
        .dummy ALIGN(0x40000):
        .dummy ALIGN(0x40000):
        {
        {
        _src_beg = .;
        _src_beg = .;
        } > flash
        } > flash
        .vectors :
        .vectors :
        AT ( ADDR (.dummy) )
        AT ( ADDR (.dummy) )
        {
        {
        _vec_start = .;
        _vec_start = .;
        *(.vectors)
        *(.vectors)
        _vec_end = .;
        _vec_end = .;
        } > vectors
        } > vectors
        .data :
        .data :
        AT ( ADDR (.dummy) + SIZEOF (.vectors) )
        AT ( ADDR (.dummy) + SIZEOF (.vectors) )
        {
        {
        _dst_beg = .;
        _dst_beg = .;
        *(.data)
        *(.data)
        _dst_end = .;
        _dst_end = .;
        } > ram
        } > ram
        .bss :
        .bss :
        {
        {
        *(.bss)
        *(.bss)
        } > ram
        } > ram
        .stack :
        .stack :
        {
        {
        *(.stack)
        *(.stack)
 
        _stack_top = .;
        } > ram
        } > ram
        .mytext :
        .mytext :
        {
        {
        _fprog_addr = .;
        _fprog_addr = .;
        *(.mytext)
        *(.mytext)
        . += 0x500;
        . += 0x500;
        _src_addr = .;
        _src_addr = .;
        } > ram
        } > ram
}
}
 
 

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