|
|
|
|
MEMORY
|
MEMORY
|
{
|
{
|
vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000
|
vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000
|
/* Use all RAM */
|
/* Use all RAM */
|
/* Put all sections into ram */
|
/* Put all sections into ram */
|
/*
|
|
ram : ORIGIN = 0x00002000, LENGTH = 0x02000000 - 0x00002000
|
ram : ORIGIN = 0x00002000, LENGTH = 0x02000000 - 0x00002000
|
*/
|
|
/* Uncomment the following to work around bad pages in a flash mem */
|
/* Uncomment the following to work around bad pages in a flash mem */
|
/* Put all sections except data, rodata into ram2 */
|
/* Put all sections except data, rodata into ram2 */
|
/* On ORSoC dev board devices, for pages 132-134 (256Byte pages) */
|
/* On ORSoC dev board devices, for pages 132-134 (256Byte pages) */
|
|
/*
|
ram : ORIGIN = 0x00001200, LENGTH = 0x8400 - 0x1200
|
ram : ORIGIN = 0x00001200, LENGTH = 0x8400 - 0x1200
|
ram2 : ORIGIN = 0x8700, LENGTH = 0x02000000 - 0x8700
|
ram2 : ORIGIN = 0x8700, LENGTH = 0x02000000 - 0x8700
|
|
*/
|
/* Uncomment the following to work around bad pages in a flash mem */
|
/* Uncomment the following to work around bad pages in a flash mem */
|
/* Put all sections except data, rodata into ram2 */
|
/* Put all sections except data, rodata into ram2 */
|
/* On ORSoC dev board devices, for pages 180-182 (256Byte pages) */
|
/* On ORSoC dev board devices, for pages 180-182 (256Byte pages) */
|
/*
|
/*
|
ram : ORIGIN = 0x00001200, LENGTH = 0xB400 - 0x1200
|
ram : ORIGIN = 0x00001200, LENGTH = 0xB400 - 0x1200
|
ram2 : ORIGIN = 0xb700, LENGTH = 0x02000000 - 0xb700
|
ram2 : ORIGIN = 0xb700, LENGTH = 0x02000000 - 0xb700
|
*/
|
*/
|
/*flash : ORIGIN = 0xf0000000, LENGTH = 0x04000000*/
|
/*flash : ORIGIN = 0xf0000000, LENGTH = 0x04000000*/
|
}
|
}
|
|
|
|
|
|
|
SECTIONS
|
SECTIONS
|
{
|
{
|
.vectors :
|
.vectors :
|
{
|
{
|
*(.crc)
|
*(.crc)
|
*(.vectors)
|
*(.vectors)
|
} > vectors
|
} > vectors
|
|
|
.text :
|
.text :
|
{
|
{
|
_text_begin = .;
|
_text_begin = .;
|
*(.text)
|
*(.text)
|
_text_end = .;
|
_text_end = .;
|
} > ram2
|
} > ram
|
|
/* } > ram2*/
|
|
|
.data :
|
.data :
|
/* AT ( ADDR (.text) + SIZEOF(.text) + SIZEOF(.mytext))*/
|
/* AT ( ADDR (.text) + SIZEOF(.text) + SIZEOF(.mytext))*/
|
{
|
{
|
*(.data)
|
*(.data)
|
} > ram
|
} > ram
|
|
|
.rodata :
|
.rodata :
|
{
|
{
|
*(.rodata)
|
*(.rodata)
|
*(.rodata.*)
|
*(.rodata.*)
|
} > ram
|
} > ram
|
|
|
.bss :
|
.bss :
|
{
|
{
|
*(.bss)
|
*(.bss)
|
} > ram2
|
} > ram
|
|
/* } > ram2 */
|
|
|
.stack :
|
.stack :
|
{
|
{
|
*(.stack)
|
*(.stack)
|
_src_addr = .;
|
_src_addr = .;
|
} > ram2
|
} > ram
|
|
/* } > ram2 */
|
/*
|
/*
|
.monitor :
|
.monitor :
|
{
|
{
|
*(.monitor)
|
*(.monitor)
|
} > ram
|
} > ram
|
*/
|
*/
|
|
|
/*
|
/*
|
. += 0x100000;
|
. += 0x100000;
|
|
|
// This section was in cmds/load.c, but we don't need it -jb
|
// This section was in cmds/load.c, but we don't need it -jb
|
.config :
|
.config :
|
{
|
{
|
_cfg_start = .;
|
_cfg_start = .;
|
*(.config)
|
*(.config)
|
_cfg_end = .;
|
_cfg_end = .;
|
} > ram
|
} > ram
|
*/
|
*/
|
/*
|
/*
|
. = 0xf0000100;
|
. = 0xf0000100;
|
|
|
.monitor ALIGN(0x40000) :
|
.monitor ALIGN(0x40000) :
|
{
|
{
|
*(.monitor)
|
*(.monitor)
|
} > flash
|
} > flash
|
|
|
. += 0x100000;
|
. += 0x100000;
|
|
|
.config ALIGN(0x40000) :
|
.config ALIGN(0x40000) :
|
{
|
{
|
_cfg_start = .;
|
_cfg_start = .;
|
*(.config)
|
*(.config)
|
_cfg_end = .;
|
_cfg_end = .;
|
} > flash
|
} > flash
|
*/
|
*/
|
}
|
}
|
|
|
