; Morpho Technologies MT Arch description. -*- Scheme -*-
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; Morpho Technologies MT Arch description. -*- Scheme -*-
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; Copyright 2001, 2007 Free Software Foundation, Inc.
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; Copyright 2001, 2007 Free Software Foundation, Inc.
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;
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;
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; Contributed by Red Hat Inc; developed under contract from
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; Contributed by Red Hat Inc; developed under contract from
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; Morpho Technologies.
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; Morpho Technologies.
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;
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;
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; This file is part of the GNU Binutils.
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; This file is part of the GNU Binutils.
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;
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;
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; This program is free software; you can redistribute it and/or modify
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; This program is free software; you can redistribute it and/or modify
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; it under the terms of the GNU General Public License as published by
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; it under the terms of the GNU General Public License as published by
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; the Free Software Foundation; either version 3 of the License, or
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; the Free Software Foundation; either version 3 of the License, or
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; (at your option) any later version.
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; (at your option) any later version.
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;
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;
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; This program is distributed in the hope that it will be useful,
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; This program is distributed in the hope that it will be useful,
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; but WITHOUT ANY WARRANTY; without even the implied warranty of
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; but WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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; GNU General Public License for more details.
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; GNU General Public License for more details.
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;
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;
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; You should have received a copy of the GNU General Public License
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; You should have received a copy of the GNU General Public License
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; along with this program; if not, write to the Free Software
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; along with this program; if not, write to the Free Software
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; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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; MA 02110-1301, USA.
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; MA 02110-1301, USA.
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(include "simplify.inc")
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(include "simplify.inc")
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; Define The Architecture, Attributes, ISA, CPU, Machine, And Model. ;;
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;; Define The Architecture, Attributes, ISA, CPU, Machine, And Model. ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; define-arch must appear first
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; define-arch must appear first
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(define-arch
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(define-arch
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(name mt) ; name of cpu family
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(name mt) ; name of cpu family
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(comment "Morpho Technologies mRISC family")
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(comment "Morpho Technologies mRISC family")
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(default-alignment aligned)
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(default-alignment aligned)
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(insn-lsb0? #t)
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(insn-lsb0? #t)
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(machs ms1 ms1-003 ms2)
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(machs ms1 ms1-003 ms2)
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(isas mt)
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(isas mt)
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)
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)
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; Instruction set parameters.
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; Instruction set parameters.
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(define-isa
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(define-isa
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(name mt)
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(name mt)
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(comment "Morpho Technologies MT ISA")
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(comment "Morpho Technologies MT ISA")
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(default-insn-word-bitsize 32)
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(default-insn-word-bitsize 32)
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(default-insn-bitsize 32)
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(default-insn-bitsize 32)
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(base-insn-bitsize 32)
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(base-insn-bitsize 32)
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(parallel-insns 2)
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(parallel-insns 2)
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)
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)
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; Cpu family definitions.
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; Cpu family definitions.
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(define-cpu
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(define-cpu
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; cpu names must be distinct from the architecture name and machine names.
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; cpu names must be distinct from the architecture name and machine names.
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(name ms1bf)
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(name ms1bf)
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(comment "Morpho Technologies mRISC family")
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(comment "Morpho Technologies mRISC family")
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(endian big)
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(endian big)
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(word-bitsize 32)
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(word-bitsize 32)
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)
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)
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(define-cpu
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(define-cpu
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; cpu names must be distinct from the architecture name and machine names.
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; cpu names must be distinct from the architecture name and machine names.
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(name ms1-003bf)
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(name ms1-003bf)
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(comment "Morpho Technologies mRISC family")
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(comment "Morpho Technologies mRISC family")
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(endian big)
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(endian big)
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(word-bitsize 32)
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(word-bitsize 32)
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)
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)
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(define-cpu
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(define-cpu
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; cpu names must be distinct from the architecture name and machine names.
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; cpu names must be distinct from the architecture name and machine names.
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(name ms2bf)
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(name ms2bf)
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(comment "Morpho Technologies mRISC family")
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(comment "Morpho Technologies mRISC family")
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(endian big)
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(endian big)
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(word-bitsize 32)
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(word-bitsize 32)
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)
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)
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(define-mach
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(define-mach
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(name ms1)
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(name ms1)
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(comment "Morpho Technologies mrisc")
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(comment "Morpho Technologies mrisc")
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(cpu ms1bf)
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(cpu ms1bf)
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(isas mt)
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(isas mt)
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)
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)
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(define-mach
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(define-mach
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(name ms1-003)
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(name ms1-003)
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(comment "Morpho Technologies mrisc")
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(comment "Morpho Technologies mrisc")
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(cpu ms1-003bf)
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(cpu ms1-003bf)
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(isas mt)
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(isas mt)
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)
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)
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(define-mach
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(define-mach
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(name ms2)
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(name ms2)
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(comment "Morpho Technologies ms2")
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(comment "Morpho Technologies ms2")
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(cpu ms2bf)
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(cpu ms2bf)
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(isas mt)
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(isas mt)
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)
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)
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; Model descriptions.
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; Model descriptions.
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; Can probably take the u-exec out. We'll see.
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; Can probably take the u-exec out. We'll see.
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(define-model
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(define-model
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(name ms1)
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(name ms1)
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(comment "Morpho Technologies mrisc")
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(comment "Morpho Technologies mrisc")
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(mach ms1)
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(mach ms1)
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(unit u-exec "Execution Unit" ()
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(unit u-exec "Execution Unit" ()
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1 1 ; issue done
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1 1 ; issue done
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() ; state
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() ; state
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() ; inputs
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() ; inputs
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() ; outputs
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() ; outputs
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() ; profile action (default)
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() ; profile action (default)
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)
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)
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)
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)
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(define-model
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(define-model
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(name ms1-003)
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(name ms1-003)
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(comment "Morpho Technologies mrisc")
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(comment "Morpho Technologies mrisc")
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(mach ms1-003)
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(mach ms1-003)
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(unit u-exec "Execution Unit" ()
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(unit u-exec "Execution Unit" ()
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1 1 ; issue done
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1 1 ; issue done
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() ; state
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() ; state
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() ; inputs
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() ; inputs
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() ; outputs
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() ; outputs
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() ; profile action (default)
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() ; profile action (default)
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)
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)
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)
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)
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(define-model
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(define-model
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(name ms2)
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(name ms2)
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(comment "Morpho Technologies ms2")
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(comment "Morpho Technologies ms2")
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(mach ms2)
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(mach ms2)
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(unit u-exec "Execution Unit" ()
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(unit u-exec "Execution Unit" ()
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1 1 ; issue done
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1 1 ; issue done
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() ; state
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() ; state
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() ; inputs
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() ; inputs
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() ; outputs
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() ; outputs
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() ; profile action (default)
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() ; profile action (default)
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)
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)
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)
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)
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; FIXME: It might simplify things to separate the execute process from the
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; FIXME: It might simplify things to separate the execute process from the
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; one that updates the PC.
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; one that updates the PC.
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;;;;;;;;;;;;;;;;;;;;;;;;
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;;;;;;;;;;;;;;;;;;;;;;;;
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;; Instruction Fields ;;
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;; Instruction Fields ;;
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;;;;;;;;;;;;;;;;;;;;;;;;
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;;;;;;;;;;;;;;;;;;;;;;;;
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; Attributes:
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; Attributes:
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; PCREL-ADDR: pc relative value (for reloc and disassembly purposes)
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; PCREL-ADDR: pc relative value (for reloc and disassembly purposes)
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; ABS-ADDR: absolute address (for reloc and disassembly purposes?)
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; ABS-ADDR: absolute address (for reloc and disassembly purposes?)
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; RESERVED: bits are not used to decode insn, must be all 0
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; RESERVED: bits are not used to decode insn, must be all 0
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; RELOC: there is a relocation associated with this field (experiment)
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; RELOC: there is a relocation associated with this field (experiment)
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;
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;
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; f-msys: Identify a a morphosys insns. 1 if msys, 0 if not.
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; f-msys: Identify a a morphosys insns. 1 if msys, 0 if not.
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; f-opc: 6 bit opcode for non-morphosys instructions.
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; f-opc: 6 bit opcode for non-morphosys instructions.
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; f-msopc: 6 bit opcode for morphosys instructions.
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; f-msopc: 6 bit opcode for morphosys instructions.
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; f-imm: flag to indicate use of an immediate operand. 1 if yes, 0 if no.
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; f-imm: flag to indicate use of an immediate operand. 1 if yes, 0 if no.
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; f-sr1: source resgister 1. (also used for MSYS insns)
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; f-sr1: source resgister 1. (also used for MSYS insns)
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; f-sr2: source register 2. (also used for MSYS insns)
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; f-sr2: source register 2. (also used for MSYS insns)
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; f-dr: destination register when located in bits 19:16.
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; f-dr: destination register when located in bits 19:16.
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; f-drrr: destination register when located in bits 15:12. (also for MSYS insns)
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; f-drrr: destination register when located in bits 15:12. (also for MSYS insns)
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; f-imm16: 16 bit immediate value when not an offset.
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; f-imm16: 16 bit immediate value when not an offset.
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; f-imm16a: 16 bit immediate value when it's a pc-rel offset.
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; f-imm16a: 16 bit immediate value when it's a pc-rel offset.
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; f-uu4a: unused 4 bit field.
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; f-uu4a: unused 4 bit field.
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; f-uu4b: second unsed 4 bit field.
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; f-uu4b: second unsed 4 bit field.
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; f-uu1: unused 1 bit field
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; f-uu1: unused 1 bit field
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; f-uu12: unused 12 bit field.
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; f-uu12: unused 12 bit field.
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; f-uu16: unused 16 bit field.
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; f-uu16: unused 16 bit field.
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; f-uu24: unused 24 bit field.
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; f-uu24: unused 24 bit field.
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(dnf f-msys "morphosys insn flag" () 31 1)
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(dnf f-msys "morphosys insn flag" () 31 1)
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(dnf f-opc "opcode field" () 30 6)
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(dnf f-opc "opcode field" () 30 6)
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(dnf f-imm "immedate flag" () 24 1)
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(dnf f-imm "immedate flag" () 24 1)
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(dnf f-uu24 "unused 24 bits" () 23 24)
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(dnf f-uu24 "unused 24 bits" () 23 24)
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(dnf f-sr1 "sr1 register field" (ABS-ADDR) 23 4)
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(dnf f-sr1 "sr1 register field" (ABS-ADDR) 23 4)
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(dnf f-sr2 "sr2 register field" (ABS-ADDR) 19 4)
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(dnf f-sr2 "sr2 register field" (ABS-ADDR) 19 4)
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(dnf f-dr "dr register field" (ABS-ADDR) 19 4)
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(dnf f-dr "dr register field" (ABS-ADDR) 19 4)
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(dnf f-drrr "drrr register field" (ABS-ADDR) 15 4)
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(dnf f-drrr "drrr register field" (ABS-ADDR) 15 4)
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(dnf f-imm16u "unsigned 16 bit immediate" () 15 16)
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(dnf f-imm16u "unsigned 16 bit immediate" () 15 16)
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(df f-imm16s "signed 16 bit immediate" () 15 16 INT ((value pc) (add HI value 0)) ((value pc) (add HI value 0)))
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(df f-imm16s "signed 16 bit immediate" () 15 16 INT ((value pc) (add HI value 0)) ((value pc) (add HI value 0)))
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(dnf f-imm16a "pc-rel offset" (PCREL-ADDR) 15 16)
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(dnf f-imm16a "pc-rel offset" (PCREL-ADDR) 15 16)
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(dnf f-uu4a "unused 4 bit field" () 19 4)
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(dnf f-uu4a "unused 4 bit field" () 19 4)
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(dnf f-uu4b "unused 4 bit field" () 23 4)
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(dnf f-uu4b "unused 4 bit field" () 23 4)
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(dnf f-uu12 "unused 12 bit field" () 11 12)
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(dnf f-uu12 "unused 12 bit field" () 11 12)
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(dnf f-uu8 "unused 8 bit field" () 15 8)
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(dnf f-uu8 "unused 8 bit field" () 15 8)
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(dnf f-uu16 "unused 16 bit field" () 15 16)
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(dnf f-uu16 "unused 16 bit field" () 15 16)
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(dnf f-uu1 "unused 1 bit field" () 7 1)
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(dnf f-uu1 "unused 1 bit field" () 7 1)
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; The following ifields are used exclusively for the MorphoSys instructions.
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; The following ifields are used exclusively for the MorphoSys instructions.
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; In a few cases, a bit field is used for something in addition to what its
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; In a few cases, a bit field is used for something in addition to what its
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; name suggests. For the most part, the names are meaningful though.
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; name suggests. For the most part, the names are meaningful though.
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(dnf f-msopc "opcode field" () 30 5)
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(dnf f-msopc "opcode field" () 30 5)
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(dnf f-uu-26-25 "unused 26 bits" () 25 26)
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(dnf f-uu-26-25 "unused 26 bits" () 25 26)
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(dnf f-mask "mask" () 25 16)
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(dnf f-mask "mask" () 25 16)
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(dnf f-bankaddr "bank address" () 25 13)
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(dnf f-bankaddr "bank address" () 25 13)
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(dnf f-rda "rda" () 25 1)
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(dnf f-rda "rda" () 25 1)
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(dnf f-uu-2-25 "unused bits 25 & 24" () 25 2)
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(dnf f-uu-2-25 "unused bits 25 & 24" () 25 2)
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(dnf f-rbbc "Omega network configuration" () 25 2)
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(dnf f-rbbc "Omega network configuration" () 25 2)
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(dnf f-perm "perm" () 25 2)
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(dnf f-perm "perm" () 25 2)
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(dnf f-mode "mode" () 25 2)
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(dnf f-mode "mode" () 25 2)
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(dnf f-uu-1-24 "testing" () 24 1)
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(dnf f-uu-1-24 "testing" () 24 1)
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(dnf f-wr "wr" () 24 1)
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(dnf f-wr "wr" () 24 1)
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(dnf f-fbincr "fb incr" () 23 4)
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(dnf f-fbincr "fb incr" () 23 4)
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(dnf f-uu-2-23 "unused bits 23 and 22" () 23 2)
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(dnf f-uu-2-23 "unused bits 23 and 22" () 23 2)
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(dnf f-xmode "xmode" () 23 1)
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(dnf f-xmode "xmode" () 23 1)
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(dnf f-a23 "a23" () 23 1)
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(dnf f-a23 "a23" () 23 1)
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(dnf f-mask1 "mask1" () 22 3)
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(dnf f-mask1 "mask1" () 22 3)
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(dnf f-cr "cr" () 22 3)
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(dnf f-cr "cr" () 22 3)
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(dnf f-type "type" () 21 2)
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(dnf f-type "type" () 21 2)
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(dnf f-incamt "increment amount" () 19 8)
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(dnf f-incamt "increment amount" () 19 8)
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(dnf f-cbs "cbs" () 19 2)
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(dnf f-cbs "cbs" () 19 2)
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(dnf f-uu-1-19 "unused bit 19" () 19 1)
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(dnf f-uu-1-19 "unused bit 19" () 19 1)
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(dnf f-ball "b_all" () 19 1)
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(dnf f-ball "b_all" () 19 1)
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(dnf f-colnum "column number" () 18 3)
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(dnf f-colnum "column number" () 18 3)
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(dnf f-brc "b_r_c" () 18 3)
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(dnf f-brc "b_r_c" () 18 3)
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(dnf f-incr "incr" () 17 6)
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(dnf f-incr "incr" () 17 6)
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(dnf f-fbdisp "frame buffer displacement" () 15 6)
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(dnf f-fbdisp "frame buffer displacement" () 15 6)
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(dnf f-uu-4-15 "unused bits 15,14,13,12" () 15 4)
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(dnf f-uu-4-15 "unused bits 15,14,13,12" () 15 4)
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(dnf f-length "length" () 15 3)
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(dnf f-length "length" () 15 3)
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(dnf f-uu-1-15 "unused bit 15" () 15 1)
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(dnf f-uu-1-15 "unused bit 15" () 15 1)
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(dnf f-rc "row/column context" () 15 1)
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(dnf f-rc "row/column context" () 15 1)
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(dnf f-rcnum "starting cell of cntxt mem." () 14 3)
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(dnf f-rcnum "starting cell of cntxt mem." () 14 3)
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(dnf f-rownum "row number" () 14 3)
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(dnf f-rownum "row number" () 14 3)
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(dnf f-cbx "cbx" () 14 3)
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(dnf f-cbx "cbx" () 14 3)
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(dnf f-id "id" () 14 1)
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(dnf f-id "id" () 14 1)
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(dnf f-size "size" () 13 14)
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(dnf f-size "size" () 13 14)
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(dnf f-rownum1 "row number" () 12 3)
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(dnf f-rownum1 "row number" () 12 3)
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(dnf f-uu-3-11 "unused 3 bits (11-9)" () 11 3)
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(dnf f-uu-3-11 "unused 3 bits (11-9)" () 11 3)
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(dnf f-rc1 "row/column context" () 11 1)
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(dnf f-rc1 "row/column context" () 11 1)
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(dnf f-ccb "ccb" () 11 1)
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(dnf f-ccb "ccb" () 11 1)
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(dnf f-cbrb "data-bus orientation" () 10 1)
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(dnf f-cbrb "data-bus orientation" () 10 1)
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(dnf f-cdb "cdb" () 10 1)
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(dnf f-cdb "cdb" () 10 1)
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(dnf f-rownum2 "row number" () 9 3)
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(dnf f-rownum2 "row number" () 9 3)
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(dnf f-cell "cell" () 9 3)
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(dnf f-cell "cell" () 9 3)
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(dnf f-uu-3-9 "unused 3 bits (9-7)" () 9 3)
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(dnf f-uu-3-9 "unused 3 bits (9-7)" () 9 3)
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(dnf f-contnum "context number" () 8 9)
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(dnf f-contnum "context number" () 8 9)
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(dnf f-uu-1-6 "unused bit 6" () 6 1)
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(dnf f-uu-1-6 "unused bit 6" () 6 1)
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(dnf f-dup "dup" () 6 1)
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(dnf f-dup "dup" () 6 1)
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(dnf f-rc2 "rc2" () 6 1)
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(dnf f-rc2 "rc2" () 6 1)
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(dnf f-ctxdisp "context displacement" () 5 6)
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(dnf f-ctxdisp "context displacement" () 5 6)
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; additional fields in ms2
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; additional fields in ms2
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(dnf f-imm16l "loop count" () 23 16)
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(dnf f-imm16l "loop count" () 23 16)
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(df f-loopo "loop offset" () 7 8 UINT
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(df f-loopo "loop offset" () 7 8 UINT
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((value pc) (srl SI value 2))
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((value pc) (srl SI value 2))
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((value pc) (add SI (sll value 2) 8))
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((value pc) (add SI (sll value 2) 8))
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)
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)
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(dnf f-cb1sel "cb1 select" () 25 3)
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(dnf f-cb1sel "cb1 select" () 25 3)
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(dnf f-cb2sel "cb2 select" () 22 3)
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(dnf f-cb2sel "cb2 select" () 22 3)
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(dnf f-cb1incr "cb1 increment" (SIGNED) 19 6)
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(dnf f-cb1incr "cb1 increment" (SIGNED) 19 6)
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(dnf f-cb2incr "cb2 increment" (SIGNED) 13 6)
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(dnf f-cb2incr "cb2 increment" (SIGNED) 13 6)
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(dnf f-rc3 "row/colum context" () 7 1)
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(dnf f-rc3 "row/colum context" () 7 1)
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; The following is just for a test
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; The following is just for a test
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(dnf f-msysfrsr2 "sr2 for msys" () 19 4)
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(dnf f-msysfrsr2 "sr2 for msys" () 19 4)
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(dnf f-brc2 "b_r_c2" () 14 3)
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(dnf f-brc2 "b_r_c2" () 14 3)
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(dnf f-ball2 "b_all2" () 15 1)
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(dnf f-ball2 "b_all2" () 15 1)
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; Enumerations Of Instruction Fields ;;
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;; Enumerations Of Instruction Fields ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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|
|
; insn-msys: bit 31. 1 for Morphosys Insns, 0 if not.
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; insn-msys: bit 31. 1 for Morphosys Insns, 0 if not.
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(define-normal-insn-enum insn-msys "msys enums" () MSYS_ f-msys
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(define-normal-insn-enum insn-msys "msys enums" () MSYS_ f-msys
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(NO YES)
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(NO YES)
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)
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)
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; insn-opc: bits 30 through 25 . Non-MorphoSys Instructions
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; insn-opc: bits 30 through 25 . Non-MorphoSys Instructions
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; Note - the documentation is wrong for the encoding of the DBNZ
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; Note - the documentation is wrong for the encoding of the DBNZ
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; instruction. It is actually 011110. See Issue 67699.
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; instruction. It is actually 011110. See Issue 67699.
|
(define-normal-insn-enum insn-opc "opc enums" () OPC_ f-opc
|
(define-normal-insn-enum insn-opc "opc enums" () OPC_ f-opc
|
(ADD ADDU SUB SUBU MUL - - -
|
(ADD ADDU SUB SUBU MUL - - -
|
AND OR XOR NAND NOR XNOR LDUI -
|
AND OR XOR NAND NOR XNOR LDUI -
|
LSL LSR ASR - - - - -
|
LSL LSR ASR - - - - -
|
BRLT BRLE BREQ JMP JAL BRNEQ DBNZ LOOP
|
BRLT BRLE BREQ JMP JAL BRNEQ DBNZ LOOP
|
LDW STW - - - - - -
|
LDW STW - - - - - -
|
- - - - - - - -
|
- - - - - - - -
|
EI DI SI RETI BREAK IFLUSH - -
|
EI DI SI RETI BREAK IFLUSH - -
|
)
|
)
|
)
|
)
|
|
|
; insn-msopc: bits 30 through 26 . MorphoSys Instructions
|
; insn-msopc: bits 30 through 26 . MorphoSys Instructions
|
(define-normal-insn-enum insn-msopc "msopc enums" () MSOPC_ f-msopc
|
(define-normal-insn-enum insn-msopc "msopc enums" () MSOPC_ f-msopc
|
(LDCTXT LDFB STFB FBCB MFBCB FBCCI FBRCI FBCRI
|
(LDCTXT LDFB STFB FBCB MFBCB FBCCI FBRCI FBCRI
|
FBRRI MFBCCI MFBRCI MFBCRI MFBRRI FBCBDR RCFBCB MRCFBCB
|
FBRRI MFBCCI MFBRCI MFBCRI MFBRRI FBCBDR RCFBCB MRCFBCB
|
CBCAST DUPCBCAST WFBI WFB RCRISC FBCBINC RCXMODE INTLVR
|
CBCAST DUPCBCAST WFBI WFB RCRISC FBCBINC RCXMODE INTLVR
|
WFBINC MWFBINC WFBINCR MWFBINCR FBCBINCS MFBCBINCS FBCBINCRS MFBCBINCRS
|
WFBINC MWFBINC WFBINCR MWFBINCR FBCBINCS MFBCBINCS FBCBINCRS MFBCBINCRS
|
- - - - - - - -
|
- - - - - - - -
|
)
|
)
|
)
|
)
|
|
|
; insn-imm: bit 24. Immediate operand indicator.
|
; insn-imm: bit 24. Immediate operand indicator.
|
(define-normal-insn-enum insn-imm "imm enums" () IMM_ f-imm
|
(define-normal-insn-enum insn-imm "imm enums" () IMM_ f-imm
|
; This bit specifies whether and immediate operand will be present.
|
; This bit specifies whether and immediate operand will be present.
|
; It's 1 if there is, 0 if there is not.
|
; It's 1 if there is, 0 if there is not.
|
(NO YES)
|
(NO YES)
|
)
|
)
|
;;;;;;;;;;;;;;;;
|
;;;;;;;;;;;;;;;;
|
;; Attributes ;;
|
;; Attributes ;;
|
;;;;;;;;;;;;;;;;
|
;;;;;;;;;;;;;;;;
|
|
|
; Might not need this. Keep if for the sim just in case.
|
; Might not need this. Keep if for the sim just in case.
|
;(define-attr
|
;(define-attr
|
; (for insn)
|
; (for insn)
|
; (type boolean)
|
; (type boolean)
|
; (name EXT-SKIP-INSN)
|
; (name EXT-SKIP-INSN)
|
; (comment "instruction is a PAGE, LOADL or LOADH instruction")
|
; (comment "instruction is a PAGE, LOADL or LOADH instruction")
|
;)
|
;)
|
|
|
(define-attr
|
(define-attr
|
(for insn)
|
(for insn)
|
(type boolean)
|
(type boolean)
|
(name LOAD-DELAY)
|
(name LOAD-DELAY)
|
(comment "insn has a load delay")
|
(comment "insn has a load delay")
|
)
|
)
|
|
|
(define-attr
|
(define-attr
|
(for insn)
|
(for insn)
|
(type boolean)
|
(type boolean)
|
(name MEMORY-ACCESS)
|
(name MEMORY-ACCESS)
|
(comment "insn performs a memory access")
|
(comment "insn performs a memory access")
|
)
|
)
|
|
|
(define-attr
|
(define-attr
|
(for insn)
|
(for insn)
|
(type boolean)
|
(type boolean)
|
(name AL-INSN)
|
(name AL-INSN)
|
(comment "insn is an arithmetic or logic insn.")
|
(comment "insn is an arithmetic or logic insn.")
|
)
|
)
|
|
|
(define-attr
|
(define-attr
|
(for insn)
|
(for insn)
|
(type boolean)
|
(type boolean)
|
(name IO-INSN)
|
(name IO-INSN)
|
(comment "insn performs an I/O operation")
|
(comment "insn performs an I/O operation")
|
)
|
)
|
|
|
(define-attr
|
(define-attr
|
(for insn)
|
(for insn)
|
(type boolean)
|
(type boolean)
|
(name BR-INSN)
|
(name BR-INSN)
|
(comment "insn performs an I/O operation")
|
(comment "insn performs an I/O operation")
|
)
|
)
|
|
|
(define-attr
|
(define-attr
|
(for insn)
|
(for insn)
|
(type boolean)
|
(type boolean)
|
(name JAL-HAZARD)
|
(name JAL-HAZARD)
|
(comment "insn has jal-like hazard")
|
(comment "insn has jal-like hazard")
|
)
|
)
|
|
|
(define-pmacro (define-reg-use-attr regfield)
|
(define-pmacro (define-reg-use-attr regfield)
|
(define-attr
|
(define-attr
|
(for insn)
|
(for insn)
|
(type boolean)
|
(type boolean)
|
(name (.sym "USES-" (.upcase regfield)))
|
(name (.sym "USES-" (.upcase regfield)))
|
(comment ("insn accesses register operand " regfield))))
|
(comment ("insn accesses register operand " regfield))))
|
|
|
(define-reg-use-attr "frdr")
|
(define-reg-use-attr "frdr")
|
(define-reg-use-attr "frdrrr")
|
(define-reg-use-attr "frdrrr")
|
(define-reg-use-attr "frsr1")
|
(define-reg-use-attr "frsr1")
|
(define-reg-use-attr "frsr2")
|
(define-reg-use-attr "frsr2")
|
|
|
|
|
; Might not need this. Keep it for the sim just in case.
|
; Might not need this. Keep it for the sim just in case.
|
(define-attr
|
(define-attr
|
(for insn)
|
(for insn)
|
(type boolean)
|
(type boolean)
|
(name SKIPA)
|
(name SKIPA)
|
(comment "instruction is a SKIP instruction")
|
(comment "instruction is a SKIP instruction")
|
)
|
)
|
|
|
|
|
;;;;;;;;;;;;;;;;;;;;;
|
;;;;;;;;;;;;;;;;;;;;;
|
;; Hardware Pieces ;;
|
;; Hardware Pieces ;;
|
;;;;;;;;;;;;;;;;;;;;;
|
;;;;;;;;;;;;;;;;;;;;;
|
|
|
;(define-pmacro (build-reg-name n) (.splice (.str "$" n) n))
|
;(define-pmacro (build-reg-name n) (.splice (.str "$" n) n))
|
|
|
; These are the 16 registers that the chip has. In later versions
|
; These are the 16 registers that the chip has. In later versions
|
; where there will be more registers, this will need to be expanded.
|
; where there will be more registers, this will need to be expanded.
|
; Note that there are two entries for the registers with two names.
|
; Note that there are two entries for the registers with two names.
|
(define-hardware
|
(define-hardware
|
(name h-spr)
|
(name h-spr)
|
(comment "special-purpose registers")
|
(comment "special-purpose registers")
|
(type register SI (16))
|
(type register SI (16))
|
(indices keyword "" (("R0" 0) ("R1" 1) ("R2" 2) ("R3" 3) ("R4" 4) ("R5" 5)
|
(indices keyword "" (("R0" 0) ("R1" 1) ("R2" 2) ("R3" 3) ("R4" 4) ("R5" 5)
|
("R6" 6) ("R7" 7) ("R8" 8) ("R9" 9) ("R10" 10) ("R11" 11) ("R12" 12) ("fp" 12)
|
("R6" 6) ("R7" 7) ("R8" 8) ("R9" 9) ("R10" 10) ("R11" 11) ("R12" 12) ("fp" 12)
|
("R13" 13) ("sp" 13) ("R14" 14) ("ra" 14) ("R15" 15) ("ira" 15)))
|
("R13" 13) ("sp" 13) ("R14" 14) ("ra" 14) ("R15" 15) ("ira" 15)))
|
; (get (index) (and (raw-reg h-spr) #xffffffff))
|
; (get (index) (and (raw-reg h-spr) #xffffffff))
|
; (set (index value) (set (raw-reg h-spr) (and value #xffffffff)))
|
; (set (index value) (set (raw-reg h-spr) (and value #xffffffff)))
|
)
|
)
|
|
|
; This is the program counter.
|
; This is the program counter.
|
(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
|
(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
|
|
|
(define-keyword
|
(define-keyword
|
(name msys-syms)
|
(name msys-syms)
|
(print-name h-nil)
|
(print-name h-nil)
|
(prefix "")
|
(prefix "")
|
(values (DUP 1) (XX 0))
|
(values (DUP 1) (XX 0))
|
)
|
)
|
|
|
;;;;;;;;;;;;;;
|
;;;;;;;;;;;;;;
|
;; Operands ;;
|
;; Operands ;;
|
;;;;;;;;;;;;;;
|
;;;;;;;;;;;;;;
|
|
|
(define-operand (name frsr1) (comment "register") (attrs)
|
(define-operand (name frsr1) (comment "register") (attrs)
|
(type h-spr) (index f-sr1) )
|
(type h-spr) (index f-sr1) )
|
(define-operand (name frsr2) (comment "register") (attrs)
|
(define-operand (name frsr2) (comment "register") (attrs)
|
(type h-spr) (index f-sr2) )
|
(type h-spr) (index f-sr2) )
|
(define-operand (name frdr) (comment "register") (attrs)
|
(define-operand (name frdr) (comment "register") (attrs)
|
(type h-spr) (index f-dr) )
|
(type h-spr) (index f-dr) )
|
(define-operand (name frdrrr) (comment "register") (attrs)
|
(define-operand (name frdrrr) (comment "register") (attrs)
|
(type h-spr) (index f-drrr) )
|
(type h-spr) (index f-drrr) )
|
(define-operand (name imm16) (comment "immediate value - sign extd") (attrs)
|
(define-operand (name imm16) (comment "immediate value - sign extd") (attrs)
|
(type h-sint) (index f-imm16s) (handlers (parse "imm16") (print "dollarhex")))
|
(type h-sint) (index f-imm16s) (handlers (parse "imm16") (print "dollarhex")))
|
(define-operand (name imm16z) (comment "immediate value - zero extd") (attrs)
|
(define-operand (name imm16z) (comment "immediate value - zero extd") (attrs)
|
(type h-uint) (index f-imm16u) (handlers (parse "imm16") (print "dollarhex")))
|
(type h-uint) (index f-imm16u) (handlers (parse "imm16") (print "dollarhex")))
|
(define-operand (name imm16o) (comment "immediate value") (attrs PCREL-ADDR)
|
(define-operand (name imm16o) (comment "immediate value") (attrs PCREL-ADDR)
|
(type h-uint) (index f-imm16s) (handlers (parse "imm16") (print "pcrel")))
|
(type h-uint) (index f-imm16s) (handlers (parse "imm16") (print "pcrel")))
|
|
|
; Operands for MorphoSys Instructions
|
; Operands for MorphoSys Instructions
|
|
|
(define-operand (name rc) (comment "rc") (attrs)
|
(define-operand (name rc) (comment "rc") (attrs)
|
(type h-uint) (index f-rc) (handlers (parse "rc") (print "dollarhex")))
|
(type h-uint) (index f-rc) (handlers (parse "rc") (print "dollarhex")))
|
|
|
(define-operand (name rcnum) (comment "rcnum") (attrs)
|
(define-operand (name rcnum) (comment "rcnum") (attrs)
|
(type h-uint) (index f-rcnum) (handlers (print "dollarhex")))
|
(type h-uint) (index f-rcnum) (handlers (print "dollarhex")))
|
|
|
(define-operand (name contnum) (comment "context number") (attrs)
|
(define-operand (name contnum) (comment "context number") (attrs)
|
(type h-uint) (index f-contnum) (handlers (print "dollarhex")))
|
(type h-uint) (index f-contnum) (handlers (print "dollarhex")))
|
|
|
(define-operand (name rbbc) (comment "omega network configuration") (attrs)
|
(define-operand (name rbbc) (comment "omega network configuration") (attrs)
|
(type h-uint) (index f-rbbc) (handlers (parse "rbbc") (print "dollarhex")))
|
(type h-uint) (index f-rbbc) (handlers (parse "rbbc") (print "dollarhex")))
|
|
|
(define-operand (name colnum) (comment "column number") (attrs)
|
(define-operand (name colnum) (comment "column number") (attrs)
|
(type h-uint) (index f-colnum) (handlers (print "dollarhex")))
|
(type h-uint) (index f-colnum) (handlers (print "dollarhex")))
|
|
|
(define-operand (name rownum) (comment "row number") (attrs)
|
(define-operand (name rownum) (comment "row number") (attrs)
|
(type h-uint) (index f-rownum) (handlers (print "dollarhex")))
|
(type h-uint) (index f-rownum) (handlers (print "dollarhex")))
|
|
|
(define-operand (name rownum1) (comment "row number") (attrs)
|
(define-operand (name rownum1) (comment "row number") (attrs)
|
(type h-uint) (index f-rownum1) (handlers (print "dollarhex")))
|
(type h-uint) (index f-rownum1) (handlers (print "dollarhex")))
|
|
|
(define-operand (name rownum2) (comment "row number") (attrs)
|
(define-operand (name rownum2) (comment "row number") (attrs)
|
(type h-uint) (index f-rownum2) (handlers (print "dollarhex")))
|
(type h-uint) (index f-rownum2) (handlers (print "dollarhex")))
|
|
|
(define-operand (name rc1) (comment "rc1") (attrs)
|
(define-operand (name rc1) (comment "rc1") (attrs)
|
(type h-uint) (index f-rc1) (handlers (parse "rc") (print "dollarhex")))
|
(type h-uint) (index f-rc1) (handlers (parse "rc") (print "dollarhex")))
|
|
|
(define-operand (name rc2) (comment "rc2") (attrs)
|
(define-operand (name rc2) (comment "rc2") (attrs)
|
(type h-uint) (index f-rc2) (handlers (parse "rc") (print "dollarhex")))
|
(type h-uint) (index f-rc2) (handlers (parse "rc") (print "dollarhex")))
|
|
|
(define-operand (name cbrb) (comment "data-bus orientation") (attrs)
|
(define-operand (name cbrb) (comment "data-bus orientation") (attrs)
|
(type h-uint) (index f-cbrb) (handlers (parse "cbrb") (print "dollarhex")))
|
(type h-uint) (index f-cbrb) (handlers (parse "cbrb") (print "dollarhex")))
|
|
|
(define-operand (name cell) (comment "cell") (attrs)
|
(define-operand (name cell) (comment "cell") (attrs)
|
(type h-uint) (index f-cell) (handlers (print "dollarhex")))
|
(type h-uint) (index f-cell) (handlers (print "dollarhex")))
|
|
|
(define-operand (name dup) (comment "dup") (attrs)
|
(define-operand (name dup) (comment "dup") (attrs)
|
(type h-uint) (index f-dup) (handlers (parse "dup") (print "dollarhex")))
|
(type h-uint) (index f-dup) (handlers (parse "dup") (print "dollarhex")))
|
|
|
(define-operand (name ctxdisp) (comment "context displacement") (attrs)
|
(define-operand (name ctxdisp) (comment "context displacement") (attrs)
|
(type h-uint) (index f-ctxdisp) (handlers (print "dollarhex")))
|
(type h-uint) (index f-ctxdisp) (handlers (print "dollarhex")))
|
|
|
(define-operand (name fbdisp) (comment "frame buffer displacement") (attrs)
|
(define-operand (name fbdisp) (comment "frame buffer displacement") (attrs)
|
(type h-uint) (index f-fbdisp) (handlers (print "dollarhex")))
|
(type h-uint) (index f-fbdisp) (handlers (print "dollarhex")))
|
|
|
(define-operand (name type) (comment "type") (attrs)
|
(define-operand (name type) (comment "type") (attrs)
|
(type h-uint) (index f-type) (handlers (parse "type") (print "dollarhex")))
|
(type h-uint) (index f-type) (handlers (parse "type") (print "dollarhex")))
|
|
|
(define-operand (name mask) (comment "mask") (attrs)
|
(define-operand (name mask) (comment "mask") (attrs)
|
(type h-uint) (index f-mask) (handlers (print "dollarhex")))
|
(type h-uint) (index f-mask) (handlers (print "dollarhex")))
|
|
|
(define-operand (name bankaddr) (comment "bank address") (attrs)
|
(define-operand (name bankaddr) (comment "bank address") (attrs)
|
(type h-uint) (index f-bankaddr) (handlers (print "dollarhex")))
|
(type h-uint) (index f-bankaddr) (handlers (print "dollarhex")))
|
|
|
(define-operand (name incamt) (comment "increment amount") (attrs)
|
(define-operand (name incamt) (comment "increment amount") (attrs)
|
(type h-uint) (index f-incamt) (handlers (print "dollarhex")))
|
(type h-uint) (index f-incamt) (handlers (print "dollarhex")))
|
|
|
(define-operand (name xmode) (comment "xmode") (attrs)
|
(define-operand (name xmode) (comment "xmode") (attrs)
|
(type h-uint) (index f-xmode) (handlers (parse "xmode") (print "dollarhex")))
|
(type h-uint) (index f-xmode) (handlers (parse "xmode") (print "dollarhex")))
|
|
|
(define-operand (name mask1) (comment "mask1") (attrs)
|
(define-operand (name mask1) (comment "mask1") (attrs)
|
(type h-uint) (index f-mask1) (handlers (print "dollarhex")))
|
(type h-uint) (index f-mask1) (handlers (print "dollarhex")))
|
|
|
(define-operand (name ball) (comment "b_all") (attrs)
|
(define-operand (name ball) (comment "b_all") (attrs)
|
(type h-uint) (index f-ball) (handlers (parse "ball") (print "dollarhex")))
|
(type h-uint) (index f-ball) (handlers (parse "ball") (print "dollarhex")))
|
|
|
(define-operand (name brc) (comment "b_r_c") (attrs)
|
(define-operand (name brc) (comment "b_r_c") (attrs)
|
(type h-uint) (index f-brc) (handlers (print "dollarhex")))
|
(type h-uint) (index f-brc) (handlers (print "dollarhex")))
|
|
|
(define-operand (name rda) (comment "rd") (attrs)
|
(define-operand (name rda) (comment "rd") (attrs)
|
(type h-uint) (index f-rda) (handlers (print "dollarhex")))
|
(type h-uint) (index f-rda) (handlers (print "dollarhex")))
|
|
|
(define-operand (name wr) (comment "wr") (attrs)
|
(define-operand (name wr) (comment "wr") (attrs)
|
(type h-uint) (index f-wr) (handlers (print "dollarhex")))
|
(type h-uint) (index f-wr) (handlers (print "dollarhex")))
|
|
|
(define-operand (name ball2) (comment "b_all2") (attrs)
|
(define-operand (name ball2) (comment "b_all2") (attrs)
|
(type h-uint) (index f-ball2) (handlers (parse "ball") (print "dollarhex")))
|
(type h-uint) (index f-ball2) (handlers (parse "ball") (print "dollarhex")))
|
|
|
(define-operand (name brc2) (comment "b_r_c2") (attrs)
|
(define-operand (name brc2) (comment "b_r_c2") (attrs)
|
(type h-uint) (index f-brc2) (handlers (print "dollarhex")))
|
(type h-uint) (index f-brc2) (handlers (print "dollarhex")))
|
(define-operand (name perm) (comment "perm") (attrs)
|
(define-operand (name perm) (comment "perm") (attrs)
|
(type h-uint) (index f-perm) (handlers (print "dollarhex")))
|
(type h-uint) (index f-perm) (handlers (print "dollarhex")))
|
(define-operand (name a23) (comment "a23") (attrs)
|
(define-operand (name a23) (comment "a23") (attrs)
|
(type h-uint) (index f-a23) (handlers (print "dollarhex")))
|
(type h-uint) (index f-a23) (handlers (print "dollarhex")))
|
(define-operand (name cr) (comment "c-r") (attrs)
|
(define-operand (name cr) (comment "c-r") (attrs)
|
(type h-uint) (index f-cr) (handlers (print "dollarhex")))
|
(type h-uint) (index f-cr) (handlers (print "dollarhex")))
|
(define-operand (name cbs) (comment "cbs") (attrs)
|
(define-operand (name cbs) (comment "cbs") (attrs)
|
(type h-uint) (index f-cbs) (handlers (print "dollarhex")))
|
(type h-uint) (index f-cbs) (handlers (print "dollarhex")))
|
(define-operand (name incr) (comment "incr") (attrs)
|
(define-operand (name incr) (comment "incr") (attrs)
|
(type h-uint) (index f-incr) (handlers (print "dollarhex")))
|
(type h-uint) (index f-incr) (handlers (print "dollarhex")))
|
(define-operand (name length) (comment "length") (attrs)
|
(define-operand (name length) (comment "length") (attrs)
|
(type h-uint) (index f-length) (handlers (print "dollarhex")))
|
(type h-uint) (index f-length) (handlers (print "dollarhex")))
|
(define-operand (name cbx) (comment "cbx") (attrs)
|
(define-operand (name cbx) (comment "cbx") (attrs)
|
(type h-uint) (index f-cbx) (handlers (print "dollarhex")))
|
(type h-uint) (index f-cbx) (handlers (print "dollarhex")))
|
(define-operand (name ccb) (comment "ccb") (attrs)
|
(define-operand (name ccb) (comment "ccb") (attrs)
|
(type h-uint) (index f-ccb) (handlers (print "dollarhex")))
|
(type h-uint) (index f-ccb) (handlers (print "dollarhex")))
|
(define-operand (name cdb) (comment "cdb") (attrs)
|
(define-operand (name cdb) (comment "cdb") (attrs)
|
(type h-uint) (index f-cdb) (handlers (print "dollarhex")))
|
(type h-uint) (index f-cdb) (handlers (print "dollarhex")))
|
|
|
; For the INTLVR insn
|
; For the INTLVR insn
|
(define-operand (name mode) (comment "mode") (attrs)
|
(define-operand (name mode) (comment "mode") (attrs)
|
(type h-uint) (index f-mode) (handlers (print "dollarhex")))
|
(type h-uint) (index f-mode) (handlers (print "dollarhex")))
|
(define-operand (name id) (comment "i/d") (attrs)
|
(define-operand (name id) (comment "i/d") (attrs)
|
(type h-uint) (index f-id) (handlers (print "dollarhex")))
|
(type h-uint) (index f-id) (handlers (print "dollarhex")))
|
(define-operand (name size) (comment "size") (attrs)
|
(define-operand (name size) (comment "size") (attrs)
|
(type h-uint) (index f-size) (handlers (print "dollarhex")))
|
(type h-uint) (index f-size) (handlers (print "dollarhex")))
|
|
|
(define-operand (name fbincr) (comment "fb incr") (attrs)
|
(define-operand (name fbincr) (comment "fb incr") (attrs)
|
(type h-uint) (index f-fbincr) (handlers (print "dollarhex")))
|
(type h-uint) (index f-fbincr) (handlers (print "dollarhex")))
|
|
|
; For the ms2 insns
|
; For the ms2 insns
|
(define-operand (name loopsize) (comment "immediate value")
|
(define-operand (name loopsize) (comment "immediate value")
|
(attrs (MACH ms2) PCREL-ADDR)
|
(attrs (MACH ms2) PCREL-ADDR)
|
(type h-uint) (index f-loopo) (handlers (parse "loopsize") (print "pcrel")))
|
(type h-uint) (index f-loopo) (handlers (parse "loopsize") (print "pcrel")))
|
(define-operand (name imm16l) (comment "immediate value")
|
(define-operand (name imm16l) (comment "immediate value")
|
(attrs (MACH ms2))
|
(attrs (MACH ms2))
|
(type h-uint) (index f-imm16l) (handlers (print "dollarhex")))
|
(type h-uint) (index f-imm16l) (handlers (print "dollarhex")))
|
(define-operand (name rc3) (comment "rc3") (attrs (MACH ms2))
|
(define-operand (name rc3) (comment "rc3") (attrs (MACH ms2))
|
(type h-uint) (index f-rc3) (handlers (parse "rc") (print "dollarhex")))
|
(type h-uint) (index f-rc3) (handlers (parse "rc") (print "dollarhex")))
|
(define-operand (name cb1sel) (comment "cb1sel") (attrs (MACH ms2))
|
(define-operand (name cb1sel) (comment "cb1sel") (attrs (MACH ms2))
|
(type h-uint) (index f-cb1sel) (handlers (print "dollarhex")))
|
(type h-uint) (index f-cb1sel) (handlers (print "dollarhex")))
|
(define-operand (name cb2sel) (comment "cb2sel") (attrs (MACH ms2))
|
(define-operand (name cb2sel) (comment "cb2sel") (attrs (MACH ms2))
|
(type h-uint) (index f-cb2sel) (handlers (print "dollarhex")))
|
(type h-uint) (index f-cb2sel) (handlers (print "dollarhex")))
|
(define-operand (name cb1incr) (comment "cb1incr") (attrs (MACH ms2))
|
(define-operand (name cb1incr) (comment "cb1incr") (attrs (MACH ms2))
|
(type h-sint) (index f-cb1incr) (handlers (print "dollarhex")))
|
(type h-sint) (index f-cb1incr) (handlers (print "dollarhex")))
|
(define-operand (name cb2incr) (comment "cb2incr") (attrs (MACH ms2))
|
(define-operand (name cb2incr) (comment "cb2incr") (attrs (MACH ms2))
|
(type h-sint) (index f-cb2incr) (handlers (print "dollarhex")))
|
(type h-sint) (index f-cb2incr) (handlers (print "dollarhex")))
|
|
|
; Probaby won't need most of these.
|
; Probaby won't need most of these.
|
(define-pmacro r0 (reg h-spr #x0))
|
(define-pmacro r0 (reg h-spr #x0))
|
(define-pmacro r1 (reg h-spr #x01))
|
(define-pmacro r1 (reg h-spr #x01))
|
(define-pmacro r2 (reg h-spr #x02))
|
(define-pmacro r2 (reg h-spr #x02))
|
(define-pmacro r3 (reg h-spr #x03))
|
(define-pmacro r3 (reg h-spr #x03))
|
(define-pmacro r4 (reg h-spr #x04))
|
(define-pmacro r4 (reg h-spr #x04))
|
(define-pmacro r5 (reg h-spr #x05))
|
(define-pmacro r5 (reg h-spr #x05))
|
(define-pmacro r6 (reg h-spr #x06))
|
(define-pmacro r6 (reg h-spr #x06))
|
(define-pmacro r7 (reg h-spr #x07))
|
(define-pmacro r7 (reg h-spr #x07))
|
(define-pmacro r8 (reg h-spr #x08))
|
(define-pmacro r8 (reg h-spr #x08))
|
(define-pmacro r9 (reg h-spr #x09))
|
(define-pmacro r9 (reg h-spr #x09))
|
(define-pmacro r10 (reg h-spr #xA))
|
(define-pmacro r10 (reg h-spr #xA))
|
(define-pmacro r11 (reg h-spr #xB))
|
(define-pmacro r11 (reg h-spr #xB))
|
(define-pmacro r12 (reg h-spr #xC))
|
(define-pmacro r12 (reg h-spr #xC))
|
(define-pmacro fp (reg h-spr #xC))
|
(define-pmacro fp (reg h-spr #xC))
|
(define-pmacro r13 (reg h-spr #xD))
|
(define-pmacro r13 (reg h-spr #xD))
|
(define-pmacro sp (reg h-spr #xD))
|
(define-pmacro sp (reg h-spr #xD))
|
(define-pmacro r14 (reg h-spr #xE))
|
(define-pmacro r14 (reg h-spr #xE))
|
(define-pmacro ra (reg h-spr #xE))
|
(define-pmacro ra (reg h-spr #xE))
|
(define-pmacro r15 (reg h-spr #xF))
|
(define-pmacro r15 (reg h-spr #xF))
|
(define-pmacro ira (reg h-spr #xF))
|
(define-pmacro ira (reg h-spr #xF))
|
|
|
; delayed set
|
; delayed set
|
(define-pmacro (dset dest src) (set (delay 1 dest) src))
|
(define-pmacro (dset dest src) (set (delay 1 dest) src))
|
|
|
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
;; Instructions As Defined In the MorphoRisc ISA Document ;;
|
;; Instructions As Defined In the MorphoRisc ISA Document ;;
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
|
; Arithmetic Instructions
|
; Arithmetic Instructions
|
|
|
(dni add "ADD DstReg, SrcReg1, SrcReg2"
|
(dni add "ADD DstReg, SrcReg1, SrcReg2"
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
"add $frdrrr,$frsr1,$frsr2"
|
"add $frdrrr,$frsr1,$frsr2"
|
(+ MSYS_NO OPC_ADD IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(+ MSYS_NO OPC_ADD IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(set frdrrr (add SI frsr1 frsr2))
|
(set frdrrr (add SI frsr1 frsr2))
|
()
|
()
|
)
|
)
|
|
|
(dni addu "ADDU DstReg, SrcReg1, SrcReg2"
|
(dni addu "ADDU DstReg, SrcReg1, SrcReg2"
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
"addu $frdrrr,$frsr1,$frsr2"
|
"addu $frdrrr,$frsr1,$frsr2"
|
(+ MSYS_NO OPC_ADDU IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(+ MSYS_NO OPC_ADDU IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(set frdrrr (add USI frsr1 frsr2))
|
(set frdrrr (add USI frsr1 frsr2))
|
()
|
()
|
)
|
)
|
|
|
(dni addi "ADDI DstReg, SrcReg1 UnsImm"
|
(dni addi "ADDI DstReg, SrcReg1 UnsImm"
|
(AL-INSN USES-FRDR USES-FRSR1)
|
(AL-INSN USES-FRDR USES-FRSR1)
|
"addi $frdr,$frsr1,#$imm16"
|
"addi $frdr,$frsr1,#$imm16"
|
(+ MSYS_NO OPC_ADD IMM_YES frsr1 frdr imm16)
|
(+ MSYS_NO OPC_ADD IMM_YES frsr1 frdr imm16)
|
(sequence((HI tmp))
|
(sequence((HI tmp))
|
(set HI tmp (and imm16 #xffff))
|
(set HI tmp (and imm16 #xffff))
|
(set frdr (add SI frsr1 (ext SI tmp)))
|
(set frdr (add SI frsr1 (ext SI tmp)))
|
)
|
)
|
()
|
()
|
)
|
)
|
|
|
(dni addui "ADDUI DstReg, SrcReg1, UnsImm"
|
(dni addui "ADDUI DstReg, SrcReg1, UnsImm"
|
(AL-INSN USES-FRDR USES-FRSR1)
|
(AL-INSN USES-FRDR USES-FRSR1)
|
"addui $frdr,$frsr1,#$imm16z"
|
"addui $frdr,$frsr1,#$imm16z"
|
(+ MSYS_NO OPC_ADDU IMM_YES frsr1 frdr imm16z)
|
(+ MSYS_NO OPC_ADDU IMM_YES frsr1 frdr imm16z)
|
(set frdr (add USI frsr1 (ext USI imm16z)))
|
(set frdr (add USI frsr1 (ext USI imm16z)))
|
()
|
()
|
)
|
)
|
|
|
(dni sub "SUB DstReg, SrcReg1, SrcReg2"
|
(dni sub "SUB DstReg, SrcReg1, SrcReg2"
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
"sub $frdrrr,$frsr1,$frsr2"
|
"sub $frdrrr,$frsr1,$frsr2"
|
(+ MSYS_NO OPC_SUB IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(+ MSYS_NO OPC_SUB IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(set frdrrr (sub SI frsr1 frsr2))
|
(set frdrrr (sub SI frsr1 frsr2))
|
()
|
()
|
)
|
)
|
|
|
(dni subu "SUBU DstReg, SrcReg1, SrcReg2"
|
(dni subu "SUBU DstReg, SrcReg1, SrcReg2"
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
"subu $frdrrr,$frsr1,$frsr2"
|
"subu $frdrrr,$frsr1,$frsr2"
|
(+ MSYS_NO OPC_SUBU IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(+ MSYS_NO OPC_SUBU IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(set frdrrr (sub USI frsr1 frsr2))
|
(set frdrrr (sub USI frsr1 frsr2))
|
()
|
()
|
)
|
)
|
|
|
(dni subi "SUBI DstReg, SrcReg1, UnsImm"
|
(dni subi "SUBI DstReg, SrcReg1, UnsImm"
|
(AL-INSN USES-FRDR USES-FRSR1)
|
(AL-INSN USES-FRDR USES-FRSR1)
|
"subi $frdr,$frsr1,#$imm16"
|
"subi $frdr,$frsr1,#$imm16"
|
(+ MSYS_NO OPC_SUB IMM_YES frsr1 frdr imm16)
|
(+ MSYS_NO OPC_SUB IMM_YES frsr1 frdr imm16)
|
(sequence((HI tmp))
|
(sequence((HI tmp))
|
(set HI tmp (and imm16 #xffff))
|
(set HI tmp (and imm16 #xffff))
|
(set frdr (sub SI frsr1 (ext SI tmp)))
|
(set frdr (sub SI frsr1 (ext SI tmp)))
|
)
|
)
|
;(set frdr (sub SI frsr1 (ext SI imm16)))
|
;(set frdr (sub SI frsr1 (ext SI imm16)))
|
()
|
()
|
)
|
)
|
|
|
(dni subui "SUBUI DstReg, SrcReg1, UnsImm"
|
(dni subui "SUBUI DstReg, SrcReg1, UnsImm"
|
(AL-INSN USES-FRDR USES-FRSR1)
|
(AL-INSN USES-FRDR USES-FRSR1)
|
"subui $frdr,$frsr1,#$imm16z"
|
"subui $frdr,$frsr1,#$imm16z"
|
(+ MSYS_NO OPC_SUBU IMM_YES frsr1 frdr imm16z)
|
(+ MSYS_NO OPC_SUBU IMM_YES frsr1 frdr imm16z)
|
(set frdr (sub USI frsr1 (ext USI imm16z)))
|
(set frdr (sub USI frsr1 (ext USI imm16z)))
|
()
|
()
|
)
|
)
|
|
|
(dni mul "MUL DstReg, SrcReg1, SrcReg2"
|
(dni mul "MUL DstReg, SrcReg1, SrcReg2"
|
((MACH ms1-003,ms2) AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
((MACH ms1-003,ms2) AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
"mul $frdrrr,$frsr1,$frsr2"
|
"mul $frdrrr,$frsr1,$frsr2"
|
(+ MSYS_NO OPC_MUL IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(+ MSYS_NO OPC_MUL IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(sequence((HI op1) (HI op2))
|
(sequence((HI op1) (HI op2))
|
(set op1 (and frsr1 #xffff))
|
(set op1 (and frsr1 #xffff))
|
(if (or (lt op1 (const -32768)) (gt op1 (const 32767)))
|
(if (or (lt op1 (const -32768)) (gt op1 (const 32767)))
|
(error "operand out of range")
|
(error "operand out of range")
|
)
|
)
|
(set op2 (and frsr2 #xffff))
|
(set op2 (and frsr2 #xffff))
|
(if (or (lt op2 (const -32768)) (gt op2 (const 32767)))
|
(if (or (lt op2 (const -32768)) (gt op2 (const 32767)))
|
(error "operand out of range")
|
(error "operand out of range")
|
)
|
)
|
(set frdrrr (mul SI (ext SI op1) (ext SI op2)))
|
(set frdrrr (mul SI (ext SI op1) (ext SI op2)))
|
)
|
)
|
()
|
()
|
)
|
)
|
|
|
(dni muli "MULI DstReg, SrcReg1, UnsImm"
|
(dni muli "MULI DstReg, SrcReg1, UnsImm"
|
((MACH ms1-003,ms2) AL-INSN USES-FRDR USES-FRSR1)
|
((MACH ms1-003,ms2) AL-INSN USES-FRDR USES-FRSR1)
|
"muli $frdr,$frsr1,#$imm16"
|
"muli $frdr,$frsr1,#$imm16"
|
(+ MSYS_NO OPC_MUL IMM_YES frsr1 frdr imm16)
|
(+ MSYS_NO OPC_MUL IMM_YES frsr1 frdr imm16)
|
(sequence((HI op1) (HI op2))
|
(sequence((HI op1) (HI op2))
|
(set op1 (and frsr1 #xffff))
|
(set op1 (and frsr1 #xffff))
|
(if (or (lt op1 (const -32768)) (gt op1 (const 32767)))
|
(if (or (lt op1 (const -32768)) (gt op1 (const 32767)))
|
(error "operand out of range")
|
(error "operand out of range")
|
)
|
)
|
(set op2 (and imm16 #xffff))
|
(set op2 (and imm16 #xffff))
|
(if (eq op1 (const 0))
|
(if (eq op1 (const 0))
|
(error "op1 is 0")
|
(error "op1 is 0")
|
)
|
)
|
(if (eq op2 (const 0))
|
(if (eq op2 (const 0))
|
(error "op2 is 0")
|
(error "op2 is 0")
|
)
|
)
|
(set frdr (mul SI (ext SI op1) (ext SI op2)))
|
(set frdr (mul SI (ext SI op1) (ext SI op2)))
|
)
|
)
|
()
|
()
|
)
|
)
|
|
|
; Logical Instructions
|
; Logical Instructions
|
|
|
(dni and "AND DstReg, SrcReg1, SrcReg2"
|
(dni and "AND DstReg, SrcReg1, SrcReg2"
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
"and $frdrrr,$frsr1,$frsr2"
|
"and $frdrrr,$frsr1,$frsr2"
|
(+ MSYS_NO OPC_AND IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(+ MSYS_NO OPC_AND IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(set frdrrr (and frsr1 frsr2))
|
(set frdrrr (and frsr1 frsr2))
|
()
|
()
|
)
|
)
|
|
|
(dni andi "ANDI DstReg, SrcReg1, UnsImm"
|
(dni andi "ANDI DstReg, SrcReg1, UnsImm"
|
(AL-INSN USES-FRDR USES-FRSR1)
|
(AL-INSN USES-FRDR USES-FRSR1)
|
"andi $frdr,$frsr1,#$imm16z"
|
"andi $frdr,$frsr1,#$imm16z"
|
(+ MSYS_NO OPC_AND IMM_YES frsr1 frdr imm16z)
|
(+ MSYS_NO OPC_AND IMM_YES frsr1 frdr imm16z)
|
(set frdr (and frsr1 (ext USI imm16z)))
|
(set frdr (and frsr1 (ext USI imm16z)))
|
()
|
()
|
)
|
)
|
|
|
(dni or "OR DstReg, SrcReg1, SrcReg2"
|
(dni or "OR DstReg, SrcReg1, SrcReg2"
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
"or $frdrrr,$frsr1,$frsr2"
|
"or $frdrrr,$frsr1,$frsr2"
|
(+ MSYS_NO OPC_OR IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(+ MSYS_NO OPC_OR IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(set frdrrr (or frsr1 frsr2))
|
(set frdrrr (or frsr1 frsr2))
|
()
|
()
|
)
|
)
|
|
|
(dni nop "nop"
|
(dni nop "nop"
|
()
|
()
|
"nop"
|
"nop"
|
(+ MSYS_NO OPC_OR IMM_NO (f-uu24 0))
|
(+ MSYS_NO OPC_OR IMM_NO (f-uu24 0))
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni ori "ORI DstReg, SrcReg1, UnsImm"
|
(dni ori "ORI DstReg, SrcReg1, UnsImm"
|
(AL-INSN USES-FRDR USES-FRSR1)
|
(AL-INSN USES-FRDR USES-FRSR1)
|
"ori $frdr,$frsr1,#$imm16z"
|
"ori $frdr,$frsr1,#$imm16z"
|
(+ MSYS_NO OPC_OR IMM_YES frsr1 frdr imm16z)
|
(+ MSYS_NO OPC_OR IMM_YES frsr1 frdr imm16z)
|
(set frdr (or frsr1 (ext USI imm16z)))
|
(set frdr (or frsr1 (ext USI imm16z)))
|
()
|
()
|
)
|
)
|
|
|
(dni xor "XOR DstReg, SrcReg1, SrcReg2"
|
(dni xor "XOR DstReg, SrcReg1, SrcReg2"
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
"xor $frdrrr,$frsr1,$frsr2"
|
"xor $frdrrr,$frsr1,$frsr2"
|
(+ MSYS_NO OPC_XOR IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(+ MSYS_NO OPC_XOR IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(set frdrrr (xor frsr1 frsr2))
|
(set frdrrr (xor frsr1 frsr2))
|
()
|
()
|
)
|
)
|
|
|
(dni xori "XORI DstReg, SrcReg1, UnsImm"
|
(dni xori "XORI DstReg, SrcReg1, UnsImm"
|
(AL-INSN USES-FRDR USES-FRSR1)
|
(AL-INSN USES-FRDR USES-FRSR1)
|
"xori $frdr,$frsr1,#$imm16z"
|
"xori $frdr,$frsr1,#$imm16z"
|
(+ MSYS_NO OPC_XOR IMM_YES frsr1 frdr imm16z)
|
(+ MSYS_NO OPC_XOR IMM_YES frsr1 frdr imm16z)
|
(set frdr (xor frsr1 (ext USI imm16z)))
|
(set frdr (xor frsr1 (ext USI imm16z)))
|
()
|
()
|
)
|
)
|
|
|
(dni nand "NAND DstReg, SrcReg1, SrcReg2"
|
(dni nand "NAND DstReg, SrcReg1, SrcReg2"
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
"nand $frdrrr,$frsr1,$frsr2"
|
"nand $frdrrr,$frsr1,$frsr2"
|
(+ MSYS_NO OPC_NAND IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(+ MSYS_NO OPC_NAND IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(set frdrrr (inv (and frsr1 frsr2)))
|
(set frdrrr (inv (and frsr1 frsr2)))
|
()
|
()
|
)
|
)
|
|
|
(dni nandi "NANDI DstReg, SrcReg1, UnsImm"
|
(dni nandi "NANDI DstReg, SrcReg1, UnsImm"
|
(AL-INSN USES-FRDR USES-FRSR1)
|
(AL-INSN USES-FRDR USES-FRSR1)
|
"nandi $frdr,$frsr1,#$imm16z"
|
"nandi $frdr,$frsr1,#$imm16z"
|
(+ MSYS_NO OPC_NAND IMM_YES frsr1 frdr imm16z)
|
(+ MSYS_NO OPC_NAND IMM_YES frsr1 frdr imm16z)
|
(set frdr (inv (and frsr1 (ext USI imm16z))))
|
(set frdr (inv (and frsr1 (ext USI imm16z))))
|
()
|
()
|
)
|
)
|
|
|
(dni nor "NOR DstReg, SrcReg1, SrcReg2"
|
(dni nor "NOR DstReg, SrcReg1, SrcReg2"
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
"nor $frdrrr,$frsr1,$frsr2"
|
"nor $frdrrr,$frsr1,$frsr2"
|
(+ MSYS_NO OPC_NOR IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(+ MSYS_NO OPC_NOR IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(set frdrrr (inv (or frsr1 frsr2)))
|
(set frdrrr (inv (or frsr1 frsr2)))
|
()
|
()
|
)
|
)
|
|
|
(dni nori "NORI DstReg, SrcReg1, UnsImm"
|
(dni nori "NORI DstReg, SrcReg1, UnsImm"
|
(AL-INSN USES-FRDR USES-FRSR1)
|
(AL-INSN USES-FRDR USES-FRSR1)
|
"nori $frdr,$frsr1,#$imm16z"
|
"nori $frdr,$frsr1,#$imm16z"
|
(+ MSYS_NO OPC_NOR IMM_YES frsr1 frdr imm16z)
|
(+ MSYS_NO OPC_NOR IMM_YES frsr1 frdr imm16z)
|
(set frdr (inv (or frsr1 (ext USI imm16z))))
|
(set frdr (inv (or frsr1 (ext USI imm16z))))
|
()
|
()
|
)
|
)
|
|
|
(dni xnor "XNOR DstReg, SrcReg1, SrcReg2"
|
(dni xnor "XNOR DstReg, SrcReg1, SrcReg2"
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
(AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
"xnor $frdrrr,$frsr1,$frsr2"
|
"xnor $frdrrr,$frsr1,$frsr2"
|
(+ MSYS_NO OPC_XNOR IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(+ MSYS_NO OPC_XNOR IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(set frdrrr (inv (xor frsr1 frsr2)))
|
(set frdrrr (inv (xor frsr1 frsr2)))
|
()
|
()
|
)
|
)
|
|
|
(dni xnori "XNORI DstReg, SrcReg1, UnsImm"
|
(dni xnori "XNORI DstReg, SrcReg1, UnsImm"
|
(AL-INSN USES-FRDR USES-FRSR1)
|
(AL-INSN USES-FRDR USES-FRSR1)
|
"xnori $frdr,$frsr1,#$imm16z"
|
"xnori $frdr,$frsr1,#$imm16z"
|
(+ MSYS_NO OPC_XNOR IMM_YES frsr1 frdr imm16z)
|
(+ MSYS_NO OPC_XNOR IMM_YES frsr1 frdr imm16z)
|
(set frdr (inv (xor frsr1 (ext USI imm16z))))
|
(set frdr (inv (xor frsr1 (ext USI imm16z))))
|
()
|
()
|
)
|
)
|
|
|
(dni ldui "LDUI DstReg, UnsImm"
|
(dni ldui "LDUI DstReg, UnsImm"
|
(AL-INSN USES-FRDR)
|
(AL-INSN USES-FRDR)
|
"ldui $frdr,#$imm16z"
|
"ldui $frdr,#$imm16z"
|
(+ MSYS_NO OPC_LDUI IMM_YES (f-uu4b 0) frdr imm16z)
|
(+ MSYS_NO OPC_LDUI IMM_YES (f-uu4b 0) frdr imm16z)
|
(set frdr (and (sll imm16z 16) #xffff0000))
|
(set frdr (and (sll imm16z 16) #xffff0000))
|
()
|
()
|
)
|
)
|
|
|
; Shift Instructions
|
; Shift Instructions
|
|
|
(dni lsl "LSL DstReg, SrcReg1, SrcReg2"
|
(dni lsl "LSL DstReg, SrcReg1, SrcReg2"
|
(USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
(USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
"lsl $frdrrr,$frsr1,$frsr2"
|
"lsl $frdrrr,$frsr1,$frsr2"
|
(+ MSYS_NO OPC_LSL IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(+ MSYS_NO OPC_LSL IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(set frdrrr (sll frsr1 frsr2))
|
(set frdrrr (sll frsr1 frsr2))
|
()
|
()
|
)
|
)
|
|
|
(dni lsli "LSLI DstReg, SrcReg1, UnsImm"
|
(dni lsli "LSLI DstReg, SrcReg1, UnsImm"
|
(USES-FRDR USES-FRSR1)
|
(USES-FRDR USES-FRSR1)
|
"lsli $frdr,$frsr1,#$imm16"
|
"lsli $frdr,$frsr1,#$imm16"
|
(+ MSYS_NO OPC_LSL IMM_YES frsr1 frdr imm16)
|
(+ MSYS_NO OPC_LSL IMM_YES frsr1 frdr imm16)
|
(set frdr (sll frsr1 imm16))
|
(set frdr (sll frsr1 imm16))
|
()
|
()
|
)
|
)
|
|
|
(dni lsr "LSR DstReg, SrcReg1, SrcReg2"
|
(dni lsr "LSR DstReg, SrcReg1, SrcReg2"
|
(USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
(USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
"lsr $frdrrr,$frsr1,$frsr2"
|
"lsr $frdrrr,$frsr1,$frsr2"
|
(+ MSYS_NO OPC_LSR IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(+ MSYS_NO OPC_LSR IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(set frdrrr (srl frsr1 frsr2))
|
(set frdrrr (srl frsr1 frsr2))
|
()
|
()
|
)
|
)
|
|
|
(dni lsri "LSRI DstReg, SrcReg1, UnsImm"
|
(dni lsri "LSRI DstReg, SrcReg1, UnsImm"
|
(USES-FRDR USES-FRSR1)
|
(USES-FRDR USES-FRSR1)
|
"lsri $frdr,$frsr1,#$imm16"
|
"lsri $frdr,$frsr1,#$imm16"
|
(+ MSYS_NO OPC_LSR IMM_YES frsr1 frdr imm16)
|
(+ MSYS_NO OPC_LSR IMM_YES frsr1 frdr imm16)
|
(set frdr (srl frsr1 imm16))
|
(set frdr (srl frsr1 imm16))
|
()
|
()
|
)
|
)
|
|
|
(dni asr "ASR DstReg, SrcReg1, SrcReg2"
|
(dni asr "ASR DstReg, SrcReg1, SrcReg2"
|
(USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
(USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
"asr $frdrrr,$frsr1,$frsr2"
|
"asr $frdrrr,$frsr1,$frsr2"
|
(+ MSYS_NO OPC_ASR IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(+ MSYS_NO OPC_ASR IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
|
(set frdrrr (sra frsr1 frsr2))
|
(set frdrrr (sra frsr1 frsr2))
|
()
|
()
|
)
|
)
|
|
|
(dni asri "ASRI DstReg, SrcReg1, UnsImm"
|
(dni asri "ASRI DstReg, SrcReg1, UnsImm"
|
(USES-FRDR USES-FRSR1)
|
(USES-FRDR USES-FRSR1)
|
"asri $frdr,$frsr1,#$imm16"
|
"asri $frdr,$frsr1,#$imm16"
|
(+ MSYS_NO OPC_ASR IMM_YES frsr1 frdr imm16)
|
(+ MSYS_NO OPC_ASR IMM_YES frsr1 frdr imm16)
|
(set frdr (sra frsr1 imm16))
|
(set frdr (sra frsr1 imm16))
|
()
|
()
|
)
|
)
|
|
|
; Control Transfer Instructions
|
; Control Transfer Instructions
|
|
|
(dni brlt "BRLT SrcReg1, SrcReg2, label"
|
(dni brlt "BRLT SrcReg1, SrcReg2, label"
|
(BR-INSN DELAY-SLOT USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
(BR-INSN DELAY-SLOT USES-FRDRRR USES-FRSR1 USES-FRSR2)
|
"brlt $frsr1,$frsr2,$imm16o"
|
"brlt $frsr1,$frsr2,$imm16o"
|
(+ MSYS_NO OPC_BRLT IMM_YES frsr1 frsr2 imm16o)
|
(+ MSYS_NO OPC_BRLT IMM_YES frsr1 frsr2 imm16o)
|
(sequence()
|
(sequence()
|
(if (lt USI frsr1 frsr2)
|
(if (lt USI frsr1 frsr2)
|
(dset pc (add pc (ext SI imm16o))))
|
(dset pc (add pc (ext SI imm16o))))
|
)
|
)
|
()
|
()
|
)
|
)
|
|
|
(dni brle "BRLE SrcReg1, SrcReg2, label"
|
(dni brle "BRLE SrcReg1, SrcReg2, label"
|
(BR-INSN DELAY-SLOT USES-FRSR1 USES-FRSR2)
|
(BR-INSN DELAY-SLOT USES-FRSR1 USES-FRSR2)
|
"brle $frsr1,$frsr2,$imm16o"
|
"brle $frsr1,$frsr2,$imm16o"
|
(+ MSYS_NO OPC_BRLE IMM_YES frsr1 frsr2 imm16o)
|
(+ MSYS_NO OPC_BRLE IMM_YES frsr1 frsr2 imm16o)
|
(sequence()
|
(sequence()
|
(if (le USI frsr1 frsr2)
|
(if (le USI frsr1 frsr2)
|
(dset pc (add pc (ext SI imm16o))))
|
(dset pc (add pc (ext SI imm16o))))
|
)
|
)
|
()
|
()
|
)
|
)
|
|
|
(dni breq "BREQ SrcReg1, SrcReg2, label"
|
(dni breq "BREQ SrcReg1, SrcReg2, label"
|
(BR-INSN DELAY-SLOT USES-FRSR1 USES-FRSR2)
|
(BR-INSN DELAY-SLOT USES-FRSR1 USES-FRSR2)
|
"breq $frsr1,$frsr2,$imm16o"
|
"breq $frsr1,$frsr2,$imm16o"
|
(+ MSYS_NO OPC_BREQ IMM_YES frsr1 frsr2 imm16o)
|
(+ MSYS_NO OPC_BREQ IMM_YES frsr1 frsr2 imm16o)
|
(sequence()
|
(sequence()
|
(if (eq USI frsr1 frsr2)
|
(if (eq USI frsr1 frsr2)
|
(dset pc (add pc (ext SI imm16o))))
|
(dset pc (add pc (ext SI imm16o))))
|
)
|
)
|
()
|
()
|
)
|
)
|
|
|
(dni brne "BRNE SrcReg1, SrcReg2, label"
|
(dni brne "BRNE SrcReg1, SrcReg2, label"
|
(BR-INSN DELAY-SLOT USES-FRSR1 USES-FRSR2)
|
(BR-INSN DELAY-SLOT USES-FRSR1 USES-FRSR2)
|
"brne $frsr1,$frsr2,$imm16o"
|
"brne $frsr1,$frsr2,$imm16o"
|
(+ MSYS_NO OPC_BRNEQ IMM_YES frsr1 frsr2 imm16o)
|
(+ MSYS_NO OPC_BRNEQ IMM_YES frsr1 frsr2 imm16o)
|
(sequence()
|
(sequence()
|
(if (not (eq USI frsr1 frsr2))
|
(if (not (eq USI frsr1 frsr2))
|
(dset pc (add pc (ext SI imm16o))))
|
(dset pc (add pc (ext SI imm16o))))
|
)
|
)
|
()
|
()
|
)
|
)
|
|
|
(dni jmp "JMP, label"
|
(dni jmp "JMP, label"
|
(DELAY-SLOT BR-INSN)
|
(DELAY-SLOT BR-INSN)
|
"jmp $imm16o"
|
"jmp $imm16o"
|
(+ MSYS_NO OPC_JMP IMM_YES (f-uu4b 0) (f-uu4a 0) imm16o)
|
(+ MSYS_NO OPC_JMP IMM_YES (f-uu4b 0) (f-uu4a 0) imm16o)
|
(dset pc (add pc (ext SI imm16o)))
|
(dset pc (add pc (ext SI imm16o)))
|
()
|
()
|
)
|
)
|
|
|
(dni jal "JAL DstReg, SrcReg1"
|
(dni jal "JAL DstReg, SrcReg1"
|
(BR-INSN DELAY-SLOT BR-INSN USES-FRDR USES-FRSR1 JAL-HAZARD)
|
(BR-INSN DELAY-SLOT BR-INSN USES-FRDR USES-FRSR1 JAL-HAZARD)
|
"jal $frdrrr,$frsr1"
|
"jal $frdrrr,$frsr1"
|
(+ MSYS_NO OPC_JAL IMM_NO frsr1 (f-uu4a 0) frdrrr (f-uu12 0))
|
(+ MSYS_NO OPC_JAL IMM_NO frsr1 (f-uu4a 0) frdrrr (f-uu12 0))
|
(sequence()
|
(sequence()
|
(if (eq frsr1 #x0)
|
(if (eq frsr1 #x0)
|
(c-call VOID "do_syscall" pc)
|
(c-call VOID "do_syscall" pc)
|
(sequence() ; else part. Do non-syscall stuff here.
|
(sequence() ; else part. Do non-syscall stuff here.
|
(dset frdrrr (add pc #x8))
|
(dset frdrrr (add pc #x8))
|
(dset pc frsr1)
|
(dset pc frsr1)
|
)
|
)
|
)
|
)
|
)
|
)
|
()
|
()
|
)
|
)
|
|
|
(dni dbnz "DBNZ SrcReg1, label"
|
(dni dbnz "DBNZ SrcReg1, label"
|
((MACH ms1-003,ms2) BR-INSN DELAY-SLOT USES-FRSR1)
|
((MACH ms1-003,ms2) BR-INSN DELAY-SLOT USES-FRSR1)
|
"dbnz $frsr1,$imm16o"
|
"dbnz $frsr1,$imm16o"
|
(+ MSYS_NO OPC_DBNZ IMM_YES frsr1 (f-uu4a 0) imm16o)
|
(+ MSYS_NO OPC_DBNZ IMM_YES frsr1 (f-uu4a 0) imm16o)
|
(sequence()
|
(sequence()
|
(if (not (eq USI frsr1 0))
|
(if (not (eq USI frsr1 0))
|
(dset pc (add pc (ext SI imm16o))))
|
(dset pc (add pc (ext SI imm16o))))
|
)
|
)
|
()
|
()
|
)
|
)
|
|
|
; Interrupt Control Instructions
|
; Interrupt Control Instructions
|
|
|
(dni ei "EI - Enable Interrupt Processing"
|
(dni ei "EI - Enable Interrupt Processing"
|
()
|
()
|
"ei"
|
"ei"
|
(+ MSYS_NO OPC_EI IMM_NO (f-uu4b 0) (f-uu4a 0) (f-uu16 0))
|
(+ MSYS_NO OPC_EI IMM_NO (f-uu4b 0) (f-uu4a 0) (f-uu16 0))
|
(c-call VOID "enable_interrupts")
|
(c-call VOID "enable_interrupts")
|
()
|
()
|
)
|
)
|
|
|
(dni di "DI - Disable Interrupt Processing"
|
(dni di "DI - Disable Interrupt Processing"
|
()
|
()
|
"di"
|
"di"
|
(+ MSYS_NO OPC_DI IMM_NO (f-uu4b 0) (f-uu4a 0) (f-uu16 0))
|
(+ MSYS_NO OPC_DI IMM_NO (f-uu4b 0) (f-uu4a 0) (f-uu16 0))
|
(c-call VOID "disable_interrupts")
|
(c-call VOID "disable_interrupts")
|
()
|
()
|
)
|
)
|
|
|
(dni si "SI - Send software Interrupt"
|
(dni si "SI - Send software Interrupt"
|
(DELAY-SLOT BR-INSN USES-FRDR)
|
(DELAY-SLOT BR-INSN USES-FRDR)
|
"si $frdrrr"
|
"si $frdrrr"
|
(+ MSYS_NO OPC_SI IMM_NO (f-uu4b 0) (f-uu4a 0) frdrrr (f-uu12 0))
|
(+ MSYS_NO OPC_SI IMM_NO (f-uu4b 0) (f-uu4a 0) frdrrr (f-uu12 0))
|
;(sequence()
|
;(sequence()
|
; (dset frdr (add pc #x4))
|
; (dset frdr (add pc #x4))
|
; (c-call VOID "do_syscall1" pc)
|
; (c-call VOID "do_syscall1" pc)
|
; ; (dset pc frsr1) Do this later when we have the address.
|
; ; (dset pc frsr1) Do this later when we have the address.
|
;)
|
;)
|
(sequence()
|
(sequence()
|
(set frdrrr (add pc #x4))
|
(set frdrrr (add pc #x4))
|
(c-call VOID "do_syscall" pc)
|
(c-call VOID "do_syscall" pc)
|
; (set pc frsr1) Do this later when we have the address.
|
; (set pc frsr1) Do this later when we have the address.
|
)
|
)
|
()
|
()
|
)
|
)
|
|
|
(dni reti "RETI SrcReg1"
|
(dni reti "RETI SrcReg1"
|
(DELAY-SLOT BR-INSN USES-FRSR1 JAL-HAZARD)
|
(DELAY-SLOT BR-INSN USES-FRSR1 JAL-HAZARD)
|
"reti $frsr1"
|
"reti $frsr1"
|
(+ MSYS_NO OPC_RETI IMM_NO frsr1 (f-uu4a 0) (f-uu16 0))
|
(+ MSYS_NO OPC_RETI IMM_NO frsr1 (f-uu4a 0) (f-uu16 0))
|
(sequence()
|
(sequence()
|
(c-call VOID "enable_interrupts")
|
(c-call VOID "enable_interrupts")
|
(dset pc frsr1)
|
(dset pc frsr1)
|
)
|
)
|
()
|
()
|
)
|
)
|
|
|
; Memory Access Instructions
|
; Memory Access Instructions
|
|
|
(dni ldw "LDW DstReg, SrcReg1, Imm"
|
(dni ldw "LDW DstReg, SrcReg1, Imm"
|
(LOAD-DELAY MEMORY-ACCESS USES-FRDR USES-FRSR1)
|
(LOAD-DELAY MEMORY-ACCESS USES-FRDR USES-FRSR1)
|
"ldw $frdr,$frsr1,#$imm16"
|
"ldw $frdr,$frsr1,#$imm16"
|
(+ MSYS_NO OPC_LDW IMM_YES frsr1 frdr imm16)
|
(+ MSYS_NO OPC_LDW IMM_YES frsr1 frdr imm16)
|
(sequence((USI ea) (HI tmp))
|
(sequence((USI ea) (HI tmp))
|
(set HI tmp (and imm16 #xffff))
|
(set HI tmp (and imm16 #xffff))
|
(set ea (and (add SI frsr1 (ext SI tmp)) #xfffffffc))
|
(set ea (and (add SI frsr1 (ext SI tmp)) #xfffffffc))
|
(set frdr (mem SI ea))
|
(set frdr (mem SI ea))
|
)
|
)
|
()
|
()
|
)
|
)
|
|
|
(dni stw "STW SrcReg2, SrcReg1, Imm"
|
(dni stw "STW SrcReg2, SrcReg1, Imm"
|
(MEMORY-ACCESS USES-FRSR1 USES-FRSR2)
|
(MEMORY-ACCESS USES-FRSR1 USES-FRSR2)
|
"stw $frsr2,$frsr1,#$imm16"
|
"stw $frsr2,$frsr1,#$imm16"
|
(+ MSYS_NO OPC_STW IMM_YES frsr1 frsr2 imm16)
|
(+ MSYS_NO OPC_STW IMM_YES frsr1 frsr2 imm16)
|
(sequence((USI ea) (HI tmp))
|
(sequence((USI ea) (HI tmp))
|
(set HI tmp (and imm16 #xffff))
|
(set HI tmp (and imm16 #xffff))
|
(set ea (and (add SI frsr1 (ext SI tmp)) #xfffffffc))
|
(set ea (and (add SI frsr1 (ext SI tmp)) #xfffffffc))
|
(set (mem SI ea) frsr2)
|
(set (mem SI ea) frsr2)
|
)
|
)
|
()
|
()
|
)
|
)
|
|
|
; Break Instruction
|
; Break Instruction
|
|
|
(dni break "BREAK"
|
(dni break "BREAK"
|
()
|
()
|
"break"
|
"break"
|
(+ MSYS_NO OPC_BREAK (f-imm 0) (f-uu24 0))
|
(+ MSYS_NO OPC_BREAK (f-imm 0) (f-uu24 0))
|
(c-call VOID "do_break" pc)
|
(c-call VOID "do_break" pc)
|
()
|
()
|
)
|
)
|
|
|
; Cache Flush Instruction
|
; Cache Flush Instruction
|
|
|
(dni iflush "IFLUSH"
|
(dni iflush "IFLUSH"
|
((MACH ms1-003,ms2))
|
((MACH ms1-003,ms2))
|
"iflush"
|
"iflush"
|
(+ MSYS_NO OPC_IFLUSH (f-imm 0) (f-uu24 0))
|
(+ MSYS_NO OPC_IFLUSH (f-imm 0) (f-uu24 0))
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
; MorphoSys Instructions
|
; MorphoSys Instructions
|
|
|
(dni ldctxt "LDCTXT SRC1, SRC2, r/c, r/c#, context#"
|
(dni ldctxt "LDCTXT SRC1, SRC2, r/c, r/c#, context#"
|
((MACH ms1))
|
((MACH ms1))
|
"ldctxt $frsr1,$frsr2,#$rc,#$rcnum,#$contnum"
|
"ldctxt $frsr1,$frsr2,#$rc,#$rcnum,#$contnum"
|
(+ MSYS_YES MSOPC_LDCTXT (f-uu-2-25 0) frsr1 frsr2 rc rcnum (f-uu-3-11 0)
|
(+ MSYS_YES MSOPC_LDCTXT (f-uu-2-25 0) frsr1 frsr2 rc rcnum (f-uu-3-11 0)
|
contnum )
|
contnum )
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni ldfb "LDFB SRC1, byte#"
|
(dni ldfb "LDFB SRC1, byte#"
|
((MACH ms1))
|
((MACH ms1))
|
"ldfb $frsr1,$frsr2,#$imm16z"
|
"ldfb $frsr1,$frsr2,#$imm16z"
|
(+ MSYS_YES MSOPC_LDFB (f-uu-2-25 0) frsr1 frsr2 imm16z)
|
(+ MSYS_YES MSOPC_LDFB (f-uu-2-25 0) frsr1 frsr2 imm16z)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni stfb "STFB SRC1, SRC2, byte "
|
(dni stfb "STFB SRC1, SRC2, byte "
|
((MACH ms1))
|
((MACH ms1))
|
"stfb $frsr1,$frsr2,#$imm16z"
|
"stfb $frsr1,$frsr2,#$imm16z"
|
(+ MSYS_YES MSOPC_STFB (f-uu-2-25 0) frsr1 frsr2 imm16z)
|
(+ MSYS_YES MSOPC_STFB (f-uu-2-25 0) frsr1 frsr2 imm16z)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni fbcb "FBCB SRC1, RT/BR1/BR2/CS, B_all, B_r_c, r/c, CB/RB, cell, dup, ctx_disp"
|
(dni fbcb "FBCB SRC1, RT/BR1/BR2/CS, B_all, B_r_c, r/c, CB/RB, cell, dup, ctx_disp"
|
((MACH ms1,ms1-003))
|
((MACH ms1,ms1-003))
|
"fbcb $frsr1,#$rbbc,#$ball,#$brc,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
|
"fbcb $frsr1,#$rbbc,#$ball,#$brc,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_FBCB rbbc frsr1 ball brc (f-uu-4-15 0) rc cbrb cell dup ctxdisp)
|
(+ MSYS_YES MSOPC_FBCB rbbc frsr1 ball brc (f-uu-4-15 0) rc cbrb cell dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni mfbcb "MFBCB SRC1, RT/BR1/BR2/CS, SRC2, r/c, CB/RB, cell, dup, ctx_disp"
|
(dni mfbcb "MFBCB SRC1, RT/BR1/BR2/CS, SRC2, r/c, CB/RB, cell, dup, ctx_disp"
|
()
|
()
|
"mfbcb $frsr1,#$rbbc,$frsr2,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
|
"mfbcb $frsr1,#$rbbc,$frsr2,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_MFBCB rbbc frsr1 frsr2 (f-uu-4-15 0) rc1 cbrb cell dup ctxdisp)
|
(+ MSYS_YES MSOPC_MFBCB rbbc frsr1 frsr2 (f-uu-4-15 0) rc1 cbrb cell dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni fbcci "FBCCI SRC1, RT/BR1/BR2/CS, B_all, B_r_c, FB_disp, cell, dup, ctx_disp"
|
(dni fbcci "FBCCI SRC1, RT/BR1/BR2/CS, B_all, B_r_c, FB_disp, cell, dup, ctx_disp"
|
()
|
()
|
"fbcci $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp"
|
"fbcci $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_FBCCI rbbc frsr1 ball brc fbdisp cell dup ctxdisp)
|
(+ MSYS_YES MSOPC_FBCCI rbbc frsr1 ball brc fbdisp cell dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni fbrci "FBRCI SRC1, RT/BR1/BR2/CS, B_all, B_r_c, FB_disp, cell, dup, ctx_disp"
|
(dni fbrci "FBRCI SRC1, RT/BR1/BR2/CS, B_all, B_r_c, FB_disp, cell, dup, ctx_disp"
|
()
|
()
|
"fbrci $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp"
|
"fbrci $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_FBRCI rbbc frsr1 ball brc fbdisp cell dup ctxdisp)
|
(+ MSYS_YES MSOPC_FBRCI rbbc frsr1 ball brc fbdisp cell dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni fbcri "FBCRI SRC1, RT/BR1/BR2/CS, B_all, B_r_c, FB_disp, cell, dup, ctx_disp"
|
(dni fbcri "FBCRI SRC1, RT/BR1/BR2/CS, B_all, B_r_c, FB_disp, cell, dup, ctx_disp"
|
()
|
()
|
"fbcri $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp"
|
"fbcri $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_FBCRI rbbc frsr1 ball brc fbdisp cell dup ctxdisp)
|
(+ MSYS_YES MSOPC_FBCRI rbbc frsr1 ball brc fbdisp cell dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni fbrri "FBRRI SRC1, RT/BR1/BR2/CS, B_all, B_r_c, FB_disp, cell, dup, ctx_disp"
|
(dni fbrri "FBRRI SRC1, RT/BR1/BR2/CS, B_all, B_r_c, FB_disp, cell, dup, ctx_disp"
|
()
|
()
|
"fbrri $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp"
|
"fbrri $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_FBRRI rbbc frsr1 ball brc fbdisp cell dup ctxdisp)
|
(+ MSYS_YES MSOPC_FBRRI rbbc frsr1 ball brc fbdisp cell dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni mfbcci "MFBCCI SRC1, RT/BR1/BR2/CS, SRC2, FB_disp, cell, dup, ctx_disp"
|
(dni mfbcci "MFBCCI SRC1, RT/BR1/BR2/CS, SRC2, FB_disp, cell, dup, ctx_disp"
|
()
|
()
|
"mfbcci $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp"
|
"mfbcci $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_MFBCCI rbbc frsr1 frsr2 fbdisp cell dup ctxdisp)
|
(+ MSYS_YES MSOPC_MFBCCI rbbc frsr1 frsr2 fbdisp cell dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni mfbrci "MFBRCI SRC1, RT/BR1/BR2/CS, SRC2, FB_disp, cell, dup, ctx_disp"
|
(dni mfbrci "MFBRCI SRC1, RT/BR1/BR2/CS, SRC2, FB_disp, cell, dup, ctx_disp"
|
()
|
()
|
"mfbrci $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp"
|
"mfbrci $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_MFBRCI rbbc frsr1 frsr2 fbdisp cell dup ctxdisp)
|
(+ MSYS_YES MSOPC_MFBRCI rbbc frsr1 frsr2 fbdisp cell dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni mfbcri "MFBCRI SRC1, RT/BR1/BR2/CS, SRC2, FB_disp, cell, dup, ctx_disp"
|
(dni mfbcri "MFBCRI SRC1, RT/BR1/BR2/CS, SRC2, FB_disp, cell, dup, ctx_disp"
|
()
|
()
|
"mfbcri $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp"
|
"mfbcri $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_MFBCRI rbbc frsr1 frsr2 fbdisp cell dup ctxdisp)
|
(+ MSYS_YES MSOPC_MFBCRI rbbc frsr1 frsr2 fbdisp cell dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni mfbrri "MFBRRI SRC1, RT/BR1/BR2/CS, SRC2, FB_disp, cell, dup, ctx_disp"
|
(dni mfbrri "MFBRRI SRC1, RT/BR1/BR2/CS, SRC2, FB_disp, cell, dup, ctx_disp"
|
()
|
()
|
"mfbrri $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp"
|
"mfbrri $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_MFBRRI rbbc frsr1 frsr2 fbdisp cell dup ctxdisp)
|
(+ MSYS_YES MSOPC_MFBRRI rbbc frsr1 frsr2 fbdisp cell dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni fbcbdr "FBCBDR SRC1, RT/BR1/BR2/CS, SRC2, B_all, B_r_c, r/c, CB/RB, cell, dup, ctx_disp"
|
(dni fbcbdr "FBCBDR SRC1, RT/BR1/BR2/CS, SRC2, B_all, B_r_c, r/c, CB/RB, cell, dup, ctx_disp"
|
()
|
()
|
"fbcbdr $frsr1,#$rbbc,$frsr2,#$ball2,#$brc2,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
|
"fbcbdr $frsr1,#$rbbc,$frsr2,#$ball2,#$brc2,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_FBCBDR rbbc frsr1 frsr2 ball2 brc2 rc1 cbrb cell dup ctxdisp)
|
(+ MSYS_YES MSOPC_FBCBDR rbbc frsr1 frsr2 ball2 brc2 rc1 cbrb cell dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni rcfbcb "RCFBCB RT/BR1/BR2/CS, type, B_all, B_r_c, row#, r/c, CB/RB, cell, dup, ctx_disp"
|
(dni rcfbcb "RCFBCB RT/BR1/BR2/CS, type, B_all, B_r_c, row#, r/c, CB/RB, cell, dup, ctx_disp"
|
()
|
()
|
"rcfbcb #$rbbc,#$type,#$ball,#$brc,#$rownum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
|
"rcfbcb #$rbbc,#$type,#$ball,#$brc,#$rownum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_RCFBCB rbbc (f-uu-2-23 0) type ball brc (f-uu-1-15 0) rownum rc1 cbrb cell dup ctxdisp)
|
(+ MSYS_YES MSOPC_RCFBCB rbbc (f-uu-2-23 0) type ball brc (f-uu-1-15 0) rownum rc1 cbrb cell dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni mrcfbcb "MRCFBCB SRC2, RT/BR1/BR2/CS, type, row#, r/c, CB/RB, cell, dup, ctx_disp"
|
(dni mrcfbcb "MRCFBCB SRC2, RT/BR1/BR2/CS, type, row#, r/c, CB/RB, cell, dup, ctx_disp"
|
()
|
()
|
"mrcfbcb $frsr2,#$rbbc,#$type,#$rownum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
|
"mrcfbcb $frsr2,#$rbbc,#$type,#$rownum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_MRCFBCB rbbc (f-uu-2-23 0) type frsr2 (f-uu-1-15 0) rownum rc1 cbrb cell dup ctxdisp)
|
(+ MSYS_YES MSOPC_MRCFBCB rbbc (f-uu-2-23 0) type frsr2 (f-uu-1-15 0) rownum rc1 cbrb cell dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni cbcast "CBCAST mask, r/c, ctx_disp "
|
(dni cbcast "CBCAST mask, r/c, ctx_disp "
|
()
|
()
|
"cbcast #$mask,#$rc2,#$ctxdisp"
|
"cbcast #$mask,#$rc2,#$ctxdisp"
|
(+ MSYS_YES MSOPC_CBCAST mask (f-uu-3-9 0) rc2 ctxdisp)
|
(+ MSYS_YES MSOPC_CBCAST mask (f-uu-3-9 0) rc2 ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni dupcbcast "DUPCBCAST mask, cell, r/c, ctx_disp "
|
(dni dupcbcast "DUPCBCAST mask, cell, r/c, ctx_disp "
|
()
|
()
|
"dupcbcast #$mask,#$cell,#$rc2,#$ctxdisp"
|
"dupcbcast #$mask,#$cell,#$rc2,#$ctxdisp"
|
(+ MSYS_YES MSOPC_DUPCBCAST mask cell rc2 ctxdisp)
|
(+ MSYS_YES MSOPC_DUPCBCAST mask cell rc2 ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni wfbi "WFBI Bank_address, row#, cell, dup, ctx_disp "
|
(dni wfbi "WFBI Bank_address, row#, cell, dup, ctx_disp "
|
()
|
()
|
"wfbi #$bankaddr,#$rownum1,#$cell,#$dup,#$ctxdisp"
|
"wfbi #$bankaddr,#$rownum1,#$cell,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_WFBI bankaddr rownum1 cell dup ctxdisp)
|
(+ MSYS_YES MSOPC_WFBI bankaddr rownum1 cell dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
;(dni wfb "WFB SRC1, SRC2, FB_disp, row#, ctx_disp"
|
;(dni wfb "WFB SRC1, SRC2, FB_disp, row#, ctx_disp"
|
; ()
|
; ()
|
; "wfb $frsr1,$frsr2,#$fbdisp,#$rownum,#$ctxdisp"
|
; "wfb $frsr1,$frsr2,#$fbdisp,#$rownum,#$ctxdisp"
|
; (+ MSYS_YES MSOPC_WFB (f-uu-2-25 0) frsr1 frsr2 fbdisp rownum (f-uu-1-6 0) ctxdisp)
|
; (+ MSYS_YES MSOPC_WFB (f-uu-2-25 0) frsr1 frsr2 fbdisp rownum (f-uu-1-6 0) ctxdisp)
|
; (nop)
|
; (nop)
|
; ()
|
; ()
|
;)
|
;)
|
|
|
(dni wfb "WFB, DRC1,SRC2,FB_disp,row#,ctx_disp"
|
(dni wfb "WFB, DRC1,SRC2,FB_disp,row#,ctx_disp"
|
()
|
()
|
"wfb $frsr1,$frsr2,#$fbdisp,#$rownum2,#$ctxdisp"
|
"wfb $frsr1,$frsr2,#$fbdisp,#$rownum2,#$ctxdisp"
|
(+ MSYS_YES MSOPC_WFB (f-uu-2-25 0) frsr1 frsr2 fbdisp rownum2 (f-uu-1-6 0) ctxdisp)
|
(+ MSYS_YES MSOPC_WFB (f-uu-2-25 0) frsr1 frsr2 fbdisp rownum2 (f-uu-1-6 0) ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
|
|
(dni rcrisc "RCRISC DEST, RT/BR1/BR2/CS, SRC1, column#, r/c, CB/RB, cell, dup, ctx_disp"
|
(dni rcrisc "RCRISC DEST, RT/BR1/BR2/CS, SRC1, column#, r/c, CB/RB, cell, dup, ctx_disp"
|
()
|
()
|
"rcrisc $frdrrr,#$rbbc,$frsr1,#$colnum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
|
"rcrisc $frdrrr,#$rbbc,$frsr1,#$colnum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_RCRISC rbbc frsr1 (f-uu-1-19 0) colnum frdrrr rc1 cbrb cell dup ctxdisp)
|
(+ MSYS_YES MSOPC_RCRISC rbbc frsr1 (f-uu-1-19 0) colnum frdrrr rc1 cbrb cell dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni fbcbinc "FBCBINC SRC1, RT/BR1/BR2/CS, Incr_amount, r/c, CB/RB, cell, dup, ctx_disp "
|
(dni fbcbinc "FBCBINC SRC1, RT/BR1/BR2/CS, Incr_amount, r/c, CB/RB, cell, dup, ctx_disp "
|
()
|
()
|
"fbcbinc $frsr1,#$rbbc,#$incamt,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
|
"fbcbinc $frsr1,#$rbbc,#$incamt,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_FBCBINC rbbc frsr1 incamt rc1 cbrb cell dup ctxdisp)
|
(+ MSYS_YES MSOPC_FBCBINC rbbc frsr1 incamt rc1 cbrb cell dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni rcxmode "RCXMODE SRC2, rd, wr, xmode, mask, FB_disp, row#, r/c, ctx_disp"
|
(dni rcxmode "RCXMODE SRC2, rd, wr, xmode, mask, FB_disp, row#, r/c, ctx_disp"
|
()
|
()
|
"rcxmode $frsr2,#$rda,#$wr,#$xmode,#$mask1,#$fbdisp,#$rownum2,#$rc2,#$ctxdisp"
|
"rcxmode $frsr2,#$rda,#$wr,#$xmode,#$mask1,#$fbdisp,#$rownum2,#$rc2,#$ctxdisp"
|
(+ MSYS_YES MSOPC_RCXMODE rda wr xmode mask1 frsr2 fbdisp rownum2 rc2 ctxdisp)
|
(+ MSYS_YES MSOPC_RCXMODE rda wr xmode mask1 frsr2 fbdisp rownum2 rc2 ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni interleaver "INTLVR ireg, mode, ireg, i/d, size"
|
(dni interleaver "INTLVR ireg, mode, ireg, i/d, size"
|
()
|
()
|
"intlvr $frsr1,#$mode,$frsr2,#$id,#$size"
|
"intlvr $frsr1,#$mode,$frsr2,#$id,#$size"
|
(+ MSYS_YES MSOPC_INTLVR mode frsr1 frsr2 (f-uu-1-15 0) id size)
|
(+ MSYS_YES MSOPC_INTLVR mode frsr1 frsr2 (f-uu-1-15 0) id size)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
;; Issue 66262: The documenatation gives the wrong order for
|
;; Issue 66262: The documenatation gives the wrong order for
|
;; the arguments to the WFBINC instruction.
|
;; the arguments to the WFBINC instruction.
|
(dni wfbinc "WFBINC type, ccb/rcb, incr, all, c/r, length, rca_row, word, dup, ctxt_disp"
|
(dni wfbinc "WFBINC type, ccb/rcb, incr, all, c/r, length, rca_row, word, dup, ctxt_disp"
|
((MACH ms1-003,ms2))
|
((MACH ms1-003,ms2))
|
"wfbinc #$rda,#$wr,#$fbincr,#$ball,#$colnum,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp"
|
"wfbinc #$rda,#$wr,#$fbincr,#$ball,#$colnum,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_WFBINC rda wr fbincr ball colnum length rownum1 rownum2 dup ctxdisp)
|
(+ MSYS_YES MSOPC_WFBINC rda wr fbincr ball colnum length rownum1 rownum2 dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni mwfbinc "MWFBINC mreg, type, ccb/rcb, incr, length, rca_row, word, dup, ctxt_disp"
|
(dni mwfbinc "MWFBINC mreg, type, ccb/rcb, incr, length, rca_row, word, dup, ctxt_disp"
|
((MACH ms1-003,ms2))
|
((MACH ms1-003,ms2))
|
"mwfbinc $frsr2,#$rda,#$wr,#$fbincr,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp"
|
"mwfbinc $frsr2,#$rda,#$wr,#$fbincr,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_MWFBINC rda wr fbincr frsr2 length rownum1 rownum2 dup ctxdisp)
|
(+ MSYS_YES MSOPC_MWFBINC rda wr fbincr frsr2 length rownum1 rownum2 dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni wfbincr "WFBINCR ireg, type, ccb/rcb, all, c/r, length, rca_row, word, dup, ctxt_disp"
|
(dni wfbincr "WFBINCR ireg, type, ccb/rcb, all, c/r, length, rca_row, word, dup, ctxt_disp"
|
((MACH ms1-003,ms2))
|
((MACH ms1-003,ms2))
|
"wfbincr $frsr1,#$rda,#$wr,#$ball,#$colnum,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp"
|
"wfbincr $frsr1,#$rda,#$wr,#$ball,#$colnum,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_WFBINCR rda wr frsr1 ball colnum length rownum1 rownum2 dup ctxdisp)
|
(+ MSYS_YES MSOPC_WFBINCR rda wr frsr1 ball colnum length rownum1 rownum2 dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni mwfbincr "MWFBINCR ireg, mreg, type, ccb/rcb, length, rca_row, word, dup, ctxt_disp"
|
(dni mwfbincr "MWFBINCR ireg, mreg, type, ccb/rcb, length, rca_row, word, dup, ctxt_disp"
|
((MACH ms1-003,ms2))
|
((MACH ms1-003,ms2))
|
"mwfbincr $frsr1,$frsr2,#$rda,#$wr,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp"
|
"mwfbincr $frsr1,$frsr2,#$rda,#$wr,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_MWFBINCR rda wr frsr1 frsr2 length rownum1 rownum2 dup ctxdisp)
|
(+ MSYS_YES MSOPC_MWFBINCR rda wr frsr1 frsr2 length rownum1 rownum2 dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni fbcbincs "FBCBINCS perm, all, c/r, cbs, incr, ccb/rcb, cdb/rdb, word, dup, ctxt_disp"
|
(dni fbcbincs "FBCBINCS perm, all, c/r, cbs, incr, ccb/rcb, cdb/rdb, word, dup, ctxt_disp"
|
((MACH ms1-003,ms2))
|
((MACH ms1-003,ms2))
|
"fbcbincs #$perm,#$a23,#$cr,#$cbs,#$incr,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp"
|
"fbcbincs #$perm,#$a23,#$cr,#$cbs,#$incr,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_FBCBINCS perm a23 cr cbs incr ccb cdb rownum2 dup ctxdisp)
|
(+ MSYS_YES MSOPC_FBCBINCS perm a23 cr cbs incr ccb cdb rownum2 dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni mfbcbincs "MFBCBINCS ireg, perm, cbs, incr, ccb/rcb, cdb/rdb, word, dup, ctxt_disp"
|
(dni mfbcbincs "MFBCBINCS ireg, perm, cbs, incr, ccb/rcb, cdb/rdb, word, dup, ctxt_disp"
|
((MACH ms1-003,ms2))
|
((MACH ms1-003,ms2))
|
"mfbcbincs $frsr1,#$perm,#$cbs,#$incr,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp"
|
"mfbcbincs $frsr1,#$perm,#$cbs,#$incr,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_MFBCBINCS perm frsr1 cbs incr ccb cdb rownum2 dup ctxdisp)
|
(+ MSYS_YES MSOPC_MFBCBINCS perm frsr1 cbs incr ccb cdb rownum2 dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni fbcbincrs "FBCBINCRS ireg, perm, all, c/r, cbs, ccb/rcb, cdb/rdb, word, dup, ctxt_disp"
|
(dni fbcbincrs "FBCBINCRS ireg, perm, all, c/r, cbs, ccb/rcb, cdb/rdb, word, dup, ctxt_disp"
|
((MACH ms1-003,ms2))
|
((MACH ms1-003,ms2))
|
"fbcbincrs $frsr1,#$perm,#$ball,#$colnum,#$cbx,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp"
|
"fbcbincrs $frsr1,#$perm,#$ball,#$colnum,#$cbx,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_FBCBINCRS perm frsr1 ball colnum (f-uu-1-15 0) cbx ccb cdb rownum2 dup ctxdisp)
|
(+ MSYS_YES MSOPC_FBCBINCRS perm frsr1 ball colnum (f-uu-1-15 0) cbx ccb cdb rownum2 dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni mfbcbincrs "MFBCBINCRS ireg, mreg, perm, cbs, ccb/rcb, cdb/rdb, word, dup, ctxt_disp"
|
(dni mfbcbincrs "MFBCBINCRS ireg, mreg, perm, cbs, ccb/rcb, cdb/rdb, word, dup, ctxt_disp"
|
((MACH ms1-003,ms2))
|
((MACH ms1-003,ms2))
|
"mfbcbincrs $frsr1,$frsr2,#$perm,#$cbx,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp"
|
"mfbcbincrs $frsr1,$frsr2,#$perm,#$cbx,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp"
|
(+ MSYS_YES MSOPC_MFBCBINCRS perm frsr1 frsr2 (f-uu-1-15 0) cbx ccb cdb rownum2 dup ctxdisp)
|
(+ MSYS_YES MSOPC_MFBCBINCRS perm frsr1 frsr2 (f-uu-1-15 0) cbx ccb cdb rownum2 dup ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
; MS2 instructions
|
; MS2 instructions
|
(dni loop "LOOP SrcReg1, label"
|
(dni loop "LOOP SrcReg1, label"
|
((MACH ms2) DELAY-SLOT USES-FRSR1)
|
((MACH ms2) DELAY-SLOT USES-FRSR1)
|
"loop $frsr1,$loopsize"
|
"loop $frsr1,$loopsize"
|
(+ MSYS_NO OPC_LOOP IMM_NO frsr1 (f-uu4a 0) (f-uu8 0) loopsize)
|
(+ MSYS_NO OPC_LOOP IMM_NO frsr1 (f-uu4a 0) (f-uu8 0) loopsize)
|
(nop) ;; to be filled in
|
(nop) ;; to be filled in
|
()
|
()
|
)
|
)
|
|
|
(dni loopi "LOOPI niter, label"
|
(dni loopi "LOOPI niter, label"
|
((MACH ms2) DELAY-SLOT)
|
((MACH ms2) DELAY-SLOT)
|
"loopi #$imm16l,$loopsize"
|
"loopi #$imm16l,$loopsize"
|
(+ MSYS_NO OPC_LOOP IMM_YES imm16l loopsize)
|
(+ MSYS_NO OPC_LOOP IMM_YES imm16l loopsize)
|
(nop) ;; to be filled in
|
(nop) ;; to be filled in
|
()
|
()
|
)
|
)
|
|
|
(dni dfbc "dfbc cb1sel,cb2sel,cb1inc,cb2inc,dr/c,cr/c,ctxdisp"
|
(dni dfbc "dfbc cb1sel,cb2sel,cb1inc,cb2inc,dr/c,cr/c,ctxdisp"
|
((MACH ms2))
|
((MACH ms2))
|
"dfbc #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc3,#$rc2,#$ctxdisp"
|
"dfbc #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc3,#$rc2,#$ctxdisp"
|
(+ MSYS_YES MSOPC_LDCTXT cb1sel cb2sel cb1incr cb2incr rc3 rc2 ctxdisp)
|
(+ MSYS_YES MSOPC_LDCTXT cb1sel cb2sel cb1incr cb2incr rc3 rc2 ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni dwfb "dwfb cb1sel,cb2sel,cb1inc,cb2inc,cr/c,ctxdisp"
|
(dni dwfb "dwfb cb1sel,cb2sel,cb1inc,cb2inc,cr/c,ctxdisp"
|
((MACH ms2))
|
((MACH ms2))
|
"dwfb #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc2,#$ctxdisp"
|
"dwfb #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc2,#$ctxdisp"
|
(+ MSYS_YES MSOPC_LDFB cb1sel cb2sel cb1incr cb2incr (f-uu1 0) rc2 ctxdisp)
|
(+ MSYS_YES MSOPC_LDFB cb1sel cb2sel cb1incr cb2incr (f-uu1 0) rc2 ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni fbwfb "fbwfb cb1sel,cb2sel,cb1inc,cb2inc,r0/1,cr/c,ctxdisp"
|
(dni fbwfb "fbwfb cb1sel,cb2sel,cb1inc,cb2inc,r0/1,cr/c,ctxdisp"
|
((MACH ms2))
|
((MACH ms2))
|
"fbwfb #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc3,#$rc2,#$ctxdisp"
|
"fbwfb #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc3,#$rc2,#$ctxdisp"
|
(+ MSYS_YES MSOPC_STFB cb1sel cb2sel cb1incr cb2incr rc3 rc2 ctxdisp)
|
(+ MSYS_YES MSOPC_STFB cb1sel cb2sel cb1incr cb2incr rc3 rc2 ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
(dni dfbr "dfbr cb1sel,cb2sel,reg,W/O1,W/O2,mode,cr/c,ctxdisp"
|
(dni dfbr "dfbr cb1sel,cb2sel,reg,W/O1,W/O2,mode,cr/c,ctxdisp"
|
((MACH ms2) USES-FRSR2)
|
((MACH ms2) USES-FRSR2)
|
"dfbr #$cb1sel,#$cb2sel,$frsr2,#$length,#$rownum1,#$rownum2,#$rc2,#$ctxdisp"
|
"dfbr #$cb1sel,#$cb2sel,$frsr2,#$length,#$rownum1,#$rownum2,#$rc2,#$ctxdisp"
|
(+ MSYS_YES MSOPC_FBCB cb1sel cb2sel frsr2 length rownum1 rownum2 rc2 ctxdisp)
|
(+ MSYS_YES MSOPC_FBCB cb1sel cb2sel frsr2 length rownum1 rownum2 rc2 ctxdisp)
|
(nop)
|
(nop)
|
()
|
()
|
)
|
)
|
|
|
