/* bfin-defs.h ADI Blackfin gas header file
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/* bfin-defs.h ADI Blackfin gas header file
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Copyright 2005, 2006, 2007
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Copyright 2005, 2006, 2007
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Free Software Foundation, Inc.
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Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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any later version.
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GAS is distributed in the hope that it will be useful,
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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02110-1301, USA. */
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#ifndef BFIN_PARSE_H
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#ifndef BFIN_PARSE_H
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#define BFIN_PARSE_H
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#define BFIN_PARSE_H
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#define PCREL 1
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#define PCREL 1
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#define CODE_FRAG_SIZE 4096 /* 1 page. */
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#define CODE_FRAG_SIZE 4096 /* 1 page. */
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/* Definition for all status bits. */
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/* Definition for all status bits. */
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typedef enum
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typedef enum
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{
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{
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c_0,
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c_0,
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c_1,
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c_1,
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c_4,
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c_4,
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c_2,
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c_2,
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c_uimm2,
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c_uimm2,
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c_uimm3,
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c_uimm3,
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c_imm3,
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c_imm3,
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c_pcrel4,
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c_pcrel4,
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c_imm4,
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c_imm4,
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c_uimm4s4,
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c_uimm4s4,
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c_uimm4,
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c_uimm4,
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c_uimm4s2,
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c_uimm4s2,
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c_negimm5s4,
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c_negimm5s4,
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c_imm5,
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c_imm5,
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c_uimm5,
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c_uimm5,
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c_imm6,
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c_imm6,
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c_imm7,
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c_imm7,
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c_imm8,
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c_imm8,
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c_uimm8,
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c_uimm8,
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c_pcrel8,
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c_pcrel8,
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c_uimm8s4,
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c_uimm8s4,
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c_pcrel8s4,
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c_pcrel8s4,
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c_lppcrel10,
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c_lppcrel10,
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c_pcrel10,
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c_pcrel10,
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c_pcrel12,
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c_pcrel12,
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c_imm16s4,
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c_imm16s4,
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c_luimm16,
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c_luimm16,
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c_imm16,
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c_imm16,
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c_huimm16,
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c_huimm16,
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c_rimm16,
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c_rimm16,
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c_imm16s2,
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c_imm16s2,
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c_uimm16s4,
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c_uimm16s4,
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c_uimm16,
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c_uimm16,
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c_pcrel24
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c_pcrel24
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} const_forms_t;
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} const_forms_t;
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/* High-Nibble: group code, low nibble: register code. */
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/* High-Nibble: group code, low nibble: register code. */
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#define T_REG_R 0x00
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#define T_REG_R 0x00
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#define T_REG_P 0x10
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#define T_REG_P 0x10
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#define T_REG_I 0x20
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#define T_REG_I 0x20
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#define T_REG_B 0x30
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#define T_REG_B 0x30
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#define T_REG_L 0x34
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#define T_REG_L 0x34
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#define T_REG_M 0x24
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#define T_REG_M 0x24
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#define T_REG_A 0x40
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#define T_REG_A 0x40
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/* All registers above this value don't
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/* All registers above this value don't
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belong to a usuable register group. */
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belong to a usuable register group. */
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#define T_NOGROUP 0xa0
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#define T_NOGROUP 0xa0
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/* Flags. */
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/* Flags. */
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#define F_REG_ALL 0x1000
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#define F_REG_ALL 0x1000
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#define F_REG_HIGH 0x2000 /* Half register: high half. */
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#define F_REG_HIGH 0x2000 /* Half register: high half. */
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enum machine_registers
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enum machine_registers
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{
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{
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REG_R0 = T_REG_R, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
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REG_R0 = T_REG_R, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
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REG_P0 = T_REG_P, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
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REG_P0 = T_REG_P, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
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REG_I0 = T_REG_I, REG_I1, REG_I2, REG_I3,
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REG_I0 = T_REG_I, REG_I1, REG_I2, REG_I3,
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REG_M0 = T_REG_M, REG_M1, REG_M2, REG_M3,
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REG_M0 = T_REG_M, REG_M1, REG_M2, REG_M3,
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REG_B0 = T_REG_B, REG_B1, REG_B2, REG_B3,
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REG_B0 = T_REG_B, REG_B1, REG_B2, REG_B3,
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REG_L0 = T_REG_L, REG_L1, REG_L2, REG_L3,
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REG_L0 = T_REG_L, REG_L1, REG_L2, REG_L3,
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REG_A0x = T_REG_A, REG_A0w, REG_A1x, REG_A1w,
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REG_A0x = T_REG_A, REG_A0w, REG_A1x, REG_A1w,
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REG_ASTAT = 0x46,
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REG_ASTAT = 0x46,
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REG_RETS = 0x47,
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REG_RETS = 0x47,
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REG_LC0 = 0x60, REG_LT0, REG_LB0, REG_LC1, REG_LT1, REG_LB1,
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REG_LC0 = 0x60, REG_LT0, REG_LB0, REG_LC1, REG_LT1, REG_LB1,
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REG_CYCLES, REG_CYCLES2,
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REG_CYCLES, REG_CYCLES2,
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REG_USP = 0x70, REG_SEQSTAT, REG_SYSCFG,
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REG_USP = 0x70, REG_SEQSTAT, REG_SYSCFG,
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REG_RETI, REG_RETX, REG_RETN, REG_RETE, REG_EMUDAT,
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REG_RETI, REG_RETX, REG_RETN, REG_RETE, REG_EMUDAT,
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/* These don't have groups. */
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/* These don't have groups. */
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REG_sftreset = T_NOGROUP, REG_omode, REG_excause, REG_emucause,
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REG_sftreset = T_NOGROUP, REG_omode, REG_excause, REG_emucause,
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REG_idle_req, REG_hwerrcause,
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REG_idle_req, REG_hwerrcause,
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REG_A0 = 0xc0, REG_A1, REG_CC,
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REG_A0 = 0xc0, REG_A1, REG_CC,
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/* Pseudo registers, used only for distinction from symbols. */
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/* Pseudo registers, used only for distinction from symbols. */
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REG_RL0, REG_RL1, REG_RL2, REG_RL3,
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REG_RL0, REG_RL1, REG_RL2, REG_RL3,
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REG_RL4, REG_RL5, REG_RL6, REG_RL7,
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REG_RL4, REG_RL5, REG_RL6, REG_RL7,
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REG_RH0, REG_RH1, REG_RH2, REG_RH3,
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REG_RH0, REG_RH1, REG_RH2, REG_RH3,
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REG_RH4, REG_RH5, REG_RH6, REG_RH7,
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REG_RH4, REG_RH5, REG_RH6, REG_RH7,
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REG_LASTREG
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REG_LASTREG
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};
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};
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/* Status register flags. */
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/* Status register flags. */
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enum statusflags
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enum statusflags
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{
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{
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S_AZ = 0,
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S_AZ = 0,
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S_AN,
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S_AN,
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S_AQ = 6,
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S_AQ = 6,
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S_AC0 = 12,
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S_AC0 = 12,
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S_AC1,
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S_AC1,
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S_AV0 = 16,
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S_AV0 = 16,
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S_AV0S,
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S_AV0S,
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S_AV1,
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S_AV1,
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S_AV1S,
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S_AV1S,
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S_V = 24,
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S_V = 24,
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S_VS = 25
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S_VS = 25
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};
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};
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enum reg_class
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enum reg_class
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{
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{
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rc_dregs_lo,
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rc_dregs_lo,
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rc_dregs_hi,
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rc_dregs_hi,
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rc_dregs,
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rc_dregs,
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rc_dregs_pair,
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rc_dregs_pair,
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rc_pregs,
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rc_pregs,
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rc_spfp,
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rc_spfp,
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rc_dregs_hilo,
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rc_dregs_hilo,
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rc_accum_ext,
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rc_accum_ext,
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rc_accum_word,
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rc_accum_word,
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rc_accum,
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rc_accum,
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rc_iregs,
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rc_iregs,
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rc_mregs,
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rc_mregs,
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rc_bregs,
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rc_bregs,
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rc_lregs,
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rc_lregs,
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rc_dpregs,
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rc_dpregs,
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rc_gregs,
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rc_gregs,
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rc_regs,
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rc_regs,
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rc_statbits,
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rc_statbits,
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rc_ignore_bits,
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rc_ignore_bits,
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rc_ccstat,
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rc_ccstat,
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rc_counters,
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rc_counters,
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rc_dregs2_sysregs1,
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rc_dregs2_sysregs1,
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rc_open,
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rc_open,
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rc_sysregs2,
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rc_sysregs2,
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rc_sysregs3,
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rc_sysregs3,
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rc_allregs,
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rc_allregs,
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LIM_REG_CLASSES
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LIM_REG_CLASSES
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};
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};
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/* mmod field. */
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/* mmod field. */
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#define M_S2RND 1
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#define M_S2RND 1
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#define M_T 2
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#define M_T 2
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#define M_W32 3
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#define M_W32 3
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#define M_FU 4
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#define M_FU 4
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#define M_TFU 6
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#define M_TFU 6
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#define M_IS 8
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#define M_IS 8
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#define M_ISS2 9
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#define M_ISS2 9
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#define M_IH 11
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#define M_IH 11
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#define M_IU 12
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#define M_IU 12
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/* Register type checking macros. */
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/* Register type checking macros. */
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#define CODE_MASK 0x07
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#define CODE_MASK 0x07
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#define CLASS_MASK 0xf0
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#define CLASS_MASK 0xf0
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#define REG_SAME(a, b) ((a).regno == (b).regno)
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#define REG_SAME(a, b) ((a).regno == (b).regno)
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#define REG_EQUAL(a, b) (((a).regno & CODE_MASK) == ((b).regno & CODE_MASK))
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#define REG_EQUAL(a, b) (((a).regno & CODE_MASK) == ((b).regno & CODE_MASK))
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#define REG_CLASS(a) ((a.regno) & 0xf0)
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#define REG_CLASS(a) ((a.regno) & 0xf0)
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#define IS_A1(a) ((a).regno == REG_A1)
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#define IS_A1(a) ((a).regno == REG_A1)
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#define IS_H(a) ((a).regno & F_REG_HIGH ? 1: 0)
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#define IS_H(a) ((a).regno & F_REG_HIGH ? 1: 0)
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#define IS_EVEN(r) (r.regno % 2 == 0)
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#define IS_EVEN(r) (r.regno % 2 == 0)
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#define IS_HCOMPL(a, b) (REG_EQUAL(a, b) && \
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#define IS_HCOMPL(a, b) (REG_EQUAL(a, b) && \
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((a).regno & F_REG_HIGH) != ((b).regno & F_REG_HIGH))
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((a).regno & F_REG_HIGH) != ((b).regno & F_REG_HIGH))
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/* register type checking. */
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/* register type checking. */
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#define _TYPECHECK(r, x) (((r).regno & CLASS_MASK) == T_REG_##x)
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#define _TYPECHECK(r, x) (((r).regno & CLASS_MASK) == T_REG_##x)
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#define IS_DREG(r) _TYPECHECK(r, R)
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#define IS_DREG(r) _TYPECHECK(r, R)
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#define IS_DREG_H(r) (_TYPECHECK(r, R) && IS_H(r))
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#define IS_DREG_H(r) (_TYPECHECK(r, R) && IS_H(r))
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#define IS_DREG_L(r) (_TYPECHECK(r, R) && !IS_H(r))
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#define IS_DREG_L(r) (_TYPECHECK(r, R) && !IS_H(r))
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#define IS_PREG(r) _TYPECHECK(r, P)
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#define IS_PREG(r) _TYPECHECK(r, P)
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#define IS_IREG(r) (((r).regno & 0xf4) == T_REG_I)
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#define IS_IREG(r) (((r).regno & 0xf4) == T_REG_I)
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#define IS_MREG(r) (((r).regno & 0xf4) == T_REG_M)
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#define IS_MREG(r) (((r).regno & 0xf4) == T_REG_M)
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#define IS_BREG(r) (((r).regno & 0xf4) == T_REG_B)
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#define IS_BREG(r) (((r).regno & 0xf4) == T_REG_B)
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#define IS_LREG(r) (((r).regno & 0xf4) == T_REG_L)
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#define IS_LREG(r) (((r).regno & 0xf4) == T_REG_L)
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#define IS_CREG(r) ((r).regno == REG_LC0 || (r).regno == REG_LC1)
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#define IS_CREG(r) ((r).regno == REG_LC0 || (r).regno == REG_LC1)
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#define IS_ALLREG(r) ((r).regno < T_NOGROUP)
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#define IS_ALLREG(r) ((r).regno < T_NOGROUP)
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/* Expression value macros. */
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/* Expression value macros. */
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typedef enum
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typedef enum
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{
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{
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ones_compl,
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ones_compl,
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twos_compl,
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twos_compl,
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mult,
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mult,
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divide,
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divide,
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mod,
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mod,
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add,
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add,
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sub,
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sub,
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lsh,
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lsh,
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rsh,
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rsh,
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logand,
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logand,
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logior,
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logior,
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logxor
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logxor
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} expr_opcodes_t;
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} expr_opcodes_t;
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struct expressionS;
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struct expressionS;
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#define SYMBOL_T symbolS*
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#define SYMBOL_T symbolS*
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struct expression_cell
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struct expression_cell
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{
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{
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int value;
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int value;
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SYMBOL_T symbol;
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SYMBOL_T symbol;
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};
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};
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/* User Type Definitions. */
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/* User Type Definitions. */
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struct bfin_insn
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struct bfin_insn
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{
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{
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unsigned long value;
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unsigned long value;
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struct bfin_insn *next;
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struct bfin_insn *next;
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struct expression_cell *exp;
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struct expression_cell *exp;
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int pcrel;
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int pcrel;
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int reloc;
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int reloc;
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};
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};
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#define INSTR_T struct bfin_insn*
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#define INSTR_T struct bfin_insn*
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#define EXPR_T struct expression_cell*
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#define EXPR_T struct expression_cell*
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typedef struct expr_node_struct Expr_Node;
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typedef struct expr_node_struct Expr_Node;
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extern INSTR_T gencode (unsigned long x);
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extern INSTR_T gencode (unsigned long x);
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extern INSTR_T conscode (INSTR_T head, INSTR_T tail);
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extern INSTR_T conscode (INSTR_T head, INSTR_T tail);
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extern INSTR_T conctcode (INSTR_T head, INSTR_T tail);
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extern INSTR_T conctcode (INSTR_T head, INSTR_T tail);
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extern INSTR_T note_reloc
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extern INSTR_T note_reloc
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(INSTR_T code, Expr_Node *, int reloc,int pcrel);
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(INSTR_T code, Expr_Node *, int reloc,int pcrel);
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extern INSTR_T note_reloc1
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extern INSTR_T note_reloc1
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(INSTR_T code, const char * sym, int reloc, int pcrel);
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(INSTR_T code, const char * sym, int reloc, int pcrel);
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extern INSTR_T note_reloc2
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extern INSTR_T note_reloc2
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(INSTR_T code, const char *symbol, int reloc, int value, int pcrel);
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(INSTR_T code, const char *symbol, int reloc, int value, int pcrel);
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|
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/* Types of expressions. */
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/* Types of expressions. */
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typedef enum
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typedef enum
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{
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{
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Expr_Node_Binop, /* Binary operator. */
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Expr_Node_Binop, /* Binary operator. */
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Expr_Node_Unop, /* Unary operator. */
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Expr_Node_Unop, /* Unary operator. */
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Expr_Node_Reloc, /* Symbol to be relocated. */
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Expr_Node_Reloc, /* Symbol to be relocated. */
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Expr_Node_GOT_Reloc, /* Symbol to be relocated using the GOT. */
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Expr_Node_GOT_Reloc, /* Symbol to be relocated using the GOT. */
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Expr_Node_Constant /* Constant. */
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Expr_Node_Constant /* Constant. */
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} Expr_Node_Type;
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} Expr_Node_Type;
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|
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/* Types of operators. */
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/* Types of operators. */
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typedef enum
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typedef enum
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{
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{
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Expr_Op_Type_Add,
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Expr_Op_Type_Add,
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Expr_Op_Type_Sub,
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Expr_Op_Type_Sub,
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Expr_Op_Type_Mult,
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Expr_Op_Type_Mult,
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Expr_Op_Type_Div,
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Expr_Op_Type_Div,
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Expr_Op_Type_Mod,
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Expr_Op_Type_Mod,
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Expr_Op_Type_Lshift,
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Expr_Op_Type_Lshift,
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Expr_Op_Type_Rshift,
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Expr_Op_Type_Rshift,
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Expr_Op_Type_BAND, /* Bitwise AND. */
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Expr_Op_Type_BAND, /* Bitwise AND. */
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Expr_Op_Type_BOR, /* Bitwise OR. */
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Expr_Op_Type_BOR, /* Bitwise OR. */
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Expr_Op_Type_BXOR, /* Bitwise exclusive OR. */
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Expr_Op_Type_BXOR, /* Bitwise exclusive OR. */
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Expr_Op_Type_LAND, /* Logical AND. */
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Expr_Op_Type_LAND, /* Logical AND. */
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Expr_Op_Type_LOR, /* Logical OR. */
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Expr_Op_Type_LOR, /* Logical OR. */
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Expr_Op_Type_NEG,
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Expr_Op_Type_NEG,
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Expr_Op_Type_COMP /* Complement. */
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Expr_Op_Type_COMP /* Complement. */
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} Expr_Op_Type;
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} Expr_Op_Type;
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|
|
/* The value that can be stored ... depends on type. */
|
/* The value that can be stored ... depends on type. */
|
typedef union
|
typedef union
|
{
|
{
|
const char *s_value; /* if relocation symbol, the text. */
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const char *s_value; /* if relocation symbol, the text. */
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int i_value; /* if constant, the value. */
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int i_value; /* if constant, the value. */
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Expr_Op_Type op_value; /* if operator, the value. */
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Expr_Op_Type op_value; /* if operator, the value. */
|
} Expr_Node_Value;
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} Expr_Node_Value;
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|
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/* The expression node. */
|
/* The expression node. */
|
struct expr_node_struct
|
struct expr_node_struct
|
{
|
{
|
Expr_Node_Type type;
|
Expr_Node_Type type;
|
Expr_Node_Value value;
|
Expr_Node_Value value;
|
Expr_Node *Left_Child;
|
Expr_Node *Left_Child;
|
Expr_Node *Right_Child;
|
Expr_Node *Right_Child;
|
};
|
};
|
|
|
|
|
/* Operations on the expression node. */
|
/* Operations on the expression node. */
|
Expr_Node *Expr_Node_Create (Expr_Node_Type type,
|
Expr_Node *Expr_Node_Create (Expr_Node_Type type,
|
Expr_Node_Value value,
|
Expr_Node_Value value,
|
Expr_Node *Left_Child,
|
Expr_Node *Left_Child,
|
Expr_Node *Right_Child);
|
Expr_Node *Right_Child);
|
|
|
/* Generate the reloc structure as a series of instructions. */
|
/* Generate the reloc structure as a series of instructions. */
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INSTR_T Expr_Node_Gen_Reloc (Expr_Node *head, int parent_reloc);
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INSTR_T Expr_Node_Gen_Reloc (Expr_Node *head, int parent_reloc);
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#define MKREF(x) mkexpr (0,x)
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#define MKREF(x) mkexpr (0,x)
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#define ALLOCATE(x) malloc (x)
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#define ALLOCATE(x) malloc (x)
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#define NULL_CODE ((INSTR_T) 0)
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#define NULL_CODE ((INSTR_T) 0)
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#ifndef EXPR_VALUE
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#ifndef EXPR_VALUE
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#define EXPR_VALUE(x) (((x)->type == Expr_Node_Constant) ? ((x)->value.i_value) : 0)
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#define EXPR_VALUE(x) (((x)->type == Expr_Node_Constant) ? ((x)->value.i_value) : 0)
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#endif
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#endif
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#ifndef EXPR_SYMBOL
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#ifndef EXPR_SYMBOL
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#define EXPR_SYMBOL(x) ((x)->symbol)
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#define EXPR_SYMBOL(x) ((x)->symbol)
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#endif
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#endif
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typedef long reg_t;
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typedef long reg_t;
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typedef struct _register
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typedef struct _register
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{
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{
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reg_t regno; /* Register ID as defined in machine_registers. */
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reg_t regno; /* Register ID as defined in machine_registers. */
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int flags;
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int flags;
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} Register;
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} Register;
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typedef struct _macfunc
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typedef struct _macfunc
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{
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{
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char n;
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char n;
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char op;
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char op;
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char w;
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char w;
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char P;
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char P;
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Register dst;
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Register dst;
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Register s0;
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Register s0;
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Register s1;
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Register s1;
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} Macfunc;
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} Macfunc;
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typedef struct _opt_mode
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typedef struct _opt_mode
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{
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{
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int MM;
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int MM;
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int mod;
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int mod;
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} Opt_mode;
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} Opt_mode;
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typedef enum
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typedef enum
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{
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{
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SEMANTIC_ERROR,
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SEMANTIC_ERROR,
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NO_INSN_GENERATED,
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NO_INSN_GENERATED,
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INSN_GENERATED
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INSN_GENERATED
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} parse_state;
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} parse_state;
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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#endif
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#endif
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extern int debug_codeselection;
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extern int debug_codeselection;
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void error (char *format, ...);
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void error (char *format, ...);
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void warn (char *format, ...);
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void warn (char *format, ...);
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int semantic_error (char *syntax);
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int semantic_error (char *syntax);
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void semantic_error_2 (char *syntax);
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void semantic_error_2 (char *syntax);
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EXPR_T mkexpr (int, SYMBOL_T);
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EXPR_T mkexpr (int, SYMBOL_T);
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/* Defined in bfin-lex.l. */
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/* Defined in bfin-lex.l. */
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void set_start_state (void);
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void set_start_state (void);
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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#endif /* BFIN_PARSE_H */
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#endif /* BFIN_PARSE_H */
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