@c Copyright (C) 2002, 2003 Free Software Foundation, Inc.
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@c Copyright (C) 2002, 2003 Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@c For copying conditions, see the file as.texinfo.
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@page
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@page
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@node SH64-Dependent
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@node SH64-Dependent
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@chapter SuperH SH64 Dependent Features
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@chapter SuperH SH64 Dependent Features
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@cindex SH64 support
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@cindex SH64 support
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@menu
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@menu
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* SH64 Options:: Options
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* SH64 Options:: Options
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* SH64 Syntax:: Syntax
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* SH64 Syntax:: Syntax
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* SH64 Directives:: SH64 Machine Directives
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* SH64 Directives:: SH64 Machine Directives
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* SH64 Opcodes:: Opcodes
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* SH64 Opcodes:: Opcodes
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@end menu
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@end menu
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@node SH64 Options
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@node SH64 Options
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@section Options
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@section Options
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@cindex SH64 options
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@cindex SH64 options
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@cindex options, SH64
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@cindex options, SH64
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@table @code
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@table @code
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@cindex SH64 ISA options
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@cindex SH64 ISA options
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@cindex ISA options, SH64
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@cindex ISA options, SH64
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@item -isa=sh4 | sh4a
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@item -isa=sh4 | sh4a
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Specify the sh4 or sh4a instruction set.
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Specify the sh4 or sh4a instruction set.
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@item -isa=dsp
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@item -isa=dsp
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Enable sh-dsp insns, and disable sh3e / sh4 insns.
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Enable sh-dsp insns, and disable sh3e / sh4 insns.
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@item -isa=fp
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@item -isa=fp
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Enable sh2e, sh3e, sh4, and sh4a insn sets.
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Enable sh2e, sh3e, sh4, and sh4a insn sets.
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@item -isa=all
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@item -isa=all
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Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets.
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Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets.
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@item -isa=shmedia | -isa=shcompact
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@item -isa=shmedia | -isa=shcompact
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Specify the default instruction set. @code{SHmedia} specifies the
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Specify the default instruction set. @code{SHmedia} specifies the
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32-bit opcodes, and @code{SHcompact} specifies the 16-bit opcodes
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32-bit opcodes, and @code{SHcompact} specifies the 16-bit opcodes
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compatible with previous SH families. The default depends on the ABI
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compatible with previous SH families. The default depends on the ABI
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selected; the default for the 64-bit ABI is SHmedia, and the default for
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selected; the default for the 64-bit ABI is SHmedia, and the default for
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the 32-bit ABI is SHcompact. If neither the ABI nor the ISA is
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the 32-bit ABI is SHcompact. If neither the ABI nor the ISA is
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specified, the default is 32-bit SHcompact.
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specified, the default is 32-bit SHcompact.
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Note that the @code{.mode} pseudo-op is not permitted if the ISA is not
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Note that the @code{.mode} pseudo-op is not permitted if the ISA is not
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specified on the command line.
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specified on the command line.
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@cindex SH64 ABI options
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@cindex SH64 ABI options
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@cindex ABI options, SH64
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@cindex ABI options, SH64
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@item -abi=32 | -abi=64
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@item -abi=32 | -abi=64
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Specify the default ABI. If the ISA is specified and the ABI is not,
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Specify the default ABI. If the ISA is specified and the ABI is not,
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the default ABI depends on the ISA, with SHmedia defaulting to 64-bit
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the default ABI depends on the ISA, with SHmedia defaulting to 64-bit
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and SHcompact defaulting to 32-bit.
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and SHcompact defaulting to 32-bit.
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Note that the @code{.abi} pseudo-op is not permitted if the ABI is not
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Note that the @code{.abi} pseudo-op is not permitted if the ABI is not
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specified on the command line. When the ABI is specified on the command
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specified on the command line. When the ABI is specified on the command
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line, any @code{.abi} pseudo-ops in the source must match it.
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line, any @code{.abi} pseudo-ops in the source must match it.
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@item -shcompact-const-crange
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@item -shcompact-const-crange
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Emit code-range descriptors for constants in SHcompact code sections.
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Emit code-range descriptors for constants in SHcompact code sections.
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@item -no-mix
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@item -no-mix
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Disallow SHmedia code in the same section as constants and SHcompact
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Disallow SHmedia code in the same section as constants and SHcompact
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code.
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code.
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@item -no-expand
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@item -no-expand
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Do not expand MOVI, PT, PTA or PTB instructions.
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Do not expand MOVI, PT, PTA or PTB instructions.
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@item -expand-pt32
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@item -expand-pt32
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With -abi=64, expand PT, PTA and PTB instructions to 32 bits only.
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With -abi=64, expand PT, PTA and PTB instructions to 32 bits only.
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@end table
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@end table
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@node SH64 Syntax
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@node SH64 Syntax
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@section Syntax
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@section Syntax
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@menu
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@menu
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* SH64-Chars:: Special Characters
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* SH64-Chars:: Special Characters
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* SH64-Regs:: Register Names
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* SH64-Regs:: Register Names
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* SH64-Addressing:: Addressing Modes
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* SH64-Addressing:: Addressing Modes
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@end menu
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@end menu
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@node SH64-Chars
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@node SH64-Chars
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@subsection Special Characters
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@subsection Special Characters
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@cindex line comment character, SH64
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@cindex line comment character, SH64
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@cindex SH64 line comment character
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@cindex SH64 line comment character
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@samp{!} is the line comment character.
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@samp{!} is the line comment character.
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@cindex line separator, SH64
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@cindex line separator, SH64
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@cindex statement separator, SH64
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@cindex statement separator, SH64
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@cindex SH64 line separator
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@cindex SH64 line separator
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You can use @samp{;} instead of a newline to separate statements.
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You can use @samp{;} instead of a newline to separate statements.
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@cindex symbol names, @samp{$} in
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@cindex symbol names, @samp{$} in
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@cindex @code{$} in symbol names
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@cindex @code{$} in symbol names
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Since @samp{$} has no special meaning, you may use it in symbol names.
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Since @samp{$} has no special meaning, you may use it in symbol names.
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@node SH64-Regs
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@node SH64-Regs
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@subsection Register Names
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@subsection Register Names
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@cindex SH64 registers
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@cindex SH64 registers
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@cindex registers, SH64
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@cindex registers, SH64
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You can use the predefined symbols @samp{r0} through @samp{r63} to refer
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You can use the predefined symbols @samp{r0} through @samp{r63} to refer
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to the SH64 general registers, @samp{cr0} through @code{cr63} for
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to the SH64 general registers, @samp{cr0} through @code{cr63} for
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control registers, @samp{tr0} through @samp{tr7} for target address
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control registers, @samp{tr0} through @samp{tr7} for target address
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registers, @samp{fr0} through @samp{fr63} for single-precision floating
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registers, @samp{fr0} through @samp{fr63} for single-precision floating
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point registers, @samp{dr0} through @samp{dr62} (even numbered registers
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point registers, @samp{dr0} through @samp{dr62} (even numbered registers
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only) for double-precision floating point registers, @samp{fv0} through
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only) for double-precision floating point registers, @samp{fv0} through
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@samp{fv60} (multiples of four only) for single-precision floating point
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@samp{fv60} (multiples of four only) for single-precision floating point
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vectors, @samp{fp0} through @samp{fp62} (even numbered registers only)
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vectors, @samp{fp0} through @samp{fp62} (even numbered registers only)
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for single-precision floating point pairs, @samp{mtrx0} through
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for single-precision floating point pairs, @samp{mtrx0} through
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@samp{mtrx48} (multiples of 16 only) for 4x4 matrices of
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@samp{mtrx48} (multiples of 16 only) for 4x4 matrices of
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single-precision floating point registers, @samp{pc} for the program
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single-precision floating point registers, @samp{pc} for the program
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counter, and @samp{fpscr} for the floating point status and control
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counter, and @samp{fpscr} for the floating point status and control
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register.
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register.
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You can also refer to the control registers by the mnemonics @samp{sr},
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You can also refer to the control registers by the mnemonics @samp{sr},
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@samp{ssr}, @samp{pssr}, @samp{intevt}, @samp{expevt}, @samp{pexpevt},
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@samp{ssr}, @samp{pssr}, @samp{intevt}, @samp{expevt}, @samp{pexpevt},
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@samp{tra}, @samp{spc}, @samp{pspc}, @samp{resvec}, @samp{vbr},
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@samp{tra}, @samp{spc}, @samp{pspc}, @samp{resvec}, @samp{vbr},
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@samp{tea}, @samp{dcr}, @samp{kcr0}, @samp{kcr1}, @samp{ctc}, and
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@samp{tea}, @samp{dcr}, @samp{kcr0}, @samp{kcr1}, @samp{ctc}, and
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@samp{usr}.
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@samp{usr}.
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@node SH64-Addressing
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@node SH64-Addressing
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@subsection Addressing Modes
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@subsection Addressing Modes
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@cindex addressing modes, SH64
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@cindex addressing modes, SH64
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@cindex SH64 addressing modes
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@cindex SH64 addressing modes
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SH64 operands consist of either a register or immediate value. The
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SH64 operands consist of either a register or immediate value. The
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immediate value can be a constant or label reference (or portion of a
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immediate value can be a constant or label reference (or portion of a
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label reference), as in this example:
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label reference), as in this example:
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@example
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@example
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movi 4,r2
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movi 4,r2
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pt function, tr4
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pt function, tr4
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movi (function >> 16) & 65535,r0
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movi (function >> 16) & 65535,r0
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shori function & 65535, r0
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shori function & 65535, r0
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ld.l r0,4,r0
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ld.l r0,4,r0
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@end example
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@end example
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@cindex datalabel, SH64
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@cindex datalabel, SH64
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Instruction label references can reference labels in either SHmedia or
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Instruction label references can reference labels in either SHmedia or
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SHcompact. To differentiate between the two, labels in SHmedia sections
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SHcompact. To differentiate between the two, labels in SHmedia sections
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will always have the least significant bit set (i.e. they will be odd),
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will always have the least significant bit set (i.e. they will be odd),
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which SHcompact labels will have the least significant bit reset
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which SHcompact labels will have the least significant bit reset
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(i.e. they will be even). If you need to reference the actual address
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(i.e. they will be even). If you need to reference the actual address
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of a label, you can use the @code{datalabel} modifier, as in this
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of a label, you can use the @code{datalabel} modifier, as in this
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example:
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example:
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@example
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@example
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.long function
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.long function
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.long datalabel function
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.long datalabel function
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@end example
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@end example
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In that example, the first longword may or may not have the least
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In that example, the first longword may or may not have the least
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significant bit set depending on whether the label is an SHmedia label
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significant bit set depending on whether the label is an SHmedia label
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or an SHcompact label. The second longword will be the actual address
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or an SHcompact label. The second longword will be the actual address
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of the label, regardless of what type of label it is.
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of the label, regardless of what type of label it is.
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@node SH64 Directives
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@node SH64 Directives
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@section SH64 Machine Directives
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@section SH64 Machine Directives
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In addition to the SH directives, the SH64 provides the following
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In addition to the SH directives, the SH64 provides the following
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directives:
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directives:
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@cindex SH64 machine directives
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@cindex SH64 machine directives
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@cindex machine directives, SH64
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@cindex machine directives, SH64
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@table @code
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@table @code
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@item .mode [shmedia|shcompact]
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@item .mode [shmedia|shcompact]
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@itemx .isa [shmedia|shcompact]
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@itemx .isa [shmedia|shcompact]
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Specify the ISA for the following instructions (the two directives are
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Specify the ISA for the following instructions (the two directives are
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equivalent). Note that programs such as @code{objdump} rely on symbolic
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equivalent). Note that programs such as @code{objdump} rely on symbolic
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labels to determine when such mode switches occur (by checking the least
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labels to determine when such mode switches occur (by checking the least
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significant bit of the label's address), so such mode/isa changes should
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significant bit of the label's address), so such mode/isa changes should
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always be followed by a label (in practice, this is true anyway). Note
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always be followed by a label (in practice, this is true anyway). Note
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that you cannot use these directives if you didn't specify an ISA on the
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that you cannot use these directives if you didn't specify an ISA on the
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command line.
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command line.
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@item .abi [32|64]
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@item .abi [32|64]
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Specify the ABI for the following instructions. Note that you cannot use
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Specify the ABI for the following instructions. Note that you cannot use
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this directive unless you specified an ABI on the command line, and the
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this directive unless you specified an ABI on the command line, and the
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ABIs specified must match.
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ABIs specified must match.
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@item .uaquad
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@item .uaquad
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Like .uaword and .ualong, this allows you to specify an intentionally
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Like .uaword and .ualong, this allows you to specify an intentionally
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unaligned quadword (64 bit word).
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unaligned quadword (64 bit word).
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@end table
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@end table
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@node SH64 Opcodes
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@node SH64 Opcodes
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@section Opcodes
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@section Opcodes
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@cindex SH64 opcode summary
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@cindex SH64 opcode summary
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@cindex opcode summary, SH64
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@cindex opcode summary, SH64
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@cindex mnemonics, SH64
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@cindex mnemonics, SH64
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@cindex instruction summary, SH64
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@cindex instruction summary, SH64
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For detailed information on the SH64 machine instruction set, see
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For detailed information on the SH64 machine instruction set, see
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@cite{SuperH 64 bit RISC Series Architecture Manual} (SuperH, Inc.).
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@cite{SuperH 64 bit RISC Series Architecture Manual} (SuperH, Inc.).
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@code{@value{AS}} implements all the standard SH64 opcodes. In
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@code{@value{AS}} implements all the standard SH64 opcodes. In
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addition, the following pseudo-opcodes may be expanded into one or more
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addition, the following pseudo-opcodes may be expanded into one or more
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alternate opcodes:
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alternate opcodes:
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@table @code
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@table @code
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@item movi
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@item movi
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If the value doesn't fit into a standard @code{movi} opcode,
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If the value doesn't fit into a standard @code{movi} opcode,
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@code{@value{AS}} will replace the @code{movi} with a sequence of
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@code{@value{AS}} will replace the @code{movi} with a sequence of
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@code{movi} and @code{shori} opcodes.
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@code{movi} and @code{shori} opcodes.
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@item pt
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@item pt
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This expands to a sequence of @code{movi} and @code{shori} opcode,
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This expands to a sequence of @code{movi} and @code{shori} opcode,
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followed by a @code{ptrel} opcode, or to a @code{pta} or @code{ptb}
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followed by a @code{ptrel} opcode, or to a @code{pta} or @code{ptb}
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opcode, depending on the label referenced.
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opcode, depending on the label referenced.
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@end table
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@end table
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