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https://opencores.org/ocsvn/openrisc/openrisc/trunk
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Rev 156 |
Rev 816 |
.text
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.text
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.align 0
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.align 0
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loadhalfwords:
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loadhalfwords:
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ldrh r0, [r1]
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ldrh r0, [r1]
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ldrh r0, [r1]!
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ldrh r0, [r1]!
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ldrh r0, [r1, r2]
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ldrh r0, [r1, r2]
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ldrh r0, [r1, r2]!
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ldrh r0, [r1, r2]!
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ldrh r0, [r1,#0x0C]
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ldrh r0, [r1,#0x0C]
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ldrh r0, [r1,#0x0C]!
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ldrh r0, [r1,#0x0C]!
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ldrh r0, [r1,#-0x0C]
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ldrh r0, [r1,#-0x0C]
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ldrh r0, [r1], r2
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ldrh r0, [r1], r2
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ldrh r0, =0xFF00
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ldrh r0, =0xFF00
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ldrh r0, =0xC0DE
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ldrh r0, =0xC0DE
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ldrh r0, .L2
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ldrh r0, .L2
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storehalfwords:
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storehalfwords:
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strh r0, [r1]
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strh r0, [r1]
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strh r0, [r1]!
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strh r0, [r1]!
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strh r0, [r1, r2]
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strh r0, [r1, r2]
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strh r0, [r1, r2]!
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strh r0, [r1, r2]!
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strh r0, [r1,#0x0C]
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strh r0, [r1,#0x0C]
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strh r0, [r1,#0x0C]!
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strh r0, [r1,#0x0C]!
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strh r0, [r1,#-0x0C]
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strh r0, [r1,#-0x0C]
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strh r0, [r1], r2
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strh r0, [r1], r2
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strh r0, .L2
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strh r0, .L2
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loadsignedbytes:
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loadsignedbytes:
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ldrsb r0, [r1]
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ldrsb r0, [r1]
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ldrsb r0, [r1]!
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ldrsb r0, [r1]!
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ldrsb r0, [r1, r2]
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ldrsb r0, [r1, r2]
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ldrsb r0, [r1, r2]!
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ldrsb r0, [r1, r2]!
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ldrsb r0, [r1,#0x0C]
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ldrsb r0, [r1,#0x0C]
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ldrsb r0, [r1,#0x0C]!
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ldrsb r0, [r1,#0x0C]!
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ldrsb r0, [r1,#-0x0C]
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ldrsb r0, [r1,#-0x0C]
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ldrsb r0, [r1], r2
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ldrsb r0, [r1], r2
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ldrsb r0, =0xDE
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ldrsb r0, =0xDE
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ldrsb r0, .L2
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ldrsb r0, .L2
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loadsignedhalfwords:
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loadsignedhalfwords:
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ldrsh r0, [r1]
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ldrsh r0, [r1]
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ldrsh r0, [r1]!
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ldrsh r0, [r1]!
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ldrsh r0, [r1, r2]
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ldrsh r0, [r1, r2]
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ldrsh r0, [r1, r2]!
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ldrsh r0, [r1, r2]!
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ldrsh r0, [r1, #0x0C]
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ldrsh r0, [r1, #0x0C]
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ldrsh r0, [r1, #0x0C]!
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ldrsh r0, [r1, #0x0C]!
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ldrsh r0, [r1, #-0x0C]
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ldrsh r0, [r1, #-0x0C]
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ldrsh r0, [r1], r2
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ldrsh r0, [r1], r2
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ldrsh r0, =0xFF00
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ldrsh r0, =0xFF00
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ldrsh r0, =0xC0DE
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ldrsh r0, =0xC0DE
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ldrsh r0, .L2
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ldrsh r0, .L2
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misc:
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misc:
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ldralh r0, [r1, r2]
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ldralh r0, [r1, r2]
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ldrneh r0, [r1, r2]
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ldrneh r0, [r1, r2]
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ldrhih r0, [r1, r2]
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ldrhih r0, [r1, r2]
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ldrlth r0, [r1, r2]
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ldrlth r0, [r1, r2]
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ldralsh r0, [r1, r2]
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ldralsh r0, [r1, r2]
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ldrnesh r0, [r1, r2]
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ldrnesh r0, [r1, r2]
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ldrhish r0, [r1, r2]
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ldrhish r0, [r1, r2]
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ldrltsh r0, [r1, r2]
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ldrltsh r0, [r1, r2]
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ldralsb r0, [r1, r2]
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ldralsb r0, [r1, r2]
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ldrnesb r0, [r1, r2]
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ldrnesb r0, [r1, r2]
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ldrhisb r0, [r1, r2]
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ldrhisb r0, [r1, r2]
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ldrltsb r0, [r1, r2]
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ldrltsb r0, [r1, r2]
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ldrsh r0, =0xC0DE
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ldrsh r0, =0xC0DE
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ldrsh r0, =0xDEAD
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ldrsh r0, =0xDEAD
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.align
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.align
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.L2:
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.L2:
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.word fred
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.word fred
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.ltorg
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.ltorg
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# Add two nop instructions to ensure that the
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# Add two nop instructions to ensure that the
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# output is 32-byte aligned as required for arm-aout.
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# output is 32-byte aligned as required for arm-aout.
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nop
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nop
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nop
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nop
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