OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [arm/] [vfp2.d] - Diff between revs 156 and 816

Only display areas with differences | Details | Blame | View Log

Rev 156 Rev 816
#objdump: -dr --prefix-addresses --show-raw-insn
#objdump: -dr --prefix-addresses --show-raw-insn
#name: VFP Additional instructions
#name: VFP Additional instructions
#as: -mfpu=vfp
#as: -mfpu=vfp
# Test the ARM VFP Double Precision instructions
# Test the ARM VFP Double Precision instructions
.*: +file format .*arm.*
.*: +file format .*arm.*
Disassembly of section .text:
Disassembly of section .text:
0+000 <[^>]*> ec4a5b10      vmov    d0, r5, sl
0+000 <[^>]*> ec4a5b10      vmov    d0, r5, sl
0+004 <[^>]*> ec5a5b10      vmov    r5, sl, d0
0+004 <[^>]*> ec5a5b10      vmov    r5, sl, d0
0+008 <[^>]*> ec4a5a37      fmsrr   {s15, s16}, r5, sl
0+008 <[^>]*> ec4a5a37      fmsrr   {s15, s16}, r5, sl
0+00c <[^>]*> ec5a5a37      fmrrs   r5, sl, {s15, s16}
0+00c <[^>]*> ec5a5a37      fmrrs   r5, sl, {s15, s16}
0+010 <[^>]*> ec45ab1f      vmov    d15, sl, r5
0+010 <[^>]*> ec45ab1f      vmov    d15, sl, r5
0+014 <[^>]*> ec55ab1f      vmov    sl, r5, d15
0+014 <[^>]*> ec55ab1f      vmov    sl, r5, d15
0+018 <[^>]*> ec45aa38      fmsrr   {s17, s18}, sl, r5
0+018 <[^>]*> ec45aa38      fmsrr   {s17, s18}, sl, r5
0+01c <[^>]*> ec55aa38      fmrrs   sl, r5, {s17, s18}
0+01c <[^>]*> ec55aa38      fmrrs   sl, r5, {s17, s18}
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.