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Testsuite for the i860 version of the GNU assembler
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Testsuite for the i860 version of the GNU assembler
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---------------------------------------------------
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This is a simple testsuite for the i860 assembler. It currently
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This is a simple testsuite for the i860 assembler. It currently
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consists mostly of testcases for checking that every instruction is
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consists mostly of testcases for checking that every instruction is
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parsed correctly and that correct object code is generated (these
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parsed correctly and that correct object code is generated (these
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are called "blah.s"). The files called "blah-err.s" test for error
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are called "blah.s"). The files called "blah-err.s" test for error
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conditions.
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conditions.
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The suite includes testcases for the base i860XR instruction set as well
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The suite includes testcases for the base i860XR instruction set as well
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as the enhanced i860XP instructions and control registers.
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as the enhanced i860XP instructions and control registers.
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The expected results files were generated using the UNIX System V/i860
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The expected results files were generated using the UNIX System V/i860
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Release 4 vendor assembler (/usr/ccs/bin/as -V reports version
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Release 4 vendor assembler (/usr/ccs/bin/as -V reports version
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"Standard C Development Environment (SCDE) 5.0 12/08/89"). This
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"Standard C Development Environment (SCDE) 5.0 12/08/89"). This
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way GAS/i860 is tested against a known good assembler.
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way GAS/i860 is tested against a known good assembler.
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TODO:
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TODO:
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- Relocation testing is basically non-existent.
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- Relocation testing is basically non-existent.
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- pst.d (pixel store) is the only instruction with no testcase.
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- pst.d (pixel store) is the only instruction with no testcase.
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- Some pseudo instructions need testcases (mov, all pfmov, etc.).
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- Some pseudo instructions need testcases (mov, all pfmov, etc.).
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- More tests for dual instruction mode: check that dual mode has a
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- More tests for dual instruction mode: check that dual mode has a
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proper pair (FLOP/core) of instructions, and other error conditions.
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proper pair (FLOP/core) of instructions, and other error conditions.
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- Most current testcases use the default AT&T/SVR4 syntax; a few simple
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- Most current testcases use the default AT&T/SVR4 syntax; a few simple
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tests of the Intel syntax should be added to prevent bitrot (including
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tests of the Intel syntax should be added to prevent bitrot (including
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relocatable expression syntax, etc). Test file dual03.s uses Intel
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relocatable expression syntax, etc). Test file dual03.s uses Intel
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syntax lightly (i.e., register names without '%' prefix).
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syntax lightly (i.e., register names without '%' prefix).
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Contact me (Jason Eckhardt, jle@rice.edu) if you'd like to help.
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Contact me (Jason Eckhardt, jle@rice.edu) if you'd like to help.
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Known testsuite failures:
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Known testsuite failures:
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- none.
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- none.
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