#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric
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#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric
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#name: MIPS CP0 register disassembly
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#name: MIPS CP0 register disassembly
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#as: -32 -march=r4000
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#as: -32 -march=r4000
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#source: cp0-names.s
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#source: cp0-names.s
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# Check objdump's handling of -M cp0-names=foo options.
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# Check objdump's handling of -M cp0-names=foo options.
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.*: +file format .*mips.*
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.*: +file format .*mips.*
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Disassembly of section \.text:
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Disassembly of section \.text:
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[0-9a-f]+ <[^>]*> 40800000 mtc0 \$0,c0_index
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[0-9a-f]+ <[^>]*> 40800000 mtc0 \$0,c0_index
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[0-9a-f]+ <[^>]*> 40800800 mtc0 \$0,c0_random
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[0-9a-f]+ <[^>]*> 40800800 mtc0 \$0,c0_random
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[0-9a-f]+ <[^>]*> 40801000 mtc0 \$0,c0_entrylo0
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[0-9a-f]+ <[^>]*> 40801000 mtc0 \$0,c0_entrylo0
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[0-9a-f]+ <[^>]*> 40801800 mtc0 \$0,c0_entrylo1
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[0-9a-f]+ <[^>]*> 40801800 mtc0 \$0,c0_entrylo1
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[0-9a-f]+ <[^>]*> 40802000 mtc0 \$0,c0_context
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[0-9a-f]+ <[^>]*> 40802000 mtc0 \$0,c0_context
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[0-9a-f]+ <[^>]*> 40802800 mtc0 \$0,c0_pagemask
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[0-9a-f]+ <[^>]*> 40802800 mtc0 \$0,c0_pagemask
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[0-9a-f]+ <[^>]*> 40803000 mtc0 \$0,c0_wired
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[0-9a-f]+ <[^>]*> 40803000 mtc0 \$0,c0_wired
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[0-9a-f]+ <[^>]*> 40803800 mtc0 \$0,\$7
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[0-9a-f]+ <[^>]*> 40803800 mtc0 \$0,\$7
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[0-9a-f]+ <[^>]*> 40804000 mtc0 \$0,c0_badvaddr
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[0-9a-f]+ <[^>]*> 40804000 mtc0 \$0,c0_badvaddr
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[0-9a-f]+ <[^>]*> 40804800 mtc0 \$0,c0_count
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[0-9a-f]+ <[^>]*> 40804800 mtc0 \$0,c0_count
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[0-9a-f]+ <[^>]*> 40805000 mtc0 \$0,c0_entryhi
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[0-9a-f]+ <[^>]*> 40805000 mtc0 \$0,c0_entryhi
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[0-9a-f]+ <[^>]*> 40805800 mtc0 \$0,c0_compare
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[0-9a-f]+ <[^>]*> 40805800 mtc0 \$0,c0_compare
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[0-9a-f]+ <[^>]*> 40806000 mtc0 \$0,c0_sr
|
[0-9a-f]+ <[^>]*> 40806000 mtc0 \$0,c0_sr
|
[0-9a-f]+ <[^>]*> 40806800 mtc0 \$0,c0_cause
|
[0-9a-f]+ <[^>]*> 40806800 mtc0 \$0,c0_cause
|
[0-9a-f]+ <[^>]*> 40807000 mtc0 \$0,c0_epc
|
[0-9a-f]+ <[^>]*> 40807000 mtc0 \$0,c0_epc
|
[0-9a-f]+ <[^>]*> 40807800 mtc0 \$0,c0_prid
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[0-9a-f]+ <[^>]*> 40807800 mtc0 \$0,c0_prid
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[0-9a-f]+ <[^>]*> 40808000 mtc0 \$0,c0_config
|
[0-9a-f]+ <[^>]*> 40808000 mtc0 \$0,c0_config
|
[0-9a-f]+ <[^>]*> 40808800 mtc0 \$0,c0_lladdr
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[0-9a-f]+ <[^>]*> 40808800 mtc0 \$0,c0_lladdr
|
[0-9a-f]+ <[^>]*> 40809000 mtc0 \$0,c0_watchlo
|
[0-9a-f]+ <[^>]*> 40809000 mtc0 \$0,c0_watchlo
|
[0-9a-f]+ <[^>]*> 40809800 mtc0 \$0,c0_watchhi
|
[0-9a-f]+ <[^>]*> 40809800 mtc0 \$0,c0_watchhi
|
[0-9a-f]+ <[^>]*> 4080a000 mtc0 \$0,c0_xcontext
|
[0-9a-f]+ <[^>]*> 4080a000 mtc0 \$0,c0_xcontext
|
[0-9a-f]+ <[^>]*> 4080a800 mtc0 \$0,\$21
|
[0-9a-f]+ <[^>]*> 4080a800 mtc0 \$0,\$21
|
[0-9a-f]+ <[^>]*> 4080b000 mtc0 \$0,\$22
|
[0-9a-f]+ <[^>]*> 4080b000 mtc0 \$0,\$22
|
[0-9a-f]+ <[^>]*> 4080b800 mtc0 \$0,\$23
|
[0-9a-f]+ <[^>]*> 4080b800 mtc0 \$0,\$23
|
[0-9a-f]+ <[^>]*> 4080c000 mtc0 \$0,\$24
|
[0-9a-f]+ <[^>]*> 4080c000 mtc0 \$0,\$24
|
[0-9a-f]+ <[^>]*> 4080c800 mtc0 \$0,\$25
|
[0-9a-f]+ <[^>]*> 4080c800 mtc0 \$0,\$25
|
[0-9a-f]+ <[^>]*> 4080d000 mtc0 \$0,c0_ecc
|
[0-9a-f]+ <[^>]*> 4080d000 mtc0 \$0,c0_ecc
|
[0-9a-f]+ <[^>]*> 4080d800 mtc0 \$0,c0_cacheerr
|
[0-9a-f]+ <[^>]*> 4080d800 mtc0 \$0,c0_cacheerr
|
[0-9a-f]+ <[^>]*> 4080e000 mtc0 \$0,c0_taglo
|
[0-9a-f]+ <[^>]*> 4080e000 mtc0 \$0,c0_taglo
|
[0-9a-f]+ <[^>]*> 4080e800 mtc0 \$0,c0_taghi
|
[0-9a-f]+ <[^>]*> 4080e800 mtc0 \$0,c0_taghi
|
[0-9a-f]+ <[^>]*> 4080f000 mtc0 \$0,c0_errorepc
|
[0-9a-f]+ <[^>]*> 4080f000 mtc0 \$0,c0_errorepc
|
[0-9a-f]+ <[^>]*> 4080f800 mtc0 \$0,\$31
|
[0-9a-f]+ <[^>]*> 4080f800 mtc0 \$0,\$31
|
\.\.\.
|
\.\.\.
|
|
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