/* coff information for Renesas SH
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/* coff information for Renesas SH
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Copyright 2000, 2003 Free Software Foundation, Inc.
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Copyright 2000, 2003 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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#ifdef COFF_WITH_PE
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#ifdef COFF_WITH_PE
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#define L_LNNO_SIZE 2
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#define L_LNNO_SIZE 2
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#else
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#else
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#define L_LNNO_SIZE 4
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#define L_LNNO_SIZE 4
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#endif
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#endif
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#define INCLUDE_COMDAT_FIELDS_IN_AUXENT
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#define INCLUDE_COMDAT_FIELDS_IN_AUXENT
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#include "coff/external.h"
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#include "coff/external.h"
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#define SH_ARCH_MAGIC_BIG 0x0500
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#define SH_ARCH_MAGIC_BIG 0x0500
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#define SH_ARCH_MAGIC_LITTLE 0x0550 /* Little endian SH */
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#define SH_ARCH_MAGIC_LITTLE 0x0550 /* Little endian SH */
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#define SH_ARCH_MAGIC_WINCE 0x01a2 /* Windows CE - little endian */
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#define SH_ARCH_MAGIC_WINCE 0x01a2 /* Windows CE - little endian */
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#define SH_PE_MAGIC 0x010b
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#define SH_PE_MAGIC 0x010b
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#define SHBADMAG(x) \
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#define SHBADMAG(x) \
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(((x).f_magic != SH_ARCH_MAGIC_BIG) && \
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(((x).f_magic != SH_ARCH_MAGIC_BIG) && \
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((x).f_magic != SH_ARCH_MAGIC_WINCE) && \
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((x).f_magic != SH_ARCH_MAGIC_WINCE) && \
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((x).f_magic != SH_ARCH_MAGIC_LITTLE))
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((x).f_magic != SH_ARCH_MAGIC_LITTLE))
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/* Define some NT default values. */
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/* Define some NT default values. */
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/* #define NT_IMAGE_BASE 0x400000 moved to internal.h */
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/* #define NT_IMAGE_BASE 0x400000 moved to internal.h */
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#define NT_SECTION_ALIGNMENT 0x1000
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#define NT_SECTION_ALIGNMENT 0x1000
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#define NT_FILE_ALIGNMENT 0x200
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#define NT_FILE_ALIGNMENT 0x200
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#define NT_DEF_RESERVE 0x100000
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#define NT_DEF_RESERVE 0x100000
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#define NT_DEF_COMMIT 0x1000
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#define NT_DEF_COMMIT 0x1000
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/********************** RELOCATION DIRECTIVES **********************/
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/********************** RELOCATION DIRECTIVES **********************/
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/* The external reloc has an offset field, because some of the reloc
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/* The external reloc has an offset field, because some of the reloc
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types on the h8 don't have room in the instruction for the entire
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types on the h8 don't have room in the instruction for the entire
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offset - eg the strange jump and high page addressing modes. */
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offset - eg the strange jump and high page addressing modes. */
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#ifndef COFF_WITH_PE
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#ifndef COFF_WITH_PE
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struct external_reloc
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struct external_reloc
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{
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{
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char r_vaddr[4];
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char r_vaddr[4];
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char r_symndx[4];
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char r_symndx[4];
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char r_offset[4];
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char r_offset[4];
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char r_type[2];
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char r_type[2];
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char r_stuff[2];
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char r_stuff[2];
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};
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};
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#else
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#else
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struct external_reloc
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struct external_reloc
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{
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{
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char r_vaddr[4];
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char r_vaddr[4];
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char r_symndx[4];
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char r_symndx[4];
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char r_type[2];
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char r_type[2];
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};
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};
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#endif
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#endif
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#define RELOC struct external_reloc
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#define RELOC struct external_reloc
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#ifdef COFF_WITH_PE
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#ifdef COFF_WITH_PE
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#define RELSZ 10
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#define RELSZ 10
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#else
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#else
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#define RELSZ 16
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#define RELSZ 16
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#endif
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#endif
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/* SH relocation types. Not all of these are actually used. */
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/* SH relocation types. Not all of these are actually used. */
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#define R_SH_UNUSED 0 /* only used internally */
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#define R_SH_UNUSED 0 /* only used internally */
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#define R_SH_IMM32CE 2 /* 32 bit immediate for WinCE */
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#define R_SH_IMM32CE 2 /* 32 bit immediate for WinCE */
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#define R_SH_PCREL8 3 /* 8 bit pcrel */
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#define R_SH_PCREL8 3 /* 8 bit pcrel */
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#define R_SH_PCREL16 4 /* 16 bit pcrel */
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#define R_SH_PCREL16 4 /* 16 bit pcrel */
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#define R_SH_HIGH8 5 /* high 8 bits of 24 bit address */
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#define R_SH_HIGH8 5 /* high 8 bits of 24 bit address */
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#define R_SH_LOW16 7 /* low 16 bits of 24 bit immediate */
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#define R_SH_LOW16 7 /* low 16 bits of 24 bit immediate */
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#define R_SH_IMM24 6 /* 24 bit immediate */
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#define R_SH_IMM24 6 /* 24 bit immediate */
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#define R_SH_PCDISP8BY4 9 /* PC rel 8 bits *4 +ve */
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#define R_SH_PCDISP8BY4 9 /* PC rel 8 bits *4 +ve */
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#define R_SH_PCDISP8BY2 10 /* PC rel 8 bits *2 +ve */
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#define R_SH_PCDISP8BY2 10 /* PC rel 8 bits *2 +ve */
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#define R_SH_PCDISP8 11 /* 8 bit branch */
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#define R_SH_PCDISP8 11 /* 8 bit branch */
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#define R_SH_PCDISP 12 /* 12 bit branch */
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#define R_SH_PCDISP 12 /* 12 bit branch */
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#define R_SH_IMM32 14 /* 32 bit immediate */
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#define R_SH_IMM32 14 /* 32 bit immediate */
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#define R_SH_IMM8 16 /* 8 bit immediate */
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#define R_SH_IMM8 16 /* 8 bit immediate */
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#define R_SH_IMAGEBASE 16 /* Windows CE */
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#define R_SH_IMAGEBASE 16 /* Windows CE */
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#define R_SH_IMM8BY2 17 /* 8 bit immediate *2 */
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#define R_SH_IMM8BY2 17 /* 8 bit immediate *2 */
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#define R_SH_IMM8BY4 18 /* 8 bit immediate *4 */
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#define R_SH_IMM8BY4 18 /* 8 bit immediate *4 */
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#define R_SH_IMM4 19 /* 4 bit immediate */
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#define R_SH_IMM4 19 /* 4 bit immediate */
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#define R_SH_IMM4BY2 20 /* 4 bit immediate *2 */
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#define R_SH_IMM4BY2 20 /* 4 bit immediate *2 */
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#define R_SH_IMM4BY4 21 /* 4 bit immediate *4 */
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#define R_SH_IMM4BY4 21 /* 4 bit immediate *4 */
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#define R_SH_PCRELIMM8BY2 22 /* PC rel 8 bits *2 unsigned */
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#define R_SH_PCRELIMM8BY2 22 /* PC rel 8 bits *2 unsigned */
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#define R_SH_PCRELIMM8BY4 23 /* PC rel 8 bits *4 unsigned */
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#define R_SH_PCRELIMM8BY4 23 /* PC rel 8 bits *4 unsigned */
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#define R_SH_IMM16 24 /* 16 bit immediate */
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#define R_SH_IMM16 24 /* 16 bit immediate */
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/* The switch table reloc types are used for relaxing. They are
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/* The switch table reloc types are used for relaxing. They are
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generated for expressions such as
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generated for expressions such as
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.word L1 - L2
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.word L1 - L2
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The r_offset field holds the difference between the reloc address
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The r_offset field holds the difference between the reloc address
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and L2. */
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and L2. */
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#define R_SH_SWITCH8 33 /* 8 bit switch table entry */
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#define R_SH_SWITCH8 33 /* 8 bit switch table entry */
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#define R_SH_SWITCH16 25 /* 16 bit switch table entry */
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#define R_SH_SWITCH16 25 /* 16 bit switch table entry */
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#define R_SH_SWITCH32 26 /* 32 bit switch table entry */
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#define R_SH_SWITCH32 26 /* 32 bit switch table entry */
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/* The USES reloc type is used for relaxing. The compiler will
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/* The USES reloc type is used for relaxing. The compiler will
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generate .uses pseudo-ops when it finds a function call which it
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generate .uses pseudo-ops when it finds a function call which it
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can relax. The r_offset field of the USES reloc holds the PC
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can relax. The r_offset field of the USES reloc holds the PC
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relative offset to the instruction which loads the register used in
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relative offset to the instruction which loads the register used in
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the function call. */
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the function call. */
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#define R_SH_USES 27 /* .uses pseudo-op */
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#define R_SH_USES 27 /* .uses pseudo-op */
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/* The COUNT reloc type is used for relaxing. The assembler will
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/* The COUNT reloc type is used for relaxing. The assembler will
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generate COUNT relocs for addresses referred to by the register
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generate COUNT relocs for addresses referred to by the register
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loads associated with USES relocs. The r_offset field of the COUNT
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loads associated with USES relocs. The r_offset field of the COUNT
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reloc holds the number of times the address is referenced in the
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reloc holds the number of times the address is referenced in the
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object file. */
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object file. */
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#define R_SH_COUNT 28 /* Count of constant pool uses */
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#define R_SH_COUNT 28 /* Count of constant pool uses */
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/* The ALIGN reloc type is used for relaxing. The r_offset field is
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/* The ALIGN reloc type is used for relaxing. The r_offset field is
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the power of two to which subsequent portions of the object file
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the power of two to which subsequent portions of the object file
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must be aligned. */
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must be aligned. */
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#define R_SH_ALIGN 29 /* .align pseudo-op */
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#define R_SH_ALIGN 29 /* .align pseudo-op */
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/* The CODE and DATA reloc types are used for aligning load and store
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/* The CODE and DATA reloc types are used for aligning load and store
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instructions. The assembler will generate a CODE reloc before a
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instructions. The assembler will generate a CODE reloc before a
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block of instructions. It will generate a DATA reloc before data.
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block of instructions. It will generate a DATA reloc before data.
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A section should be processed assuming it contains data, unless a
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A section should be processed assuming it contains data, unless a
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CODE reloc is seen. The only relevant pieces of information in the
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CODE reloc is seen. The only relevant pieces of information in the
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CODE and DATA relocs are the section and the address. The symbol
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CODE and DATA relocs are the section and the address. The symbol
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and offset are meaningless. */
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and offset are meaningless. */
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#define R_SH_CODE 30 /* start of code */
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#define R_SH_CODE 30 /* start of code */
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#define R_SH_DATA 31 /* start of data */
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#define R_SH_DATA 31 /* start of data */
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/* The LABEL reloc type is used for aligning load and store
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/* The LABEL reloc type is used for aligning load and store
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instructions. The assembler will generate a LABEL reloc for each
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instructions. The assembler will generate a LABEL reloc for each
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label within a block of instructions. This permits the linker to
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label within a block of instructions. This permits the linker to
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avoid swapping instructions which are the targets of branches. */
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avoid swapping instructions which are the targets of branches. */
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#define R_SH_LABEL 32 /* label */
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#define R_SH_LABEL 32 /* label */
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/* NB: R_SH_SWITCH8 is 33 */
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/* NB: R_SH_SWITCH8 is 33 */
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#define R_SH_LOOP_START 34
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#define R_SH_LOOP_START 34
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#define R_SH_LOOP_END 35
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#define R_SH_LOOP_END 35
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