URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Go to most recent revision |
Only display areas with differences |
Details |
Blame |
View Log
Rev 156 |
Rev 816 |
MACHINE=
|
MACHINE=
|
SCRIPT_NAME=elfd30v
|
SCRIPT_NAME=elfd30v
|
TEMPLATE_NAME=generic
|
TEMPLATE_NAME=generic
|
EXTRA_EM_FILE=genelf
|
EXTRA_EM_FILE=genelf
|
OUTPUT_FORMAT="elf32-d30v"
|
OUTPUT_FORMAT="elf32-d30v"
|
TEXT_START_ADDR=0x00000000
|
TEXT_START_ADDR=0x00000000
|
DATA_START_ADDR=0x20000000
|
DATA_START_ADDR=0x20000000
|
EMEM_START_ADDR=0x80000000
|
EMEM_START_ADDR=0x80000000
|
STACK_START_ADDR=0x20008000
|
STACK_START_ADDR=0x20008000
|
EIT_START_ADDR=0xfffff020
|
EIT_START_ADDR=0xfffff020
|
TEXT_SIZE=64K
|
TEXT_SIZE=64K
|
DATA_SIZE=32K
|
DATA_SIZE=32K
|
EMEM_SIZE=8M
|
EMEM_SIZE=8M
|
EIT_SIZE=320
|
EIT_SIZE=320
|
TEXT_MEMORY=emem
|
TEXT_MEMORY=emem
|
DATA_MEMORY=emem
|
DATA_MEMORY=emem
|
BSS_MEMORY=emem
|
BSS_MEMORY=emem
|
TEXT_DEF_SECTION=""
|
TEXT_DEF_SECTION=""
|
DATA_DEF_SECTION=""
|
DATA_DEF_SECTION=""
|
EMEM_DEF_SECTION="(rwx)"
|
EMEM_DEF_SECTION="(rwx)"
|
ARCH=d30v
|
ARCH=d30v
|
EMBEDDED=t
|
EMBEDDED=t
|
|
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.