#source: greg-1.s
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#source: greg-1.s
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#source: gregget1.s
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#source: gregget1.s
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#source: start.s
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#source: start.s
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#source: a.s
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#source: a.s
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#as: -x
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#as: -x
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#ld: -m elf64mmix
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#ld: -m elf64mmix
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#objdump: -dt
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#objdump: -dt
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# A greg usage with an expanding insn. The register reloc must be
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# A greg usage with an expanding insn. The register reloc must be
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# evaluated before the expanding reloc. Here, it doesn't appear in the
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# evaluated before the expanding reloc. Here, it doesn't appear in the
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# wrong order, and it doesn't seem like they would naturally appear in the
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# wrong order, and it doesn't seem like they would naturally appear in the
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# wrong order, but anyway.
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# wrong order, but anyway.
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.*: file format elf64-mmix
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.*: file format elf64-mmix
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SYMBOL TABLE:
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SYMBOL TABLE:
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0+ l d \.text 0+ (|\.text)
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0+ l d \.text 0+ (|\.text)
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0+7f0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
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0+7f0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
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0+10 g \.text 0+ _start
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0+10 g \.text 0+ _start
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0+fe g \*REG\* 0+ areg
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0+fe g \*REG\* 0+ areg
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#...
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#...
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0+14 g \.text 0+ a
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0+14 g \.text 0+ a
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Disassembly of section \.text:
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Disassembly of section \.text:
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0+ <_start-0x10>:
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0+ <_start-0x10>:
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0: e3fe0014 setl \$254,0x14
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0: e3fe0014 setl \$254,0x14
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4: e6fe0000 incml \$254,0x0
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4: e6fe0000 incml \$254,0x0
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8: e5fe0000 incmh \$254,0x0
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8: e5fe0000 incmh \$254,0x0
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c: e4fe0000 inch \$254,0x0
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c: e4fe0000 inch \$254,0x0
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0+10 <_start>:
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0+10 <_start>:
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10: e3fd0001 setl \$253,0x1
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10: e3fd0001 setl \$253,0x1
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0+14 :
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0+14 :
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14: e3fd0004 setl \$253,0x4
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14: e3fd0004 setl \$253,0x4
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