;; R4600 and R4650 pipeline description.
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;; R4600 and R4650 pipeline description.
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;; Copyright (C) 2004, 2005, 2007 Free Software Foundation, Inc.
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;; Copyright (C) 2004, 2005, 2007 Free Software Foundation, Inc.
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;;
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;;
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;; This file is part of GCC.
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;; This file is part of GCC.
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;; GCC is free software; you can redistribute it and/or modify it
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;; GCC is free software; you can redistribute it and/or modify it
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;; under the terms of the GNU General Public License as published
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;; under the terms of the GNU General Public License as published
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;; by the Free Software Foundation; either version 3, or (at your
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;; by the Free Software Foundation; either version 3, or (at your
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;; option) any later version.
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;; option) any later version.
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;; GCC is distributed in the hope that it will be useful, but WITHOUT
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;; GCC is distributed in the hope that it will be useful, but WITHOUT
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;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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;; License for more details.
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;; License for more details.
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;; You should have received a copy of the GNU General Public License
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3. If not see
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;; along with GCC; see the file COPYING3. If not see
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;; .
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;; .
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;; This file overrides parts of generic.md. It is derived from the
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;; This file overrides parts of generic.md. It is derived from the
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;; old define_function_unit description.
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;; old define_function_unit description.
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;;
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;;
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;; We handle the R4600 and R4650 in much the same way. The only difference
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;; We handle the R4600 and R4650 in much the same way. The only difference
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;; is in the integer multiplication and division costs.
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;; is in the integer multiplication and division costs.
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(define_insn_reservation "r4600_imul" 10
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(define_insn_reservation "r4600_imul" 10
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(and (eq_attr "cpu" "r4600")
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(and (eq_attr "cpu" "r4600")
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(eq_attr "type" "imul,imul3,imadd"))
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(eq_attr "type" "imul,imul3,imadd"))
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"imuldiv*10")
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"imuldiv*10")
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(define_insn_reservation "r4600_idiv" 42
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(define_insn_reservation "r4600_idiv" 42
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(and (eq_attr "cpu" "r4600")
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(and (eq_attr "cpu" "r4600")
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(eq_attr "type" "idiv"))
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(eq_attr "type" "idiv"))
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"imuldiv*42")
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"imuldiv*42")
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(define_insn_reservation "r4650_imul" 4
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(define_insn_reservation "r4650_imul" 4
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(and (eq_attr "cpu" "r4650")
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(and (eq_attr "cpu" "r4650")
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(eq_attr "type" "imul,imul3,imadd"))
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(eq_attr "type" "imul,imul3,imadd"))
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"imuldiv*4")
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"imuldiv*4")
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(define_insn_reservation "r4650_idiv" 36
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(define_insn_reservation "r4650_idiv" 36
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(and (eq_attr "cpu" "r4650")
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(and (eq_attr "cpu" "r4650")
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(eq_attr "type" "idiv"))
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(eq_attr "type" "idiv"))
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"imuldiv*36")
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"imuldiv*36")
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(define_insn_reservation "r4600_load" 2
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(define_insn_reservation "r4600_load" 2
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(and (eq_attr "cpu" "r4600,r4650")
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(and (eq_attr "cpu" "r4600,r4650")
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(eq_attr "type" "load,fpload,fpidxload"))
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(eq_attr "type" "load,fpload,fpidxload"))
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"alu")
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"alu")
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(define_insn_reservation "r4600_fmove" 1
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(define_insn_reservation "r4600_fmove" 1
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(and (eq_attr "cpu" "r4600,r4650")
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(and (eq_attr "cpu" "r4600,r4650")
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(eq_attr "type" "fabs,fneg,fmove"))
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(eq_attr "type" "fabs,fneg,fmove"))
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"alu")
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"alu")
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(define_insn_reservation "r4600_fmul_single" 8
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(define_insn_reservation "r4600_fmul_single" 8
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(and (eq_attr "cpu" "r4600,r4650")
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(and (eq_attr "cpu" "r4600,r4650")
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(and (eq_attr "type" "fmul,fmadd")
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(and (eq_attr "type" "fmul,fmadd")
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(eq_attr "mode" "SF")))
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(eq_attr "mode" "SF")))
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"alu")
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"alu")
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(define_insn_reservation "r4600_fdiv_single" 32
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(define_insn_reservation "r4600_fdiv_single" 32
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(and (eq_attr "cpu" "r4600,r4650")
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(and (eq_attr "cpu" "r4600,r4650")
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(and (eq_attr "type" "fdiv,frdiv")
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(and (eq_attr "type" "fdiv,frdiv")
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(eq_attr "mode" "SF")))
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(eq_attr "mode" "SF")))
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"alu")
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"alu")
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(define_insn_reservation "r4600_fdiv_double" 61
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(define_insn_reservation "r4600_fdiv_double" 61
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(and (eq_attr "cpu" "r4600,r4650")
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(and (eq_attr "cpu" "r4600,r4650")
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(and (eq_attr "type" "fdiv,frdiv")
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(and (eq_attr "type" "fdiv,frdiv")
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(eq_attr "mode" "DF")))
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(eq_attr "mode" "DF")))
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"alu")
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"alu")
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(define_insn_reservation "r4600_fsqrt_single" 31
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(define_insn_reservation "r4600_fsqrt_single" 31
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(and (eq_attr "cpu" "r4600,r4650")
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(and (eq_attr "cpu" "r4600,r4650")
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(and (eq_attr "type" "fsqrt,frsqrt")
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(and (eq_attr "type" "fsqrt,frsqrt")
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(eq_attr "mode" "SF")))
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(eq_attr "mode" "SF")))
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"alu")
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"alu")
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(define_insn_reservation "r4600_fsqrt_double" 60
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(define_insn_reservation "r4600_fsqrt_double" 60
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(and (eq_attr "cpu" "r4600,r4650")
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(and (eq_attr "cpu" "r4600,r4650")
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(and (eq_attr "type" "fsqrt,frsqrt")
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(and (eq_attr "type" "fsqrt,frsqrt")
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(eq_attr "mode" "DF")))
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(eq_attr "mode" "DF")))
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"alu")
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"alu")
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