/* Definitions of target machine for GNU compiler, for IBM S/390
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/* Definitions of target machine for GNU compiler, for IBM S/390
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Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006,
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Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006,
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2007 Free Software Foundation, Inc.
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2007 Free Software Foundation, Inc.
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Contributed by Hartmut Penner (hpenner@de.ibm.com) and
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Contributed by Hartmut Penner (hpenner@de.ibm.com) and
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Ulrich Weigand (uweigand@de.ibm.com).
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Ulrich Weigand (uweigand@de.ibm.com).
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This file is part of GCC.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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Software Foundation; either version 3, or (at your option) any later
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version.
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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<http://www.gnu.org/licenses/>. */
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#ifndef _S390_H
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#ifndef _S390_H
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#define _S390_H
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#define _S390_H
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/* Override the __fixdfdi etc. routines when building libgcc2.
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/* Override the __fixdfdi etc. routines when building libgcc2.
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??? This should be done in a cleaner way ... */
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??? This should be done in a cleaner way ... */
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#if defined (IN_LIBGCC2) && !defined (__s390x__)
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#if defined (IN_LIBGCC2) && !defined (__s390x__)
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#include <config/s390/fixdfdi.h>
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#include <config/s390/fixdfdi.h>
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#endif
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#endif
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/* Which processor to generate code or schedule for. The cpu attribute
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/* Which processor to generate code or schedule for. The cpu attribute
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defines a list that mirrors this list, so changes to s390.md must be
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defines a list that mirrors this list, so changes to s390.md must be
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made at the same time. */
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made at the same time. */
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enum processor_type
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enum processor_type
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{
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{
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PROCESSOR_9672_G5,
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PROCESSOR_9672_G5,
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PROCESSOR_9672_G6,
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PROCESSOR_9672_G6,
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PROCESSOR_2064_Z900,
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PROCESSOR_2064_Z900,
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PROCESSOR_2084_Z990,
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PROCESSOR_2084_Z990,
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PROCESSOR_2094_Z9_109,
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PROCESSOR_2094_Z9_109,
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PROCESSOR_max
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PROCESSOR_max
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};
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};
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/* Optional architectural facilities supported by the processor. */
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/* Optional architectural facilities supported by the processor. */
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enum processor_flags
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enum processor_flags
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{
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{
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PF_IEEE_FLOAT = 1,
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PF_IEEE_FLOAT = 1,
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PF_ZARCH = 2,
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PF_ZARCH = 2,
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PF_LONG_DISPLACEMENT = 4,
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PF_LONG_DISPLACEMENT = 4,
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PF_EXTIMM = 8
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PF_EXTIMM = 8
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};
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};
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extern enum processor_type s390_tune;
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extern enum processor_type s390_tune;
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extern enum processor_flags s390_tune_flags;
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extern enum processor_flags s390_tune_flags;
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extern enum processor_type s390_arch;
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extern enum processor_type s390_arch;
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extern enum processor_flags s390_arch_flags;
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extern enum processor_flags s390_arch_flags;
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#define TARGET_CPU_IEEE_FLOAT \
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#define TARGET_CPU_IEEE_FLOAT \
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(s390_arch_flags & PF_IEEE_FLOAT)
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(s390_arch_flags & PF_IEEE_FLOAT)
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#define TARGET_CPU_ZARCH \
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#define TARGET_CPU_ZARCH \
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(s390_arch_flags & PF_ZARCH)
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(s390_arch_flags & PF_ZARCH)
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#define TARGET_CPU_LONG_DISPLACEMENT \
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#define TARGET_CPU_LONG_DISPLACEMENT \
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(s390_arch_flags & PF_LONG_DISPLACEMENT)
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(s390_arch_flags & PF_LONG_DISPLACEMENT)
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#define TARGET_CPU_EXTIMM \
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#define TARGET_CPU_EXTIMM \
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(s390_arch_flags & PF_EXTIMM)
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(s390_arch_flags & PF_EXTIMM)
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#define TARGET_LONG_DISPLACEMENT \
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#define TARGET_LONG_DISPLACEMENT \
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(TARGET_ZARCH && TARGET_CPU_LONG_DISPLACEMENT)
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(TARGET_ZARCH && TARGET_CPU_LONG_DISPLACEMENT)
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#define TARGET_EXTIMM \
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#define TARGET_EXTIMM \
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(TARGET_ZARCH && TARGET_CPU_EXTIMM)
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(TARGET_ZARCH && TARGET_CPU_EXTIMM)
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/* Run-time target specification. */
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/* Run-time target specification. */
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/* Defaults for option flags defined only on some subtargets. */
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/* Defaults for option flags defined only on some subtargets. */
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#ifndef TARGET_TPF_PROFILING
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#ifndef TARGET_TPF_PROFILING
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#define TARGET_TPF_PROFILING 0
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#define TARGET_TPF_PROFILING 0
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#endif
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#endif
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/* This will be overridden by OS headers. */
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/* This will be overridden by OS headers. */
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#define TARGET_TPF 0
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#define TARGET_TPF 0
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/* Target CPU builtins. */
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/* Target CPU builtins. */
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#define TARGET_CPU_CPP_BUILTINS() \
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#define TARGET_CPU_CPP_BUILTINS() \
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do \
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do \
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{ \
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{ \
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builtin_assert ("cpu=s390"); \
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builtin_assert ("cpu=s390"); \
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builtin_assert ("machine=s390"); \
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builtin_assert ("machine=s390"); \
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builtin_define ("__s390__"); \
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builtin_define ("__s390__"); \
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if (TARGET_64BIT) \
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if (TARGET_64BIT) \
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builtin_define ("__s390x__"); \
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builtin_define ("__s390x__"); \
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if (TARGET_LONG_DOUBLE_128) \
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if (TARGET_LONG_DOUBLE_128) \
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builtin_define ("__LONG_DOUBLE_128__"); \
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builtin_define ("__LONG_DOUBLE_128__"); \
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} \
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} \
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while (0)
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while (0)
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/* ??? Once this actually works, it could be made a runtime option. */
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/* ??? Once this actually works, it could be made a runtime option. */
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#define TARGET_IBM_FLOAT 0
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#define TARGET_IBM_FLOAT 0
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#define TARGET_IEEE_FLOAT 1
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#define TARGET_IEEE_FLOAT 1
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#ifdef DEFAULT_TARGET_64BIT
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#ifdef DEFAULT_TARGET_64BIT
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#define TARGET_DEFAULT (MASK_64BIT | MASK_ZARCH | MASK_HARD_FLOAT)
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#define TARGET_DEFAULT (MASK_64BIT | MASK_ZARCH | MASK_HARD_FLOAT)
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#else
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#else
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#define TARGET_DEFAULT MASK_HARD_FLOAT
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#define TARGET_DEFAULT MASK_HARD_FLOAT
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#endif
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#endif
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/* Support for configure-time defaults. */
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/* Support for configure-time defaults. */
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#define OPTION_DEFAULT_SPECS \
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#define OPTION_DEFAULT_SPECS \
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{ "mode", "%{!mesa:%{!mzarch:-m%(VALUE)}}" }, \
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{ "mode", "%{!mesa:%{!mzarch:-m%(VALUE)}}" }, \
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{ "arch", "%{!march=*:-march=%(VALUE)}" }, \
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{ "arch", "%{!march=*:-march=%(VALUE)}" }, \
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{ "tune", "%{!mtune=*:-mtune=%(VALUE)}" }
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{ "tune", "%{!mtune=*:-mtune=%(VALUE)}" }
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/* Defaulting rules. */
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/* Defaulting rules. */
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#ifdef DEFAULT_TARGET_64BIT
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#ifdef DEFAULT_TARGET_64BIT
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#define DRIVER_SELF_SPECS \
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#define DRIVER_SELF_SPECS \
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"%{!m31:%{!m64:-m64}}", \
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"%{!m31:%{!m64:-m64}}", \
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"%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}", \
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"%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}", \
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"%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
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"%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
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#else
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#else
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#define DRIVER_SELF_SPECS \
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#define DRIVER_SELF_SPECS \
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"%{!m31:%{!m64:-m31}}", \
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"%{!m31:%{!m64:-m31}}", \
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"%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}", \
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"%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}", \
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"%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
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"%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
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#endif
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#endif
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/* Target version string. Overridden by the OS header. */
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/* Target version string. Overridden by the OS header. */
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#ifdef DEFAULT_TARGET_64BIT
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#ifdef DEFAULT_TARGET_64BIT
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#define TARGET_VERSION fprintf (stderr, " (zSeries)");
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#define TARGET_VERSION fprintf (stderr, " (zSeries)");
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#else
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#else
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#define TARGET_VERSION fprintf (stderr, " (S/390)");
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#define TARGET_VERSION fprintf (stderr, " (S/390)");
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#endif
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#endif
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/* Hooks to override options. */
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/* Hooks to override options. */
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#define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
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#define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
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#define OVERRIDE_OPTIONS override_options ()
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#define OVERRIDE_OPTIONS override_options ()
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/* Frame pointer is not used for debugging. */
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/* Frame pointer is not used for debugging. */
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#define CAN_DEBUG_WITHOUT_FP
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#define CAN_DEBUG_WITHOUT_FP
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/* In libgcc2, determine target settings as compile-time constants. */
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/* In libgcc2, determine target settings as compile-time constants. */
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#ifdef IN_LIBGCC2
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#ifdef IN_LIBGCC2
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#undef TARGET_64BIT
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#undef TARGET_64BIT
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#ifdef __s390x__
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#ifdef __s390x__
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#define TARGET_64BIT 1
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#define TARGET_64BIT 1
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#else
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#else
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#define TARGET_64BIT 0
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#define TARGET_64BIT 0
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#endif
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#endif
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#endif
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#endif
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/* Target machine storage layout. */
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/* Target machine storage layout. */
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/* Everything is big-endian. */
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/* Everything is big-endian. */
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#define BITS_BIG_ENDIAN 1
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#define BITS_BIG_ENDIAN 1
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#define BYTES_BIG_ENDIAN 1
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#define BYTES_BIG_ENDIAN 1
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#define WORDS_BIG_ENDIAN 1
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#define WORDS_BIG_ENDIAN 1
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/* Width of a word, in units (bytes). */
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/* Width of a word, in units (bytes). */
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#define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
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#define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
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#ifndef IN_LIBGCC2
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#ifndef IN_LIBGCC2
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#define MIN_UNITS_PER_WORD 4
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#define MIN_UNITS_PER_WORD 4
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#endif
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#endif
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#define MAX_BITS_PER_WORD 64
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#define MAX_BITS_PER_WORD 64
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/* Function arguments and return values are promoted to word size. */
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/* Function arguments and return values are promoted to word size. */
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#define PROMOTE_FUNCTION_MODE(MODE, UNSIGNEDP, TYPE) \
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#define PROMOTE_FUNCTION_MODE(MODE, UNSIGNEDP, TYPE) \
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if (INTEGRAL_MODE_P (MODE) && \
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if (INTEGRAL_MODE_P (MODE) && \
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GET_MODE_SIZE (MODE) < UNITS_PER_WORD) { \
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GET_MODE_SIZE (MODE) < UNITS_PER_WORD) { \
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(MODE) = Pmode; \
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(MODE) = Pmode; \
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}
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}
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/* Allocation boundary (in *bits*) for storing arguments in argument list. */
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/* Allocation boundary (in *bits*) for storing arguments in argument list. */
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#define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
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#define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
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/* Boundary (in *bits*) on which stack pointer should be aligned. */
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/* Boundary (in *bits*) on which stack pointer should be aligned. */
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#define STACK_BOUNDARY 64
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#define STACK_BOUNDARY 64
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/* Allocation boundary (in *bits*) for the code of a function. */
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/* Allocation boundary (in *bits*) for the code of a function. */
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#define FUNCTION_BOUNDARY 32
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#define FUNCTION_BOUNDARY 32
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/* There is no point aligning anything to a rounder boundary than this. */
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/* There is no point aligning anything to a rounder boundary than this. */
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#define BIGGEST_ALIGNMENT 64
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#define BIGGEST_ALIGNMENT 64
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/* Alignment of field after `int : 0' in a structure. */
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/* Alignment of field after `int : 0' in a structure. */
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#define EMPTY_FIELD_BOUNDARY 32
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#define EMPTY_FIELD_BOUNDARY 32
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/* Alignment on even addresses for LARL instruction. */
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/* Alignment on even addresses for LARL instruction. */
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#define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
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#define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
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#define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
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#define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
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/* Alignment is not required by the hardware. */
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/* Alignment is not required by the hardware. */
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#define STRICT_ALIGNMENT 0
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#define STRICT_ALIGNMENT 0
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/* Mode of stack savearea.
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/* Mode of stack savearea.
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FUNCTION is VOIDmode because calling convention maintains SP.
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FUNCTION is VOIDmode because calling convention maintains SP.
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BLOCK needs Pmode for SP.
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BLOCK needs Pmode for SP.
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NONLOCAL needs twice Pmode to maintain both backchain and SP. */
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NONLOCAL needs twice Pmode to maintain both backchain and SP. */
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#define STACK_SAVEAREA_MODE(LEVEL) \
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#define STACK_SAVEAREA_MODE(LEVEL) \
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(LEVEL == SAVE_FUNCTION ? VOIDmode \
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(LEVEL == SAVE_FUNCTION ? VOIDmode \
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: LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? OImode : TImode) : Pmode)
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: LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? OImode : TImode) : Pmode)
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/* Define target floating point format. */
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/* Define target floating point format. */
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#define TARGET_FLOAT_FORMAT \
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#define TARGET_FLOAT_FORMAT \
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(TARGET_IEEE_FLOAT? IEEE_FLOAT_FORMAT : IBM_FLOAT_FORMAT)
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(TARGET_IEEE_FLOAT? IEEE_FLOAT_FORMAT : IBM_FLOAT_FORMAT)
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/* Type layout. */
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/* Type layout. */
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/* Sizes in bits of the source language data types. */
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/* Sizes in bits of the source language data types. */
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#define SHORT_TYPE_SIZE 16
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#define SHORT_TYPE_SIZE 16
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#define INT_TYPE_SIZE 32
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#define INT_TYPE_SIZE 32
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#define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
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#define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
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#define LONG_LONG_TYPE_SIZE 64
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#define LONG_LONG_TYPE_SIZE 64
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#define FLOAT_TYPE_SIZE 32
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#define FLOAT_TYPE_SIZE 32
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#define DOUBLE_TYPE_SIZE 64
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#define DOUBLE_TYPE_SIZE 64
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#define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64)
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#define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64)
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/* Define this to set long double type size to use in libgcc2.c, which can
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/* Define this to set long double type size to use in libgcc2.c, which can
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not depend on target_flags. */
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not depend on target_flags. */
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#ifdef __LONG_DOUBLE_128__
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#ifdef __LONG_DOUBLE_128__
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#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128
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#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128
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#else
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#else
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#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
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#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
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#endif
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#endif
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/* Work around target_flags dependency in ada/targtyps.c. */
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/* Work around target_flags dependency in ada/targtyps.c. */
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#define WIDEST_HARDWARE_FP_SIZE 64
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#define WIDEST_HARDWARE_FP_SIZE 64
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/* We use "unsigned char" as default. */
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/* We use "unsigned char" as default. */
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#define DEFAULT_SIGNED_CHAR 0
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#define DEFAULT_SIGNED_CHAR 0
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/* Register usage. */
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/* Register usage. */
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/* We have 16 general purpose registers (registers 0-15),
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/* We have 16 general purpose registers (registers 0-15),
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and 16 floating point registers (registers 16-31).
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and 16 floating point registers (registers 16-31).
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(On non-IEEE machines, we have only 4 fp registers.)
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(On non-IEEE machines, we have only 4 fp registers.)
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Amongst the general purpose registers, some are used
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Amongst the general purpose registers, some are used
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for specific purposes:
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for specific purposes:
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GPR 11: Hard frame pointer (if needed)
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GPR 11: Hard frame pointer (if needed)
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GPR 12: Global offset table pointer (if needed)
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GPR 12: Global offset table pointer (if needed)
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GPR 13: Literal pool base register
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GPR 13: Literal pool base register
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GPR 14: Return address register
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GPR 14: Return address register
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GPR 15: Stack pointer
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GPR 15: Stack pointer
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Registers 32-35 are 'fake' hard registers that do not
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Registers 32-35 are 'fake' hard registers that do not
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correspond to actual hardware:
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correspond to actual hardware:
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Reg 32: Argument pointer
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Reg 32: Argument pointer
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Reg 33: Condition code
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Reg 33: Condition code
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Reg 34: Frame pointer
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Reg 34: Frame pointer
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Reg 35: Return address pointer
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Reg 35: Return address pointer
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Registers 36 and 37 are mapped to access registers
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Registers 36 and 37 are mapped to access registers
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0 and 1, used to implement thread-local storage. */
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0 and 1, used to implement thread-local storage. */
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#define FIRST_PSEUDO_REGISTER 38
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#define FIRST_PSEUDO_REGISTER 38
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/* Standard register usage. */
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/* Standard register usage. */
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#define GENERAL_REGNO_P(N) ((int)(N) >= 0 && (N) < 16)
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#define GENERAL_REGNO_P(N) ((int)(N) >= 0 && (N) < 16)
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#define ADDR_REGNO_P(N) ((N) >= 1 && (N) < 16)
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#define ADDR_REGNO_P(N) ((N) >= 1 && (N) < 16)
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#define FP_REGNO_P(N) ((N) >= 16 && (N) < (TARGET_IEEE_FLOAT? 32 : 20))
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#define FP_REGNO_P(N) ((N) >= 16 && (N) < (TARGET_IEEE_FLOAT? 32 : 20))
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#define CC_REGNO_P(N) ((N) == 33)
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#define CC_REGNO_P(N) ((N) == 33)
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#define FRAME_REGNO_P(N) ((N) == 32 || (N) == 34 || (N) == 35)
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#define FRAME_REGNO_P(N) ((N) == 32 || (N) == 34 || (N) == 35)
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#define ACCESS_REGNO_P(N) ((N) == 36 || (N) == 37)
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#define ACCESS_REGNO_P(N) ((N) == 36 || (N) == 37)
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|
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#define GENERAL_REG_P(X) (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
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#define GENERAL_REG_P(X) (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
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#define ADDR_REG_P(X) (REG_P (X) && ADDR_REGNO_P (REGNO (X)))
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#define ADDR_REG_P(X) (REG_P (X) && ADDR_REGNO_P (REGNO (X)))
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#define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
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#define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
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#define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X)))
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#define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X)))
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#define FRAME_REG_P(X) (REG_P (X) && FRAME_REGNO_P (REGNO (X)))
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#define FRAME_REG_P(X) (REG_P (X) && FRAME_REGNO_P (REGNO (X)))
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#define ACCESS_REG_P(X) (REG_P (X) && ACCESS_REGNO_P (REGNO (X)))
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#define ACCESS_REG_P(X) (REG_P (X) && ACCESS_REGNO_P (REGNO (X)))
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|
|
/* Set up fixed registers and calling convention:
|
/* Set up fixed registers and calling convention:
|
|
|
GPRs 0-5 are always call-clobbered,
|
GPRs 0-5 are always call-clobbered,
|
GPRs 6-15 are always call-saved.
|
GPRs 6-15 are always call-saved.
|
GPR 12 is fixed if used as GOT pointer.
|
GPR 12 is fixed if used as GOT pointer.
|
GPR 13 is always fixed (as literal pool pointer).
|
GPR 13 is always fixed (as literal pool pointer).
|
GPR 14 is always fixed on S/390 machines (as return address).
|
GPR 14 is always fixed on S/390 machines (as return address).
|
GPR 15 is always fixed (as stack pointer).
|
GPR 15 is always fixed (as stack pointer).
|
The 'fake' hard registers are call-clobbered and fixed.
|
The 'fake' hard registers are call-clobbered and fixed.
|
The access registers are call-saved and fixed.
|
The access registers are call-saved and fixed.
|
|
|
On 31-bit, FPRs 18-19 are call-clobbered;
|
On 31-bit, FPRs 18-19 are call-clobbered;
|
on 64-bit, FPRs 24-31 are call-clobbered.
|
on 64-bit, FPRs 24-31 are call-clobbered.
|
The remaining FPRs are call-saved. */
|
The remaining FPRs are call-saved. */
|
|
|
#define FIXED_REGISTERS \
|
#define FIXED_REGISTERS \
|
{ 0, 0, 0, 0, \
|
{ 0, 0, 0, 0, \
|
0, 0, 0, 0, \
|
0, 0, 0, 0, \
|
0, 0, 0, 0, \
|
0, 0, 0, 0, \
|
0, 1, 1, 1, \
|
0, 1, 1, 1, \
|
0, 0, 0, 0, \
|
0, 0, 0, 0, \
|
0, 0, 0, 0, \
|
0, 0, 0, 0, \
|
0, 0, 0, 0, \
|
0, 0, 0, 0, \
|
0, 0, 0, 0, \
|
0, 0, 0, 0, \
|
1, 1, 1, 1, \
|
1, 1, 1, 1, \
|
1, 1 }
|
1, 1 }
|
|
|
#define CALL_USED_REGISTERS \
|
#define CALL_USED_REGISTERS \
|
{ 1, 1, 1, 1, \
|
{ 1, 1, 1, 1, \
|
1, 1, 0, 0, \
|
1, 1, 0, 0, \
|
0, 0, 0, 0, \
|
0, 0, 0, 0, \
|
0, 1, 1, 1, \
|
0, 1, 1, 1, \
|
1, 1, 1, 1, \
|
1, 1, 1, 1, \
|
1, 1, 1, 1, \
|
1, 1, 1, 1, \
|
1, 1, 1, 1, \
|
1, 1, 1, 1, \
|
1, 1, 1, 1, \
|
1, 1, 1, 1, \
|
1, 1, 1, 1, \
|
1, 1, 1, 1, \
|
1, 1 }
|
1, 1 }
|
|
|
#define CALL_REALLY_USED_REGISTERS \
|
#define CALL_REALLY_USED_REGISTERS \
|
{ 1, 1, 1, 1, \
|
{ 1, 1, 1, 1, \
|
1, 1, 0, 0, \
|
1, 1, 0, 0, \
|
0, 0, 0, 0, \
|
0, 0, 0, 0, \
|
0, 0, 0, 0, \
|
0, 0, 0, 0, \
|
1, 1, 1, 1, \
|
1, 1, 1, 1, \
|
1, 1, 1, 1, \
|
1, 1, 1, 1, \
|
1, 1, 1, 1, \
|
1, 1, 1, 1, \
|
1, 1, 1, 1, \
|
1, 1, 1, 1, \
|
1, 1, 1, 1, \
|
1, 1, 1, 1, \
|
0, 0 }
|
0, 0 }
|
|
|
#define CONDITIONAL_REGISTER_USAGE s390_conditional_register_usage ()
|
#define CONDITIONAL_REGISTER_USAGE s390_conditional_register_usage ()
|
|
|
/* Preferred register allocation order. */
|
/* Preferred register allocation order. */
|
#define REG_ALLOC_ORDER \
|
#define REG_ALLOC_ORDER \
|
{ 1, 2, 3, 4, 5, 0, 12, 11, 10, 9, 8, 7, 6, 14, 13, \
|
{ 1, 2, 3, 4, 5, 0, 12, 11, 10, 9, 8, 7, 6, 14, 13, \
|
16, 17, 18, 19, 20, 21, 22, 23, \
|
16, 17, 18, 19, 20, 21, 22, 23, \
|
24, 25, 26, 27, 28, 29, 30, 31, \
|
24, 25, 26, 27, 28, 29, 30, 31, \
|
15, 32, 33, 34, 35, 36, 37 }
|
15, 32, 33, 34, 35, 36, 37 }
|
|
|
|
|
/* Fitting values into registers. */
|
/* Fitting values into registers. */
|
|
|
/* Integer modes <= word size fit into any GPR.
|
/* Integer modes <= word size fit into any GPR.
|
Integer modes > word size fit into successive GPRs, starting with
|
Integer modes > word size fit into successive GPRs, starting with
|
an even-numbered register.
|
an even-numbered register.
|
SImode and DImode fit into FPRs as well.
|
SImode and DImode fit into FPRs as well.
|
|
|
Floating point modes <= word size fit into any FPR or GPR.
|
Floating point modes <= word size fit into any FPR or GPR.
|
Floating point modes > word size (i.e. DFmode on 32-bit) fit
|
Floating point modes > word size (i.e. DFmode on 32-bit) fit
|
into any FPR, or an even-odd GPR pair.
|
into any FPR, or an even-odd GPR pair.
|
TFmode fits only into an even-odd FPR pair.
|
TFmode fits only into an even-odd FPR pair.
|
|
|
Complex floating point modes fit either into two FPRs, or into
|
Complex floating point modes fit either into two FPRs, or into
|
successive GPRs (again starting with an even number).
|
successive GPRs (again starting with an even number).
|
TCmode fits only into two successive even-odd FPR pairs.
|
TCmode fits only into two successive even-odd FPR pairs.
|
|
|
Condition code modes fit only into the CC register. */
|
Condition code modes fit only into the CC register. */
|
|
|
/* Because all registers in a class have the same size HARD_REGNO_NREGS
|
/* Because all registers in a class have the same size HARD_REGNO_NREGS
|
is equivalent to CLASS_MAX_NREGS. */
|
is equivalent to CLASS_MAX_NREGS. */
|
#define HARD_REGNO_NREGS(REGNO, MODE) \
|
#define HARD_REGNO_NREGS(REGNO, MODE) \
|
s390_class_max_nregs (REGNO_REG_CLASS (REGNO), (MODE))
|
s390_class_max_nregs (REGNO_REG_CLASS (REGNO), (MODE))
|
|
|
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
|
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
|
s390_hard_regno_mode_ok ((REGNO), (MODE))
|
s390_hard_regno_mode_ok ((REGNO), (MODE))
|
|
|
#define HARD_REGNO_RENAME_OK(FROM, TO) \
|
#define HARD_REGNO_RENAME_OK(FROM, TO) \
|
s390_hard_regno_rename_ok (FROM, TO)
|
s390_hard_regno_rename_ok (FROM, TO)
|
|
|
#define MODES_TIEABLE_P(MODE1, MODE2) \
|
#define MODES_TIEABLE_P(MODE1, MODE2) \
|
(((MODE1) == SFmode || (MODE1) == DFmode) \
|
(((MODE1) == SFmode || (MODE1) == DFmode) \
|
== ((MODE2) == SFmode || (MODE2) == DFmode))
|
== ((MODE2) == SFmode || (MODE2) == DFmode))
|
|
|
/* Maximum number of registers to represent a value of mode MODE
|
/* Maximum number of registers to represent a value of mode MODE
|
in a register of class CLASS. */
|
in a register of class CLASS. */
|
#define CLASS_MAX_NREGS(CLASS, MODE) \
|
#define CLASS_MAX_NREGS(CLASS, MODE) \
|
s390_class_max_nregs ((CLASS), (MODE))
|
s390_class_max_nregs ((CLASS), (MODE))
|
|
|
/* If a 4-byte value is loaded into a FPR, it is placed into the
|
/* If a 4-byte value is loaded into a FPR, it is placed into the
|
*upper* half of the register, not the lower. Therefore, we
|
*upper* half of the register, not the lower. Therefore, we
|
cannot use SUBREGs to switch between modes in FP registers.
|
cannot use SUBREGs to switch between modes in FP registers.
|
Likewise for access registers, since they have only half the
|
Likewise for access registers, since they have only half the
|
word size on 64-bit. */
|
word size on 64-bit. */
|
#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
|
#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
|
(GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
|
(GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
|
? ((reg_classes_intersect_p (FP_REGS, CLASS) \
|
? ((reg_classes_intersect_p (FP_REGS, CLASS) \
|
&& (GET_MODE_SIZE (FROM) < 8 || GET_MODE_SIZE (TO) < 8)) \
|
&& (GET_MODE_SIZE (FROM) < 8 || GET_MODE_SIZE (TO) < 8)) \
|
|| reg_classes_intersect_p (ACCESS_REGS, CLASS)) : 0)
|
|| reg_classes_intersect_p (ACCESS_REGS, CLASS)) : 0)
|
|
|
/* Register classes. */
|
/* Register classes. */
|
|
|
/* We use the following register classes:
|
/* We use the following register classes:
|
GENERAL_REGS All general purpose registers
|
GENERAL_REGS All general purpose registers
|
ADDR_REGS All general purpose registers except %r0
|
ADDR_REGS All general purpose registers except %r0
|
(These registers can be used in address generation)
|
(These registers can be used in address generation)
|
FP_REGS All floating point registers
|
FP_REGS All floating point registers
|
CC_REGS The condition code register
|
CC_REGS The condition code register
|
ACCESS_REGS The access registers
|
ACCESS_REGS The access registers
|
|
|
GENERAL_FP_REGS Union of GENERAL_REGS and FP_REGS
|
GENERAL_FP_REGS Union of GENERAL_REGS and FP_REGS
|
ADDR_FP_REGS Union of ADDR_REGS and FP_REGS
|
ADDR_FP_REGS Union of ADDR_REGS and FP_REGS
|
GENERAL_CC_REGS Union of GENERAL_REGS and CC_REGS
|
GENERAL_CC_REGS Union of GENERAL_REGS and CC_REGS
|
ADDR_CC_REGS Union of ADDR_REGS and CC_REGS
|
ADDR_CC_REGS Union of ADDR_REGS and CC_REGS
|
|
|
NO_REGS No registers
|
NO_REGS No registers
|
ALL_REGS All registers
|
ALL_REGS All registers
|
|
|
Note that the 'fake' frame pointer and argument pointer registers
|
Note that the 'fake' frame pointer and argument pointer registers
|
are included amongst the address registers here. */
|
are included amongst the address registers here. */
|
|
|
enum reg_class
|
enum reg_class
|
{
|
{
|
NO_REGS, CC_REGS, ADDR_REGS, GENERAL_REGS, ACCESS_REGS,
|
NO_REGS, CC_REGS, ADDR_REGS, GENERAL_REGS, ACCESS_REGS,
|
ADDR_CC_REGS, GENERAL_CC_REGS,
|
ADDR_CC_REGS, GENERAL_CC_REGS,
|
FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
|
FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
|
ALL_REGS, LIM_REG_CLASSES
|
ALL_REGS, LIM_REG_CLASSES
|
};
|
};
|
#define N_REG_CLASSES (int) LIM_REG_CLASSES
|
#define N_REG_CLASSES (int) LIM_REG_CLASSES
|
|
|
#define REG_CLASS_NAMES \
|
#define REG_CLASS_NAMES \
|
{ "NO_REGS", "CC_REGS", "ADDR_REGS", "GENERAL_REGS", "ACCESS_REGS", \
|
{ "NO_REGS", "CC_REGS", "ADDR_REGS", "GENERAL_REGS", "ACCESS_REGS", \
|
"ADDR_CC_REGS", "GENERAL_CC_REGS", \
|
"ADDR_CC_REGS", "GENERAL_CC_REGS", \
|
"FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", "ALL_REGS" }
|
"FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", "ALL_REGS" }
|
|
|
/* Class -> register mapping. */
|
/* Class -> register mapping. */
|
#define REG_CLASS_CONTENTS \
|
#define REG_CLASS_CONTENTS \
|
{ \
|
{ \
|
{ 0x00000000, 0x00000000 }, /* NO_REGS */ \
|
{ 0x00000000, 0x00000000 }, /* NO_REGS */ \
|
{ 0x00000000, 0x00000002 }, /* CC_REGS */ \
|
{ 0x00000000, 0x00000002 }, /* CC_REGS */ \
|
{ 0x0000fffe, 0x0000000d }, /* ADDR_REGS */ \
|
{ 0x0000fffe, 0x0000000d }, /* ADDR_REGS */ \
|
{ 0x0000ffff, 0x0000000d }, /* GENERAL_REGS */ \
|
{ 0x0000ffff, 0x0000000d }, /* GENERAL_REGS */ \
|
{ 0x00000000, 0x00000030 }, /* ACCESS_REGS */ \
|
{ 0x00000000, 0x00000030 }, /* ACCESS_REGS */ \
|
{ 0x0000fffe, 0x0000000f }, /* ADDR_CC_REGS */ \
|
{ 0x0000fffe, 0x0000000f }, /* ADDR_CC_REGS */ \
|
{ 0x0000ffff, 0x0000000f }, /* GENERAL_CC_REGS */ \
|
{ 0x0000ffff, 0x0000000f }, /* GENERAL_CC_REGS */ \
|
{ 0xffff0000, 0x00000000 }, /* FP_REGS */ \
|
{ 0xffff0000, 0x00000000 }, /* FP_REGS */ \
|
{ 0xfffffffe, 0x0000000d }, /* ADDR_FP_REGS */ \
|
{ 0xfffffffe, 0x0000000d }, /* ADDR_FP_REGS */ \
|
{ 0xffffffff, 0x0000000d }, /* GENERAL_FP_REGS */ \
|
{ 0xffffffff, 0x0000000d }, /* GENERAL_FP_REGS */ \
|
{ 0xffffffff, 0x0000003f }, /* ALL_REGS */ \
|
{ 0xffffffff, 0x0000003f }, /* ALL_REGS */ \
|
}
|
}
|
|
|
/* Register -> class mapping. */
|
/* Register -> class mapping. */
|
extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
|
extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
|
#define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
|
#define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
|
|
|
/* ADDR_REGS can be used as base or index register. */
|
/* ADDR_REGS can be used as base or index register. */
|
#define INDEX_REG_CLASS ADDR_REGS
|
#define INDEX_REG_CLASS ADDR_REGS
|
#define BASE_REG_CLASS ADDR_REGS
|
#define BASE_REG_CLASS ADDR_REGS
|
|
|
/* Check whether REGNO is a hard register of the suitable class
|
/* Check whether REGNO is a hard register of the suitable class
|
or a pseudo register currently allocated to one such. */
|
or a pseudo register currently allocated to one such. */
|
#define REGNO_OK_FOR_INDEX_P(REGNO) \
|
#define REGNO_OK_FOR_INDEX_P(REGNO) \
|
(((REGNO) < FIRST_PSEUDO_REGISTER \
|
(((REGNO) < FIRST_PSEUDO_REGISTER \
|
&& REGNO_REG_CLASS ((REGNO)) == ADDR_REGS) \
|
&& REGNO_REG_CLASS ((REGNO)) == ADDR_REGS) \
|
|| ADDR_REGNO_P (reg_renumber[REGNO]))
|
|| ADDR_REGNO_P (reg_renumber[REGNO]))
|
#define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
|
#define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
|
|
|
|
|
/* Given an rtx X being reloaded into a reg required to be in class CLASS,
|
/* Given an rtx X being reloaded into a reg required to be in class CLASS,
|
return the class of reg to actually use. */
|
return the class of reg to actually use. */
|
#define PREFERRED_RELOAD_CLASS(X, CLASS) \
|
#define PREFERRED_RELOAD_CLASS(X, CLASS) \
|
s390_preferred_reload_class ((X), (CLASS))
|
s390_preferred_reload_class ((X), (CLASS))
|
|
|
/* We need a secondary reload when loading a PLUS which is
|
/* We need a secondary reload when loading a PLUS which is
|
not a valid operand for LOAD ADDRESS. */
|
not a valid operand for LOAD ADDRESS. */
|
#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
|
#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
|
s390_secondary_input_reload_class ((CLASS), (MODE), (IN))
|
s390_secondary_input_reload_class ((CLASS), (MODE), (IN))
|
|
|
/* We need a secondary reload when storing a double-word
|
/* We need a secondary reload when storing a double-word
|
to a non-offsettable memory address. */
|
to a non-offsettable memory address. */
|
#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \
|
#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \
|
s390_secondary_output_reload_class ((CLASS), (MODE), (OUT))
|
s390_secondary_output_reload_class ((CLASS), (MODE), (OUT))
|
|
|
/* We need secondary memory to move data between GPRs and FPRs. */
|
/* We need secondary memory to move data between GPRs and FPRs. */
|
#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
|
#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
|
((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
|
((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
|
|
|
/* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
|
/* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
|
because the movsi and movsf patterns don't handle r/f moves. */
|
because the movsi and movsf patterns don't handle r/f moves. */
|
#define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
|
#define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
|
(GET_MODE_BITSIZE (MODE) < 32 \
|
(GET_MODE_BITSIZE (MODE) < 32 \
|
? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \
|
? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \
|
: MODE)
|
: MODE)
|
|
|
|
|
/* Stack layout and calling conventions. */
|
/* Stack layout and calling conventions. */
|
|
|
/* Our stack grows from higher to lower addresses. However, local variables
|
/* Our stack grows from higher to lower addresses. However, local variables
|
are accessed by positive offsets, and function arguments are stored at
|
are accessed by positive offsets, and function arguments are stored at
|
increasing addresses. */
|
increasing addresses. */
|
#define STACK_GROWS_DOWNWARD
|
#define STACK_GROWS_DOWNWARD
|
#define FRAME_GROWS_DOWNWARD 1
|
#define FRAME_GROWS_DOWNWARD 1
|
/* #undef ARGS_GROW_DOWNWARD */
|
/* #undef ARGS_GROW_DOWNWARD */
|
|
|
/* The basic stack layout looks like this: the stack pointer points
|
/* The basic stack layout looks like this: the stack pointer points
|
to the register save area for called functions. Above that area
|
to the register save area for called functions. Above that area
|
is the location to place outgoing arguments. Above those follow
|
is the location to place outgoing arguments. Above those follow
|
dynamic allocations (alloca), and finally the local variables. */
|
dynamic allocations (alloca), and finally the local variables. */
|
|
|
/* Offset from stack-pointer to first location of outgoing args. */
|
/* Offset from stack-pointer to first location of outgoing args. */
|
#define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
|
#define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
|
|
|
/* Offset within stack frame to start allocating local variables at. */
|
/* Offset within stack frame to start allocating local variables at. */
|
#define STARTING_FRAME_OFFSET 0
|
#define STARTING_FRAME_OFFSET 0
|
|
|
/* Offset from the stack pointer register to an item dynamically
|
/* Offset from the stack pointer register to an item dynamically
|
allocated on the stack, e.g., by `alloca'. */
|
allocated on the stack, e.g., by `alloca'. */
|
extern int current_function_outgoing_args_size;
|
extern int current_function_outgoing_args_size;
|
#define STACK_DYNAMIC_OFFSET(FUNDECL) \
|
#define STACK_DYNAMIC_OFFSET(FUNDECL) \
|
(STACK_POINTER_OFFSET + current_function_outgoing_args_size)
|
(STACK_POINTER_OFFSET + current_function_outgoing_args_size)
|
|
|
/* Offset of first parameter from the argument pointer register value.
|
/* Offset of first parameter from the argument pointer register value.
|
We have a fake argument pointer register that points directly to
|
We have a fake argument pointer register that points directly to
|
the argument area. */
|
the argument area. */
|
#define FIRST_PARM_OFFSET(FNDECL) 0
|
#define FIRST_PARM_OFFSET(FNDECL) 0
|
|
|
/* Defining this macro makes __builtin_frame_address(0) and
|
/* Defining this macro makes __builtin_frame_address(0) and
|
__builtin_return_address(0) work with -fomit-frame-pointer. */
|
__builtin_return_address(0) work with -fomit-frame-pointer. */
|
#define INITIAL_FRAME_ADDRESS_RTX \
|
#define INITIAL_FRAME_ADDRESS_RTX \
|
(TARGET_PACKED_STACK ? \
|
(TARGET_PACKED_STACK ? \
|
plus_constant (arg_pointer_rtx, -UNITS_PER_WORD) : \
|
plus_constant (arg_pointer_rtx, -UNITS_PER_WORD) : \
|
plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
|
plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
|
|
|
/* The return address of the current frame is retrieved
|
/* The return address of the current frame is retrieved
|
from the initial value of register RETURN_REGNUM.
|
from the initial value of register RETURN_REGNUM.
|
For frames farther back, we use the stack slot where
|
For frames farther back, we use the stack slot where
|
the corresponding RETURN_REGNUM register was saved. */
|
the corresponding RETURN_REGNUM register was saved. */
|
#define DYNAMIC_CHAIN_ADDRESS(FRAME) \
|
#define DYNAMIC_CHAIN_ADDRESS(FRAME) \
|
(TARGET_PACKED_STACK ? \
|
(TARGET_PACKED_STACK ? \
|
plus_constant ((FRAME), STACK_POINTER_OFFSET - UNITS_PER_WORD) : (FRAME))
|
plus_constant ((FRAME), STACK_POINTER_OFFSET - UNITS_PER_WORD) : (FRAME))
|
|
|
#define RETURN_ADDR_RTX(COUNT, FRAME) \
|
#define RETURN_ADDR_RTX(COUNT, FRAME) \
|
s390_return_addr_rtx ((COUNT), DYNAMIC_CHAIN_ADDRESS ((FRAME)))
|
s390_return_addr_rtx ((COUNT), DYNAMIC_CHAIN_ADDRESS ((FRAME)))
|
|
|
/* In 31-bit mode, we need to mask off the high bit of return addresses. */
|
/* In 31-bit mode, we need to mask off the high bit of return addresses. */
|
#define MASK_RETURN_ADDR (TARGET_64BIT ? constm1_rtx : GEN_INT (0x7fffffff))
|
#define MASK_RETURN_ADDR (TARGET_64BIT ? constm1_rtx : GEN_INT (0x7fffffff))
|
|
|
|
|
/* Exception handling. */
|
/* Exception handling. */
|
|
|
/* Describe calling conventions for DWARF-2 exception handling. */
|
/* Describe calling conventions for DWARF-2 exception handling. */
|
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM)
|
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM)
|
#define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
|
#define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
|
#define DWARF_FRAME_RETURN_COLUMN 14
|
#define DWARF_FRAME_RETURN_COLUMN 14
|
|
|
/* Describe how we implement __builtin_eh_return. */
|
/* Describe how we implement __builtin_eh_return. */
|
#define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
|
#define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
|
#define EH_RETURN_HANDLER_RTX gen_rtx_MEM (Pmode, return_address_pointer_rtx)
|
#define EH_RETURN_HANDLER_RTX gen_rtx_MEM (Pmode, return_address_pointer_rtx)
|
|
|
/* Select a format to encode pointers in exception handling data. */
|
/* Select a format to encode pointers in exception handling data. */
|
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \
|
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \
|
(flag_pic \
|
(flag_pic \
|
? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4 \
|
? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4 \
|
: DW_EH_PE_absptr)
|
: DW_EH_PE_absptr)
|
|
|
|
|
/* Frame registers. */
|
/* Frame registers. */
|
|
|
#define STACK_POINTER_REGNUM 15
|
#define STACK_POINTER_REGNUM 15
|
#define FRAME_POINTER_REGNUM 34
|
#define FRAME_POINTER_REGNUM 34
|
#define HARD_FRAME_POINTER_REGNUM 11
|
#define HARD_FRAME_POINTER_REGNUM 11
|
#define ARG_POINTER_REGNUM 32
|
#define ARG_POINTER_REGNUM 32
|
#define RETURN_ADDRESS_POINTER_REGNUM 35
|
#define RETURN_ADDRESS_POINTER_REGNUM 35
|
|
|
/* The static chain must be call-clobbered, but not used for
|
/* The static chain must be call-clobbered, but not used for
|
function argument passing. As register 1 is clobbered by
|
function argument passing. As register 1 is clobbered by
|
the trampoline code, we only have one option. */
|
the trampoline code, we only have one option. */
|
#define STATIC_CHAIN_REGNUM 0
|
#define STATIC_CHAIN_REGNUM 0
|
|
|
/* Number of hardware registers that go into the DWARF-2 unwind info.
|
/* Number of hardware registers that go into the DWARF-2 unwind info.
|
To avoid ABI incompatibility, this number must not change even as
|
To avoid ABI incompatibility, this number must not change even as
|
'fake' hard registers are added or removed. */
|
'fake' hard registers are added or removed. */
|
#define DWARF_FRAME_REGISTERS 34
|
#define DWARF_FRAME_REGISTERS 34
|
|
|
|
|
/* Frame pointer and argument pointer elimination. */
|
/* Frame pointer and argument pointer elimination. */
|
|
|
#define FRAME_POINTER_REQUIRED 0
|
#define FRAME_POINTER_REQUIRED 0
|
|
|
#define ELIMINABLE_REGS \
|
#define ELIMINABLE_REGS \
|
{{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
|
{{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
|
{ FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
|
{ FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
|
{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
|
{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
|
{ ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
|
{ ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
|
{ RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
|
{ RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
|
{ RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
|
{ RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
|
{ BASE_REGNUM, BASE_REGNUM }}
|
{ BASE_REGNUM, BASE_REGNUM }}
|
|
|
#define CAN_ELIMINATE(FROM, TO) \
|
#define CAN_ELIMINATE(FROM, TO) \
|
s390_can_eliminate ((FROM), (TO))
|
s390_can_eliminate ((FROM), (TO))
|
|
|
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
|
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
|
(OFFSET) = s390_initial_elimination_offset ((FROM), (TO))
|
(OFFSET) = s390_initial_elimination_offset ((FROM), (TO))
|
|
|
|
|
/* Stack arguments. */
|
/* Stack arguments. */
|
|
|
/* We need current_function_outgoing_args to be valid. */
|
/* We need current_function_outgoing_args to be valid. */
|
#define ACCUMULATE_OUTGOING_ARGS 1
|
#define ACCUMULATE_OUTGOING_ARGS 1
|
|
|
/* Return doesn't modify the stack. */
|
/* Return doesn't modify the stack. */
|
#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
|
#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
|
|
|
|
|
/* Register arguments. */
|
/* Register arguments. */
|
|
|
typedef struct s390_arg_structure
|
typedef struct s390_arg_structure
|
{
|
{
|
int gprs; /* gpr so far */
|
int gprs; /* gpr so far */
|
int fprs; /* fpr so far */
|
int fprs; /* fpr so far */
|
}
|
}
|
CUMULATIVE_ARGS;
|
CUMULATIVE_ARGS;
|
|
|
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN, N_NAMED_ARGS) \
|
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN, N_NAMED_ARGS) \
|
((CUM).gprs=0, (CUM).fprs=0)
|
((CUM).gprs=0, (CUM).fprs=0)
|
|
|
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
|
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
|
s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
|
s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
|
|
|
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
|
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
|
s390_function_arg (&CUM, MODE, TYPE, NAMED)
|
s390_function_arg (&CUM, MODE, TYPE, NAMED)
|
|
|
/* Arguments can be placed in general registers 2 to 6,
|
/* Arguments can be placed in general registers 2 to 6,
|
or in floating point registers 0 and 2. */
|
or in floating point registers 0 and 2. */
|
#define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
|
#define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
|
(N) == 16 || (N) == 17)
|
(N) == 16 || (N) == 17)
|
|
|
|
|
/* Scalar return values. */
|
/* Scalar return values. */
|
|
|
#define FUNCTION_VALUE(VALTYPE, FUNC) \
|
#define FUNCTION_VALUE(VALTYPE, FUNC) \
|
s390_function_value ((VALTYPE), VOIDmode)
|
s390_function_value ((VALTYPE), VOIDmode)
|
|
|
#define LIBCALL_VALUE(MODE) \
|
#define LIBCALL_VALUE(MODE) \
|
s390_function_value (NULL, (MODE))
|
s390_function_value (NULL, (MODE))
|
|
|
/* Only gpr 2 and fpr 0 are ever used as return registers. */
|
/* Only gpr 2 and fpr 0 are ever used as return registers. */
|
#define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
|
#define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
|
|
|
|
|
/* Function entry and exit. */
|
/* Function entry and exit. */
|
|
|
/* When returning from a function, the stack pointer does not matter. */
|
/* When returning from a function, the stack pointer does not matter. */
|
#define EXIT_IGNORE_STACK 1
|
#define EXIT_IGNORE_STACK 1
|
|
|
|
|
/* Profiling. */
|
/* Profiling. */
|
|
|
#define FUNCTION_PROFILER(FILE, LABELNO) \
|
#define FUNCTION_PROFILER(FILE, LABELNO) \
|
s390_function_profiler ((FILE), ((LABELNO)))
|
s390_function_profiler ((FILE), ((LABELNO)))
|
|
|
#define PROFILE_BEFORE_PROLOGUE 1
|
#define PROFILE_BEFORE_PROLOGUE 1
|
|
|
|
|
/* Implementing the varargs macros. */
|
/* Implementing the varargs macros. */
|
|
|
#define EXPAND_BUILTIN_VA_START(valist, nextarg) \
|
#define EXPAND_BUILTIN_VA_START(valist, nextarg) \
|
s390_va_start (valist, nextarg)
|
s390_va_start (valist, nextarg)
|
|
|
/* Trampolines for nested functions. */
|
/* Trampolines for nested functions. */
|
|
|
#define TRAMPOLINE_SIZE (TARGET_64BIT ? 32 : 16)
|
#define TRAMPOLINE_SIZE (TARGET_64BIT ? 32 : 16)
|
|
|
#define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
|
#define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
|
s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
|
s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
|
|
|
#define TRAMPOLINE_TEMPLATE(FILE) \
|
#define TRAMPOLINE_TEMPLATE(FILE) \
|
s390_trampoline_template (FILE)
|
s390_trampoline_template (FILE)
|
|
|
|
|
/* Addressing modes, and classification of registers for them. */
|
/* Addressing modes, and classification of registers for them. */
|
|
|
/* Recognize any constant value that is a valid address. */
|
/* Recognize any constant value that is a valid address. */
|
#define CONSTANT_ADDRESS_P(X) 0
|
#define CONSTANT_ADDRESS_P(X) 0
|
|
|
/* Maximum number of registers that can appear in a valid memory address. */
|
/* Maximum number of registers that can appear in a valid memory address. */
|
#define MAX_REGS_PER_ADDRESS 2
|
#define MAX_REGS_PER_ADDRESS 2
|
|
|
/* S/390 has no mode dependent addresses. */
|
/* S/390 has no mode dependent addresses. */
|
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
|
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
|
|
|
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
|
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
|
valid memory address for an instruction.
|
valid memory address for an instruction.
|
The MODE argument is the machine mode for the MEM expression
|
The MODE argument is the machine mode for the MEM expression
|
that wants to use this address. */
|
that wants to use this address. */
|
#ifdef REG_OK_STRICT
|
#ifdef REG_OK_STRICT
|
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
|
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
|
{ \
|
{ \
|
if (legitimate_address_p (MODE, X, 1)) \
|
if (legitimate_address_p (MODE, X, 1)) \
|
goto ADDR; \
|
goto ADDR; \
|
}
|
}
|
#else
|
#else
|
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
|
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
|
{ \
|
{ \
|
if (legitimate_address_p (MODE, X, 0)) \
|
if (legitimate_address_p (MODE, X, 0)) \
|
goto ADDR; \
|
goto ADDR; \
|
}
|
}
|
#endif
|
#endif
|
|
|
/* Try machine-dependent ways of modifying an illegitimate address
|
/* Try machine-dependent ways of modifying an illegitimate address
|
to be legitimate. If we find one, return the new, valid address.
|
to be legitimate. If we find one, return the new, valid address.
|
This macro is used in only one place: `memory_address' in explow.c. */
|
This macro is used in only one place: `memory_address' in explow.c. */
|
#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
|
#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
|
{ \
|
{ \
|
(X) = legitimize_address (X, OLDX, MODE); \
|
(X) = legitimize_address (X, OLDX, MODE); \
|
if (memory_address_p (MODE, X)) \
|
if (memory_address_p (MODE, X)) \
|
goto WIN; \
|
goto WIN; \
|
}
|
}
|
|
|
/* Try a machine-dependent way of reloading an illegitimate address
|
/* Try a machine-dependent way of reloading an illegitimate address
|
operand. If we find one, push the reload and jump to WIN. This
|
operand. If we find one, push the reload and jump to WIN. This
|
macro is used in only one place: `find_reloads_address' in reload.c. */
|
macro is used in only one place: `find_reloads_address' in reload.c. */
|
#define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
|
#define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
|
do { \
|
do { \
|
rtx new = legitimize_reload_address (AD, MODE, OPNUM, (int)(TYPE)); \
|
rtx new = legitimize_reload_address (AD, MODE, OPNUM, (int)(TYPE)); \
|
if (new) \
|
if (new) \
|
{ \
|
{ \
|
(AD) = new; \
|
(AD) = new; \
|
goto WIN; \
|
goto WIN; \
|
} \
|
} \
|
} while (0)
|
} while (0)
|
|
|
/* Nonzero if the constant value X is a legitimate general operand.
|
/* Nonzero if the constant value X is a legitimate general operand.
|
It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
|
It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
|
#define LEGITIMATE_CONSTANT_P(X) \
|
#define LEGITIMATE_CONSTANT_P(X) \
|
legitimate_constant_p (X)
|
legitimate_constant_p (X)
|
|
|
/* Helper macro for s390.c and s390.md to check for symbolic constants. */
|
/* Helper macro for s390.c and s390.md to check for symbolic constants. */
|
#define SYMBOLIC_CONST(X) \
|
#define SYMBOLIC_CONST(X) \
|
(GET_CODE (X) == SYMBOL_REF \
|
(GET_CODE (X) == SYMBOL_REF \
|
|| GET_CODE (X) == LABEL_REF \
|
|| GET_CODE (X) == LABEL_REF \
|
|| (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
|
|| (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
|
|
|
#define TLS_SYMBOLIC_CONST(X) \
|
#define TLS_SYMBOLIC_CONST(X) \
|
((GET_CODE (X) == SYMBOL_REF && tls_symbolic_operand (X)) \
|
((GET_CODE (X) == SYMBOL_REF && tls_symbolic_operand (X)) \
|
|| (GET_CODE (X) == CONST && tls_symbolic_reference_mentioned_p (X)))
|
|| (GET_CODE (X) == CONST && tls_symbolic_reference_mentioned_p (X)))
|
|
|
|
|
/* Condition codes. */
|
/* Condition codes. */
|
|
|
/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
|
/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
|
return the mode to be used for the comparison. */
|
return the mode to be used for the comparison. */
|
#define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
|
#define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
|
|
|
/* Canonicalize a comparison from one we don't have to one we do have. */
|
/* Canonicalize a comparison from one we don't have to one we do have. */
|
#define CANONICALIZE_COMPARISON(CODE, OP0, OP1) \
|
#define CANONICALIZE_COMPARISON(CODE, OP0, OP1) \
|
s390_canonicalize_comparison (&(CODE), &(OP0), &(OP1))
|
s390_canonicalize_comparison (&(CODE), &(OP0), &(OP1))
|
|
|
/* Define the information needed to generate branch and scc insns. This is
|
/* Define the information needed to generate branch and scc insns. This is
|
stored from the compare operation. Note that we can't use "rtx" here
|
stored from the compare operation. Note that we can't use "rtx" here
|
since it hasn't been defined! */
|
since it hasn't been defined! */
|
extern struct rtx_def *s390_compare_op0, *s390_compare_op1, *s390_compare_emitted;
|
extern struct rtx_def *s390_compare_op0, *s390_compare_op1, *s390_compare_emitted;
|
|
|
|
|
/* Relative costs of operations. */
|
/* Relative costs of operations. */
|
|
|
/* On s390, copy between fprs and gprs is expensive. */
|
/* On s390, copy between fprs and gprs is expensive. */
|
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
|
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
|
(( ( reg_classes_intersect_p ((CLASS1), GENERAL_REGS) \
|
(( ( reg_classes_intersect_p ((CLASS1), GENERAL_REGS) \
|
&& reg_classes_intersect_p ((CLASS2), FP_REGS)) \
|
&& reg_classes_intersect_p ((CLASS2), FP_REGS)) \
|
|| ( reg_classes_intersect_p ((CLASS1), FP_REGS) \
|
|| ( reg_classes_intersect_p ((CLASS1), FP_REGS) \
|
&& reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
|
&& reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
|
|
|
/* A C expression for the cost of moving data of mode M between a
|
/* A C expression for the cost of moving data of mode M between a
|
register and memory. A value of 2 is the default; this cost is
|
register and memory. A value of 2 is the default; this cost is
|
relative to those in `REGISTER_MOVE_COST'. */
|
relative to those in `REGISTER_MOVE_COST'. */
|
#define MEMORY_MOVE_COST(M, C, I) 1
|
#define MEMORY_MOVE_COST(M, C, I) 1
|
|
|
/* A C expression for the cost of a branch instruction. A value of 1
|
/* A C expression for the cost of a branch instruction. A value of 1
|
is the default; other values are interpreted relative to that. */
|
is the default; other values are interpreted relative to that. */
|
#define BRANCH_COST 1
|
#define BRANCH_COST 1
|
|
|
/* Nonzero if access to memory by bytes is slow and undesirable. */
|
/* Nonzero if access to memory by bytes is slow and undesirable. */
|
#define SLOW_BYTE_ACCESS 1
|
#define SLOW_BYTE_ACCESS 1
|
|
|
/* An integer expression for the size in bits of the largest integer machine
|
/* An integer expression for the size in bits of the largest integer machine
|
mode that should actually be used. We allow pairs of registers. */
|
mode that should actually be used. We allow pairs of registers. */
|
#define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TARGET_64BIT ? TImode : DImode)
|
#define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TARGET_64BIT ? TImode : DImode)
|
|
|
/* The maximum number of bytes that a single instruction can move quickly
|
/* The maximum number of bytes that a single instruction can move quickly
|
between memory and registers or between two memory locations. */
|
between memory and registers or between two memory locations. */
|
#define MOVE_MAX (TARGET_64BIT ? 16 : 8)
|
#define MOVE_MAX (TARGET_64BIT ? 16 : 8)
|
#define MOVE_MAX_PIECES (TARGET_64BIT ? 8 : 4)
|
#define MOVE_MAX_PIECES (TARGET_64BIT ? 8 : 4)
|
#define MAX_MOVE_MAX 16
|
#define MAX_MOVE_MAX 16
|
|
|
/* Determine whether to use move_by_pieces or block move insn. */
|
/* Determine whether to use move_by_pieces or block move insn. */
|
#define MOVE_BY_PIECES_P(SIZE, ALIGN) \
|
#define MOVE_BY_PIECES_P(SIZE, ALIGN) \
|
( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4 \
|
( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4 \
|
|| (TARGET_64BIT && (SIZE) == 8) )
|
|| (TARGET_64BIT && (SIZE) == 8) )
|
|
|
/* Determine whether to use clear_by_pieces or block clear insn. */
|
/* Determine whether to use clear_by_pieces or block clear insn. */
|
#define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
|
#define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
|
( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4 \
|
( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4 \
|
|| (TARGET_64BIT && (SIZE) == 8) )
|
|| (TARGET_64BIT && (SIZE) == 8) )
|
|
|
/* This macro is used to determine whether store_by_pieces should be
|
/* This macro is used to determine whether store_by_pieces should be
|
called to "memset" storage with byte values other than zero, or
|
called to "memset" storage with byte values other than zero, or
|
to "memcpy" storage when the source is a constant string. */
|
to "memcpy" storage when the source is a constant string. */
|
#define STORE_BY_PIECES_P(SIZE, ALIGN) MOVE_BY_PIECES_P (SIZE, ALIGN)
|
#define STORE_BY_PIECES_P(SIZE, ALIGN) MOVE_BY_PIECES_P (SIZE, ALIGN)
|
|
|
/* Don't perform CSE on function addresses. */
|
/* Don't perform CSE on function addresses. */
|
#define NO_FUNCTION_CSE
|
#define NO_FUNCTION_CSE
|
|
|
|
|
/* Sections. */
|
/* Sections. */
|
|
|
/* Output before read-only data. */
|
/* Output before read-only data. */
|
#define TEXT_SECTION_ASM_OP ".text"
|
#define TEXT_SECTION_ASM_OP ".text"
|
|
|
/* Output before writable (initialized) data. */
|
/* Output before writable (initialized) data. */
|
#define DATA_SECTION_ASM_OP ".data"
|
#define DATA_SECTION_ASM_OP ".data"
|
|
|
/* Output before writable (uninitialized) data. */
|
/* Output before writable (uninitialized) data. */
|
#define BSS_SECTION_ASM_OP ".bss"
|
#define BSS_SECTION_ASM_OP ".bss"
|
|
|
/* S/390 constant pool breaks the devices in crtstuff.c to control section
|
/* S/390 constant pool breaks the devices in crtstuff.c to control section
|
in where code resides. We have to write it as asm code. */
|
in where code resides. We have to write it as asm code. */
|
#ifndef __s390x__
|
#ifndef __s390x__
|
#define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
|
#define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
|
asm (SECTION_OP "\n\
|
asm (SECTION_OP "\n\
|
bras\t%r2,1f\n\
|
bras\t%r2,1f\n\
|
0: .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
|
0: .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
|
1: l\t%r3,0(%r2)\n\
|
1: l\t%r3,0(%r2)\n\
|
bas\t%r14,0(%r3,%r2)\n\
|
bas\t%r14,0(%r3,%r2)\n\
|
.previous");
|
.previous");
|
#endif
|
#endif
|
|
|
|
|
/* Position independent code. */
|
/* Position independent code. */
|
|
|
extern int flag_pic;
|
extern int flag_pic;
|
|
|
#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
|
#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
|
|
|
#define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X)
|
#define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X)
|
|
|
|
|
/* Assembler file format. */
|
/* Assembler file format. */
|
|
|
/* Character to start a comment. */
|
/* Character to start a comment. */
|
#define ASM_COMMENT_START "#"
|
#define ASM_COMMENT_START "#"
|
|
|
/* Declare an uninitialized external linkage data object. */
|
/* Declare an uninitialized external linkage data object. */
|
#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
|
#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
|
asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
|
asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
|
|
|
/* Globalizing directive for a label. */
|
/* Globalizing directive for a label. */
|
#define GLOBAL_ASM_OP ".globl "
|
#define GLOBAL_ASM_OP ".globl "
|
|
|
/* Advance the location counter to a multiple of 2**LOG bytes. */
|
/* Advance the location counter to a multiple of 2**LOG bytes. */
|
#define ASM_OUTPUT_ALIGN(FILE, LOG) \
|
#define ASM_OUTPUT_ALIGN(FILE, LOG) \
|
if ((LOG)) fprintf ((FILE), "\t.align\t%d\n", 1 << (LOG))
|
if ((LOG)) fprintf ((FILE), "\t.align\t%d\n", 1 << (LOG))
|
|
|
/* Advance the location counter by SIZE bytes. */
|
/* Advance the location counter by SIZE bytes. */
|
#define ASM_OUTPUT_SKIP(FILE, SIZE) \
|
#define ASM_OUTPUT_SKIP(FILE, SIZE) \
|
fprintf ((FILE), "\t.set\t.,.+"HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
|
fprintf ((FILE), "\t.set\t.,.+"HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
|
|
|
/* The LOCAL_LABEL_PREFIX variable is used by dbxelf.h. */
|
/* The LOCAL_LABEL_PREFIX variable is used by dbxelf.h. */
|
#define LOCAL_LABEL_PREFIX "."
|
#define LOCAL_LABEL_PREFIX "."
|
|
|
/* How to refer to registers in assembler output. This sequence is
|
/* How to refer to registers in assembler output. This sequence is
|
indexed by compiler's hard-register-number (see above). */
|
indexed by compiler's hard-register-number (see above). */
|
#define REGISTER_NAMES \
|
#define REGISTER_NAMES \
|
{ "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
|
{ "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
|
"%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
|
"%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
|
"%f0", "%f2", "%f4", "%f6", "%f1", "%f3", "%f5", "%f7", \
|
"%f0", "%f2", "%f4", "%f6", "%f1", "%f3", "%f5", "%f7", \
|
"%f8", "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15", \
|
"%f8", "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15", \
|
"%ap", "%cc", "%fp", "%rp", "%a0", "%a1" \
|
"%ap", "%cc", "%fp", "%rp", "%a0", "%a1" \
|
}
|
}
|
|
|
/* Print operand X (an rtx) in assembler syntax to file FILE. */
|
/* Print operand X (an rtx) in assembler syntax to file FILE. */
|
#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
|
#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
|
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
|
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
|
|
|
/* Output machine-dependent UNSPECs in address constants. */
|
/* Output machine-dependent UNSPECs in address constants. */
|
#define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL) \
|
#define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL) \
|
do { \
|
do { \
|
if (!s390_output_addr_const_extra (FILE, (X))) \
|
if (!s390_output_addr_const_extra (FILE, (X))) \
|
goto FAIL; \
|
goto FAIL; \
|
} while (0);
|
} while (0);
|
|
|
/* Output an element of a case-vector that is absolute. */
|
/* Output an element of a case-vector that is absolute. */
|
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
|
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
|
do { \
|
do { \
|
char buf[32]; \
|
char buf[32]; \
|
fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE)); \
|
fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE)); \
|
ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
|
ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
|
assemble_name ((FILE), buf); \
|
assemble_name ((FILE), buf); \
|
fputc ('\n', (FILE)); \
|
fputc ('\n', (FILE)); \
|
} while (0)
|
} while (0)
|
|
|
/* Output an element of a case-vector that is relative. */
|
/* Output an element of a case-vector that is relative. */
|
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
|
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
|
do { \
|
do { \
|
char buf[32]; \
|
char buf[32]; \
|
fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE)); \
|
fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE)); \
|
ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
|
ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
|
assemble_name ((FILE), buf); \
|
assemble_name ((FILE), buf); \
|
fputc ('-', (FILE)); \
|
fputc ('-', (FILE)); \
|
ASM_GENERATE_INTERNAL_LABEL (buf, "L", (REL)); \
|
ASM_GENERATE_INTERNAL_LABEL (buf, "L", (REL)); \
|
assemble_name ((FILE), buf); \
|
assemble_name ((FILE), buf); \
|
fputc ('\n', (FILE)); \
|
fputc ('\n', (FILE)); \
|
} while (0)
|
} while (0)
|
|
|
|
|
/* Miscellaneous parameters. */
|
/* Miscellaneous parameters. */
|
|
|
/* Specify the machine mode that this machine uses for the index in the
|
/* Specify the machine mode that this machine uses for the index in the
|
tablejump instruction. */
|
tablejump instruction. */
|
#define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
|
#define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
|
|
|
/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
|
/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
|
is done just by pretending it is already truncated. */
|
is done just by pretending it is already truncated. */
|
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
|
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
|
|
|
/* Specify the machine mode that pointers have.
|
/* Specify the machine mode that pointers have.
|
After generation of rtl, the compiler makes no further distinction
|
After generation of rtl, the compiler makes no further distinction
|
between pointers and any other objects of this machine mode. */
|
between pointers and any other objects of this machine mode. */
|
#define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
|
#define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
|
|
|
/* This is -1 for "pointer mode" extend. See ptr_extend in s390.md. */
|
/* This is -1 for "pointer mode" extend. See ptr_extend in s390.md. */
|
#define POINTERS_EXTEND_UNSIGNED -1
|
#define POINTERS_EXTEND_UNSIGNED -1
|
|
|
/* A function address in a call instruction is a byte address (for
|
/* A function address in a call instruction is a byte address (for
|
indexing purposes) so give the MEM rtx a byte's mode. */
|
indexing purposes) so give the MEM rtx a byte's mode. */
|
#define FUNCTION_MODE QImode
|
#define FUNCTION_MODE QImode
|
|
|
/* Specify the value which is used when clz operand is zero. */
|
/* Specify the value which is used when clz operand is zero. */
|
#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, 1)
|
#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, 1)
|
|
|
/* Machine-specific symbol_ref flags. */
|
/* Machine-specific symbol_ref flags. */
|
#define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
|
#define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
|
|
|
/* Check whether integer displacement is in range. */
|
/* Check whether integer displacement is in range. */
|
#define DISP_IN_RANGE(d) \
|
#define DISP_IN_RANGE(d) \
|
(TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
|
(TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
|
: ((d) >= 0 && (d) <= 4095))
|
: ((d) >= 0 && (d) <= 4095))
|
|
|
#endif
|
#endif
|
|
|
