/* Compute register class preferences for pseudo-registers.
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/* Compute register class preferences for pseudo-registers.
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Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996
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Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996
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1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007
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1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007
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Free Software Foundation, Inc.
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Free Software Foundation, Inc.
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This file is part of GCC.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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Software Foundation; either version 3, or (at your option) any later
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version.
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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<http://www.gnu.org/licenses/>. */
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/* This file contains two passes of the compiler: reg_scan and reg_class.
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/* This file contains two passes of the compiler: reg_scan and reg_class.
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It also defines some tables of information about the hardware registers
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It also defines some tables of information about the hardware registers
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and a function init_reg_sets to initialize the tables. */
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and a function init_reg_sets to initialize the tables. */
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#include "config.h"
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#include "config.h"
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#include "system.h"
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#include "system.h"
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#include "coretypes.h"
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#include "coretypes.h"
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#include "tm.h"
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#include "tm.h"
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#include "hard-reg-set.h"
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#include "hard-reg-set.h"
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#include "rtl.h"
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#include "rtl.h"
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#include "expr.h"
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#include "expr.h"
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#include "tm_p.h"
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#include "tm_p.h"
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#include "flags.h"
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#include "flags.h"
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#include "basic-block.h"
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#include "basic-block.h"
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#include "regs.h"
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#include "regs.h"
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#include "addresses.h"
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#include "addresses.h"
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#include "function.h"
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#include "function.h"
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#include "insn-config.h"
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#include "insn-config.h"
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#include "recog.h"
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#include "recog.h"
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#include "reload.h"
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#include "reload.h"
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#include "real.h"
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#include "real.h"
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#include "toplev.h"
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#include "toplev.h"
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#include "output.h"
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#include "output.h"
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#include "ggc.h"
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#include "ggc.h"
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#include "timevar.h"
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#include "timevar.h"
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#include "hashtab.h"
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#include "hashtab.h"
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#include "target.h"
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#include "target.h"
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static void init_reg_sets_1 (void);
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static void init_reg_sets_1 (void);
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static void init_reg_autoinc (void);
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static void init_reg_autoinc (void);
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/* If we have auto-increment or auto-decrement and we can have secondary
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/* If we have auto-increment or auto-decrement and we can have secondary
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reloads, we are not allowed to use classes requiring secondary
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reloads, we are not allowed to use classes requiring secondary
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reloads for pseudos auto-incremented since reload can't handle it. */
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reloads for pseudos auto-incremented since reload can't handle it. */
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/* We leave it to target hooks to decide if we have secondary reloads, so
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/* We leave it to target hooks to decide if we have secondary reloads, so
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assume that we might have them. */
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assume that we might have them. */
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#if defined(AUTO_INC_DEC) /* */
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#if defined(AUTO_INC_DEC) /* */
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#define FORBIDDEN_INC_DEC_CLASSES
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#define FORBIDDEN_INC_DEC_CLASSES
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#endif
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#endif
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/* Register tables used by many passes. */
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/* Register tables used by many passes. */
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/* Indexed by hard register number, contains 1 for registers
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/* Indexed by hard register number, contains 1 for registers
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that are fixed use (stack pointer, pc, frame pointer, etc.).
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that are fixed use (stack pointer, pc, frame pointer, etc.).
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These are the registers that cannot be used to allocate
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These are the registers that cannot be used to allocate
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a pseudo reg for general use. */
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a pseudo reg for general use. */
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char fixed_regs[FIRST_PSEUDO_REGISTER];
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char fixed_regs[FIRST_PSEUDO_REGISTER];
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/* Same info as a HARD_REG_SET. */
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/* Same info as a HARD_REG_SET. */
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HARD_REG_SET fixed_reg_set;
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HARD_REG_SET fixed_reg_set;
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/* Data for initializing the above. */
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/* Data for initializing the above. */
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static const char initial_fixed_regs[] = FIXED_REGISTERS;
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static const char initial_fixed_regs[] = FIXED_REGISTERS;
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/* Indexed by hard register number, contains 1 for registers
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/* Indexed by hard register number, contains 1 for registers
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that are fixed use or are clobbered by function calls.
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that are fixed use or are clobbered by function calls.
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These are the registers that cannot be used to allocate
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These are the registers that cannot be used to allocate
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a pseudo reg whose life crosses calls unless we are able
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a pseudo reg whose life crosses calls unless we are able
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to save/restore them across the calls. */
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to save/restore them across the calls. */
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char call_used_regs[FIRST_PSEUDO_REGISTER];
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char call_used_regs[FIRST_PSEUDO_REGISTER];
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/* Same info as a HARD_REG_SET. */
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/* Same info as a HARD_REG_SET. */
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HARD_REG_SET call_used_reg_set;
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HARD_REG_SET call_used_reg_set;
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/* HARD_REG_SET of registers we want to avoid caller saving. */
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/* HARD_REG_SET of registers we want to avoid caller saving. */
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HARD_REG_SET losing_caller_save_reg_set;
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HARD_REG_SET losing_caller_save_reg_set;
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/* Data for initializing the above. */
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/* Data for initializing the above. */
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static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
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static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
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/* This is much like call_used_regs, except it doesn't have to
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/* This is much like call_used_regs, except it doesn't have to
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be a superset of FIXED_REGISTERS. This vector indicates
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be a superset of FIXED_REGISTERS. This vector indicates
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what is really call clobbered, and is used when defining
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what is really call clobbered, and is used when defining
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regs_invalidated_by_call. */
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regs_invalidated_by_call. */
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#ifdef CALL_REALLY_USED_REGISTERS
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#ifdef CALL_REALLY_USED_REGISTERS
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char call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
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char call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
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#endif
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#endif
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#ifdef CALL_REALLY_USED_REGISTERS
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#ifdef CALL_REALLY_USED_REGISTERS
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#define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
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#define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
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#else
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#else
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#define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
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#define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
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#endif
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#endif
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/* Indexed by hard register number, contains 1 for registers that are
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/* Indexed by hard register number, contains 1 for registers that are
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fixed use or call used registers that cannot hold quantities across
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fixed use or call used registers that cannot hold quantities across
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calls even if we are willing to save and restore them. call fixed
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calls even if we are willing to save and restore them. call fixed
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registers are a subset of call used registers. */
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registers are a subset of call used registers. */
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char call_fixed_regs[FIRST_PSEUDO_REGISTER];
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char call_fixed_regs[FIRST_PSEUDO_REGISTER];
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/* The same info as a HARD_REG_SET. */
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/* The same info as a HARD_REG_SET. */
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HARD_REG_SET call_fixed_reg_set;
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HARD_REG_SET call_fixed_reg_set;
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/* Indexed by hard register number, contains 1 for registers
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/* Indexed by hard register number, contains 1 for registers
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that are being used for global register decls.
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that are being used for global register decls.
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These must be exempt from ordinary flow analysis
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These must be exempt from ordinary flow analysis
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and are also considered fixed. */
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and are also considered fixed. */
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char global_regs[FIRST_PSEUDO_REGISTER];
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char global_regs[FIRST_PSEUDO_REGISTER];
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/* Contains 1 for registers that are set or clobbered by calls. */
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/* Contains 1 for registers that are set or clobbered by calls. */
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/* ??? Ideally, this would be just call_used_regs plus global_regs, but
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/* ??? Ideally, this would be just call_used_regs plus global_regs, but
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for someone's bright idea to have call_used_regs strictly include
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for someone's bright idea to have call_used_regs strictly include
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fixed_regs. Which leaves us guessing as to the set of fixed_regs
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fixed_regs. Which leaves us guessing as to the set of fixed_regs
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that are actually preserved. We know for sure that those associated
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that are actually preserved. We know for sure that those associated
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with the local stack frame are safe, but scant others. */
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with the local stack frame are safe, but scant others. */
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HARD_REG_SET regs_invalidated_by_call;
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HARD_REG_SET regs_invalidated_by_call;
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/* Table of register numbers in the order in which to try to use them. */
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/* Table of register numbers in the order in which to try to use them. */
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#ifdef REG_ALLOC_ORDER
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#ifdef REG_ALLOC_ORDER
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int reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
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int reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
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/* The inverse of reg_alloc_order. */
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/* The inverse of reg_alloc_order. */
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int inv_reg_alloc_order[FIRST_PSEUDO_REGISTER];
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int inv_reg_alloc_order[FIRST_PSEUDO_REGISTER];
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#endif
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#endif
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/* For each reg class, a HARD_REG_SET saying which registers are in it. */
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/* For each reg class, a HARD_REG_SET saying which registers are in it. */
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HARD_REG_SET reg_class_contents[N_REG_CLASSES];
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HARD_REG_SET reg_class_contents[N_REG_CLASSES];
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/* The same information, but as an array of unsigned ints. We copy from
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/* The same information, but as an array of unsigned ints. We copy from
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these unsigned ints to the table above. We do this so the tm.h files
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these unsigned ints to the table above. We do this so the tm.h files
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do not have to be aware of the wordsize for machines with <= 64 regs.
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do not have to be aware of the wordsize for machines with <= 64 regs.
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Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
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Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
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#define N_REG_INTS \
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#define N_REG_INTS \
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((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
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((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
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static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
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static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
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= REG_CLASS_CONTENTS;
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= REG_CLASS_CONTENTS;
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/* For each reg class, number of regs it contains. */
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/* For each reg class, number of regs it contains. */
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unsigned int reg_class_size[N_REG_CLASSES];
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unsigned int reg_class_size[N_REG_CLASSES];
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/* For each reg class, table listing all the containing classes. */
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/* For each reg class, table listing all the containing classes. */
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static enum reg_class reg_class_superclasses[N_REG_CLASSES][N_REG_CLASSES];
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static enum reg_class reg_class_superclasses[N_REG_CLASSES][N_REG_CLASSES];
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/* For each reg class, table listing all the classes contained in it. */
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/* For each reg class, table listing all the classes contained in it. */
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static enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
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static enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
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/* For each pair of reg classes,
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/* For each pair of reg classes,
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a largest reg class contained in their union. */
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a largest reg class contained in their union. */
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enum reg_class reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
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enum reg_class reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
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/* For each pair of reg classes,
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/* For each pair of reg classes,
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the smallest reg class containing their union. */
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the smallest reg class containing their union. */
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enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
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enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
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/* Array containing all of the register names. */
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/* Array containing all of the register names. */
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const char * reg_names[] = REGISTER_NAMES;
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const char * reg_names[] = REGISTER_NAMES;
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/* Array containing all of the register class names. */
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/* Array containing all of the register class names. */
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const char * reg_class_names[] = REG_CLASS_NAMES;
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const char * reg_class_names[] = REG_CLASS_NAMES;
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/* For each hard register, the widest mode object that it can contain.
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/* For each hard register, the widest mode object that it can contain.
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This will be a MODE_INT mode if the register can hold integers. Otherwise
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This will be a MODE_INT mode if the register can hold integers. Otherwise
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it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
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it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
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register. */
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register. */
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enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
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enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
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/* 1 if there is a register of given mode. */
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/* 1 if there is a register of given mode. */
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bool have_regs_of_mode [MAX_MACHINE_MODE];
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bool have_regs_of_mode [MAX_MACHINE_MODE];
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/* 1 if class does contain register of given mode. */
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/* 1 if class does contain register of given mode. */
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static char contains_reg_of_mode [N_REG_CLASSES] [MAX_MACHINE_MODE];
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static char contains_reg_of_mode [N_REG_CLASSES] [MAX_MACHINE_MODE];
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/* Maximum cost of moving from a register in one class to a register in
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/* Maximum cost of moving from a register in one class to a register in
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another class. Based on REGISTER_MOVE_COST. */
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another class. Based on REGISTER_MOVE_COST. */
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static int move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][N_REG_CLASSES];
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static int move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][N_REG_CLASSES];
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/* Similar, but here we don't have to move if the first index is a subset
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/* Similar, but here we don't have to move if the first index is a subset
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of the second so in that case the cost is zero. */
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of the second so in that case the cost is zero. */
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static int may_move_in_cost[MAX_MACHINE_MODE][N_REG_CLASSES][N_REG_CLASSES];
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static int may_move_in_cost[MAX_MACHINE_MODE][N_REG_CLASSES][N_REG_CLASSES];
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/* Similar, but here we don't have to move if the first index is a superset
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/* Similar, but here we don't have to move if the first index is a superset
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of the second so in that case the cost is zero. */
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of the second so in that case the cost is zero. */
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static int may_move_out_cost[MAX_MACHINE_MODE][N_REG_CLASSES][N_REG_CLASSES];
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static int may_move_out_cost[MAX_MACHINE_MODE][N_REG_CLASSES][N_REG_CLASSES];
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#ifdef FORBIDDEN_INC_DEC_CLASSES
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#ifdef FORBIDDEN_INC_DEC_CLASSES
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/* These are the classes that regs which are auto-incremented or decremented
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/* These are the classes that regs which are auto-incremented or decremented
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cannot be put in. */
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cannot be put in. */
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static int forbidden_inc_dec_class[N_REG_CLASSES];
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static int forbidden_inc_dec_class[N_REG_CLASSES];
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/* Indexed by n, is nonzero if (REG n) is used in an auto-inc or auto-dec
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/* Indexed by n, is nonzero if (REG n) is used in an auto-inc or auto-dec
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context. */
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context. */
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static char *in_inc_dec;
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static char *in_inc_dec;
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#endif /* FORBIDDEN_INC_DEC_CLASSES */
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#endif /* FORBIDDEN_INC_DEC_CLASSES */
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/* Sample MEM values for use by memory_move_secondary_cost. */
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/* Sample MEM values for use by memory_move_secondary_cost. */
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static GTY(()) rtx top_of_stack[MAX_MACHINE_MODE];
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static GTY(()) rtx top_of_stack[MAX_MACHINE_MODE];
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/* Linked list of reg_info structures allocated for reg_n_info array.
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/* Linked list of reg_info structures allocated for reg_n_info array.
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Grouping all of the allocated structures together in one lump
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Grouping all of the allocated structures together in one lump
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means only one call to bzero to clear them, rather than n smaller
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means only one call to bzero to clear them, rather than n smaller
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calls. */
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calls. */
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struct reg_info_data {
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struct reg_info_data {
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struct reg_info_data *next; /* next set of reg_info structures */
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struct reg_info_data *next; /* next set of reg_info structures */
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size_t min_index; /* minimum index # */
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size_t min_index; /* minimum index # */
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size_t max_index; /* maximum index # */
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size_t max_index; /* maximum index # */
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char used_p; /* nonzero if this has been used previously */
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char used_p; /* nonzero if this has been used previously */
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reg_info data[1]; /* beginning of the reg_info data */
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reg_info data[1]; /* beginning of the reg_info data */
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};
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};
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static struct reg_info_data *reg_info_head;
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static struct reg_info_data *reg_info_head;
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/* No more global register variables may be declared; true once
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/* No more global register variables may be declared; true once
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regclass has been initialized. */
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regclass has been initialized. */
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static int no_global_reg_vars = 0;
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static int no_global_reg_vars = 0;
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/* Specify number of hard registers given machine mode occupy. */
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/* Specify number of hard registers given machine mode occupy. */
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unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
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unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
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/* Function called only once to initialize the above data on reg usage.
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/* Function called only once to initialize the above data on reg usage.
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Once this is done, various switches may override. */
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Once this is done, various switches may override. */
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void
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void
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init_reg_sets (void)
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init_reg_sets (void)
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{
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{
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int i, j;
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int i, j;
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/* First copy the register information from the initial int form into
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/* First copy the register information from the initial int form into
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the regsets. */
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the regsets. */
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for (i = 0; i < N_REG_CLASSES; i++)
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for (i = 0; i < N_REG_CLASSES; i++)
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{
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{
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CLEAR_HARD_REG_SET (reg_class_contents[i]);
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CLEAR_HARD_REG_SET (reg_class_contents[i]);
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/* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
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/* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
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for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
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for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
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if (int_reg_class_contents[i][j / 32]
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if (int_reg_class_contents[i][j / 32]
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& ((unsigned) 1 << (j % 32)))
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& ((unsigned) 1 << (j % 32)))
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SET_HARD_REG_BIT (reg_class_contents[i], j);
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SET_HARD_REG_BIT (reg_class_contents[i], j);
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}
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}
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/* Sanity check: make sure the target macros FIXED_REGISTERS and
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/* Sanity check: make sure the target macros FIXED_REGISTERS and
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CALL_USED_REGISTERS had the right number of initializers. */
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CALL_USED_REGISTERS had the right number of initializers. */
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gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
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gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
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gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
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gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
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memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
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memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
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memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
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memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
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memset (global_regs, 0, sizeof global_regs);
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memset (global_regs, 0, sizeof global_regs);
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#ifdef REG_ALLOC_ORDER
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#ifdef REG_ALLOC_ORDER
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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inv_reg_alloc_order[reg_alloc_order[i]] = i;
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inv_reg_alloc_order[reg_alloc_order[i]] = i;
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#endif
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#endif
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}
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}
|
|
|
/* After switches have been processed, which perhaps alter
|
/* After switches have been processed, which perhaps alter
|
`fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
|
`fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
|
|
|
static void
|
static void
|
init_reg_sets_1 (void)
|
init_reg_sets_1 (void)
|
{
|
{
|
unsigned int i, j;
|
unsigned int i, j;
|
unsigned int /* enum machine_mode */ m;
|
unsigned int /* enum machine_mode */ m;
|
|
|
/* This macro allows the fixed or call-used registers
|
/* This macro allows the fixed or call-used registers
|
and the register classes to depend on target flags. */
|
and the register classes to depend on target flags. */
|
|
|
#ifdef CONDITIONAL_REGISTER_USAGE
|
#ifdef CONDITIONAL_REGISTER_USAGE
|
CONDITIONAL_REGISTER_USAGE;
|
CONDITIONAL_REGISTER_USAGE;
|
#endif
|
#endif
|
|
|
/* Compute number of hard regs in each class. */
|
/* Compute number of hard regs in each class. */
|
|
|
memset (reg_class_size, 0, sizeof reg_class_size);
|
memset (reg_class_size, 0, sizeof reg_class_size);
|
for (i = 0; i < N_REG_CLASSES; i++)
|
for (i = 0; i < N_REG_CLASSES; i++)
|
for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
|
for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
|
if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
|
if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
|
reg_class_size[i]++;
|
reg_class_size[i]++;
|
|
|
/* Initialize the table of subunions.
|
/* Initialize the table of subunions.
|
reg_class_subunion[I][J] gets the largest-numbered reg-class
|
reg_class_subunion[I][J] gets the largest-numbered reg-class
|
that is contained in the union of classes I and J. */
|
that is contained in the union of classes I and J. */
|
|
|
for (i = 0; i < N_REG_CLASSES; i++)
|
for (i = 0; i < N_REG_CLASSES; i++)
|
{
|
{
|
for (j = 0; j < N_REG_CLASSES; j++)
|
for (j = 0; j < N_REG_CLASSES; j++)
|
{
|
{
|
HARD_REG_SET c;
|
HARD_REG_SET c;
|
int k;
|
int k;
|
|
|
COPY_HARD_REG_SET (c, reg_class_contents[i]);
|
COPY_HARD_REG_SET (c, reg_class_contents[i]);
|
IOR_HARD_REG_SET (c, reg_class_contents[j]);
|
IOR_HARD_REG_SET (c, reg_class_contents[j]);
|
for (k = 0; k < N_REG_CLASSES; k++)
|
for (k = 0; k < N_REG_CLASSES; k++)
|
{
|
{
|
GO_IF_HARD_REG_SUBSET (reg_class_contents[k], c,
|
GO_IF_HARD_REG_SUBSET (reg_class_contents[k], c,
|
subclass1);
|
subclass1);
|
continue;
|
continue;
|
|
|
subclass1:
|
subclass1:
|
/* Keep the largest subclass. */ /* SPEE 900308 */
|
/* Keep the largest subclass. */ /* SPEE 900308 */
|
GO_IF_HARD_REG_SUBSET (reg_class_contents[k],
|
GO_IF_HARD_REG_SUBSET (reg_class_contents[k],
|
reg_class_contents[(int) reg_class_subunion[i][j]],
|
reg_class_contents[(int) reg_class_subunion[i][j]],
|
subclass2);
|
subclass2);
|
reg_class_subunion[i][j] = (enum reg_class) k;
|
reg_class_subunion[i][j] = (enum reg_class) k;
|
subclass2:
|
subclass2:
|
;
|
;
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
/* Initialize the table of superunions.
|
/* Initialize the table of superunions.
|
reg_class_superunion[I][J] gets the smallest-numbered reg-class
|
reg_class_superunion[I][J] gets the smallest-numbered reg-class
|
containing the union of classes I and J. */
|
containing the union of classes I and J. */
|
|
|
for (i = 0; i < N_REG_CLASSES; i++)
|
for (i = 0; i < N_REG_CLASSES; i++)
|
{
|
{
|
for (j = 0; j < N_REG_CLASSES; j++)
|
for (j = 0; j < N_REG_CLASSES; j++)
|
{
|
{
|
HARD_REG_SET c;
|
HARD_REG_SET c;
|
int k;
|
int k;
|
|
|
COPY_HARD_REG_SET (c, reg_class_contents[i]);
|
COPY_HARD_REG_SET (c, reg_class_contents[i]);
|
IOR_HARD_REG_SET (c, reg_class_contents[j]);
|
IOR_HARD_REG_SET (c, reg_class_contents[j]);
|
for (k = 0; k < N_REG_CLASSES; k++)
|
for (k = 0; k < N_REG_CLASSES; k++)
|
GO_IF_HARD_REG_SUBSET (c, reg_class_contents[k], superclass);
|
GO_IF_HARD_REG_SUBSET (c, reg_class_contents[k], superclass);
|
|
|
superclass:
|
superclass:
|
reg_class_superunion[i][j] = (enum reg_class) k;
|
reg_class_superunion[i][j] = (enum reg_class) k;
|
}
|
}
|
}
|
}
|
|
|
/* Initialize the tables of subclasses and superclasses of each reg class.
|
/* Initialize the tables of subclasses and superclasses of each reg class.
|
First clear the whole table, then add the elements as they are found. */
|
First clear the whole table, then add the elements as they are found. */
|
|
|
for (i = 0; i < N_REG_CLASSES; i++)
|
for (i = 0; i < N_REG_CLASSES; i++)
|
{
|
{
|
for (j = 0; j < N_REG_CLASSES; j++)
|
for (j = 0; j < N_REG_CLASSES; j++)
|
{
|
{
|
reg_class_superclasses[i][j] = LIM_REG_CLASSES;
|
reg_class_superclasses[i][j] = LIM_REG_CLASSES;
|
reg_class_subclasses[i][j] = LIM_REG_CLASSES;
|
reg_class_subclasses[i][j] = LIM_REG_CLASSES;
|
}
|
}
|
}
|
}
|
|
|
for (i = 0; i < N_REG_CLASSES; i++)
|
for (i = 0; i < N_REG_CLASSES; i++)
|
{
|
{
|
if (i == (int) NO_REGS)
|
if (i == (int) NO_REGS)
|
continue;
|
continue;
|
|
|
for (j = i + 1; j < N_REG_CLASSES; j++)
|
for (j = i + 1; j < N_REG_CLASSES; j++)
|
{
|
{
|
enum reg_class *p;
|
enum reg_class *p;
|
|
|
GO_IF_HARD_REG_SUBSET (reg_class_contents[i], reg_class_contents[j],
|
GO_IF_HARD_REG_SUBSET (reg_class_contents[i], reg_class_contents[j],
|
subclass);
|
subclass);
|
continue;
|
continue;
|
subclass:
|
subclass:
|
/* Reg class I is a subclass of J.
|
/* Reg class I is a subclass of J.
|
Add J to the table of superclasses of I. */
|
Add J to the table of superclasses of I. */
|
p = ®_class_superclasses[i][0];
|
p = ®_class_superclasses[i][0];
|
while (*p != LIM_REG_CLASSES) p++;
|
while (*p != LIM_REG_CLASSES) p++;
|
*p = (enum reg_class) j;
|
*p = (enum reg_class) j;
|
/* Add I to the table of superclasses of J. */
|
/* Add I to the table of superclasses of J. */
|
p = ®_class_subclasses[j][0];
|
p = ®_class_subclasses[j][0];
|
while (*p != LIM_REG_CLASSES) p++;
|
while (*p != LIM_REG_CLASSES) p++;
|
*p = (enum reg_class) i;
|
*p = (enum reg_class) i;
|
}
|
}
|
}
|
}
|
|
|
/* Initialize "constant" tables. */
|
/* Initialize "constant" tables. */
|
|
|
CLEAR_HARD_REG_SET (fixed_reg_set);
|
CLEAR_HARD_REG_SET (fixed_reg_set);
|
CLEAR_HARD_REG_SET (call_used_reg_set);
|
CLEAR_HARD_REG_SET (call_used_reg_set);
|
CLEAR_HARD_REG_SET (call_fixed_reg_set);
|
CLEAR_HARD_REG_SET (call_fixed_reg_set);
|
CLEAR_HARD_REG_SET (regs_invalidated_by_call);
|
CLEAR_HARD_REG_SET (regs_invalidated_by_call);
|
|
|
memcpy (call_fixed_regs, fixed_regs, sizeof call_fixed_regs);
|
memcpy (call_fixed_regs, fixed_regs, sizeof call_fixed_regs);
|
|
|
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
{
|
{
|
/* call_used_regs must include fixed_regs. */
|
/* call_used_regs must include fixed_regs. */
|
gcc_assert (!fixed_regs[i] || call_used_regs[i]);
|
gcc_assert (!fixed_regs[i] || call_used_regs[i]);
|
#ifdef CALL_REALLY_USED_REGISTERS
|
#ifdef CALL_REALLY_USED_REGISTERS
|
/* call_used_regs must include call_really_used_regs. */
|
/* call_used_regs must include call_really_used_regs. */
|
gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
|
gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
|
#endif
|
#endif
|
|
|
if (fixed_regs[i])
|
if (fixed_regs[i])
|
SET_HARD_REG_BIT (fixed_reg_set, i);
|
SET_HARD_REG_BIT (fixed_reg_set, i);
|
|
|
if (call_used_regs[i])
|
if (call_used_regs[i])
|
SET_HARD_REG_BIT (call_used_reg_set, i);
|
SET_HARD_REG_BIT (call_used_reg_set, i);
|
if (call_fixed_regs[i])
|
if (call_fixed_regs[i])
|
SET_HARD_REG_BIT (call_fixed_reg_set, i);
|
SET_HARD_REG_BIT (call_fixed_reg_set, i);
|
if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (i)))
|
if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (i)))
|
SET_HARD_REG_BIT (losing_caller_save_reg_set, i);
|
SET_HARD_REG_BIT (losing_caller_save_reg_set, i);
|
|
|
/* There are a couple of fixed registers that we know are safe to
|
/* There are a couple of fixed registers that we know are safe to
|
exclude from being clobbered by calls:
|
exclude from being clobbered by calls:
|
|
|
The frame pointer is always preserved across calls. The arg pointer
|
The frame pointer is always preserved across calls. The arg pointer
|
is if it is fixed. The stack pointer usually is, unless
|
is if it is fixed. The stack pointer usually is, unless
|
RETURN_POPS_ARGS, in which case an explicit CLOBBER will be present.
|
RETURN_POPS_ARGS, in which case an explicit CLOBBER will be present.
|
If we are generating PIC code, the PIC offset table register is
|
If we are generating PIC code, the PIC offset table register is
|
preserved across calls, though the target can override that. */
|
preserved across calls, though the target can override that. */
|
|
|
if (i == STACK_POINTER_REGNUM)
|
if (i == STACK_POINTER_REGNUM)
|
;
|
;
|
else if (global_regs[i])
|
else if (global_regs[i])
|
SET_HARD_REG_BIT (regs_invalidated_by_call, i);
|
SET_HARD_REG_BIT (regs_invalidated_by_call, i);
|
else if (i == FRAME_POINTER_REGNUM)
|
else if (i == FRAME_POINTER_REGNUM)
|
;
|
;
|
#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
|
#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
|
else if (i == HARD_FRAME_POINTER_REGNUM)
|
else if (i == HARD_FRAME_POINTER_REGNUM)
|
;
|
;
|
#endif
|
#endif
|
#if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
|
#if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
|
else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
|
else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
|
;
|
;
|
#endif
|
#endif
|
#ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
|
#ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
|
else if (i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
|
else if (i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
|
;
|
;
|
#endif
|
#endif
|
else if (CALL_REALLY_USED_REGNO_P (i))
|
else if (CALL_REALLY_USED_REGNO_P (i))
|
SET_HARD_REG_BIT (regs_invalidated_by_call, i);
|
SET_HARD_REG_BIT (regs_invalidated_by_call, i);
|
}
|
}
|
|
|
memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
|
memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
|
memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
|
memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
|
for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
|
for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
|
for (i = 0; i < N_REG_CLASSES; i++)
|
for (i = 0; i < N_REG_CLASSES; i++)
|
if ((unsigned) CLASS_MAX_NREGS (i, m) <= reg_class_size[i])
|
if ((unsigned) CLASS_MAX_NREGS (i, m) <= reg_class_size[i])
|
for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
|
for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
|
if (!fixed_regs [j] && TEST_HARD_REG_BIT (reg_class_contents[i], j)
|
if (!fixed_regs [j] && TEST_HARD_REG_BIT (reg_class_contents[i], j)
|
&& HARD_REGNO_MODE_OK (j, m))
|
&& HARD_REGNO_MODE_OK (j, m))
|
{
|
{
|
contains_reg_of_mode [i][m] = 1;
|
contains_reg_of_mode [i][m] = 1;
|
have_regs_of_mode [m] = 1;
|
have_regs_of_mode [m] = 1;
|
break;
|
break;
|
}
|
}
|
|
|
/* Initialize the move cost table. Find every subset of each class
|
/* Initialize the move cost table. Find every subset of each class
|
and take the maximum cost of moving any subset to any other. */
|
and take the maximum cost of moving any subset to any other. */
|
|
|
for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
|
for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
|
if (have_regs_of_mode [m])
|
if (have_regs_of_mode [m])
|
{
|
{
|
for (i = 0; i < N_REG_CLASSES; i++)
|
for (i = 0; i < N_REG_CLASSES; i++)
|
if (contains_reg_of_mode [i][m])
|
if (contains_reg_of_mode [i][m])
|
for (j = 0; j < N_REG_CLASSES; j++)
|
for (j = 0; j < N_REG_CLASSES; j++)
|
{
|
{
|
int cost;
|
int cost;
|
enum reg_class *p1, *p2;
|
enum reg_class *p1, *p2;
|
|
|
if (!contains_reg_of_mode [j][m])
|
if (!contains_reg_of_mode [j][m])
|
{
|
{
|
move_cost[m][i][j] = 65536;
|
move_cost[m][i][j] = 65536;
|
may_move_in_cost[m][i][j] = 65536;
|
may_move_in_cost[m][i][j] = 65536;
|
may_move_out_cost[m][i][j] = 65536;
|
may_move_out_cost[m][i][j] = 65536;
|
}
|
}
|
else
|
else
|
{
|
{
|
cost = REGISTER_MOVE_COST (m, i, j);
|
cost = REGISTER_MOVE_COST (m, i, j);
|
|
|
for (p2 = ®_class_subclasses[j][0];
|
for (p2 = ®_class_subclasses[j][0];
|
*p2 != LIM_REG_CLASSES;
|
*p2 != LIM_REG_CLASSES;
|
p2++)
|
p2++)
|
if (*p2 != i && contains_reg_of_mode [*p2][m])
|
if (*p2 != i && contains_reg_of_mode [*p2][m])
|
cost = MAX (cost, move_cost [m][i][*p2]);
|
cost = MAX (cost, move_cost [m][i][*p2]);
|
|
|
for (p1 = ®_class_subclasses[i][0];
|
for (p1 = ®_class_subclasses[i][0];
|
*p1 != LIM_REG_CLASSES;
|
*p1 != LIM_REG_CLASSES;
|
p1++)
|
p1++)
|
if (*p1 != j && contains_reg_of_mode [*p1][m])
|
if (*p1 != j && contains_reg_of_mode [*p1][m])
|
cost = MAX (cost, move_cost [m][*p1][j]);
|
cost = MAX (cost, move_cost [m][*p1][j]);
|
|
|
move_cost[m][i][j] = cost;
|
move_cost[m][i][j] = cost;
|
|
|
if (reg_class_subset_p (i, j))
|
if (reg_class_subset_p (i, j))
|
may_move_in_cost[m][i][j] = 0;
|
may_move_in_cost[m][i][j] = 0;
|
else
|
else
|
may_move_in_cost[m][i][j] = cost;
|
may_move_in_cost[m][i][j] = cost;
|
|
|
if (reg_class_subset_p (j, i))
|
if (reg_class_subset_p (j, i))
|
may_move_out_cost[m][i][j] = 0;
|
may_move_out_cost[m][i][j] = 0;
|
else
|
else
|
may_move_out_cost[m][i][j] = cost;
|
may_move_out_cost[m][i][j] = cost;
|
}
|
}
|
}
|
}
|
else
|
else
|
for (j = 0; j < N_REG_CLASSES; j++)
|
for (j = 0; j < N_REG_CLASSES; j++)
|
{
|
{
|
move_cost[m][i][j] = 65536;
|
move_cost[m][i][j] = 65536;
|
may_move_in_cost[m][i][j] = 65536;
|
may_move_in_cost[m][i][j] = 65536;
|
may_move_out_cost[m][i][j] = 65536;
|
may_move_out_cost[m][i][j] = 65536;
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
/* Compute the table of register modes.
|
/* Compute the table of register modes.
|
These values are used to record death information for individual registers
|
These values are used to record death information for individual registers
|
(as opposed to a multi-register mode). */
|
(as opposed to a multi-register mode). */
|
|
|
void
|
void
|
init_reg_modes_once (void)
|
init_reg_modes_once (void)
|
{
|
{
|
int i, j;
|
int i, j;
|
|
|
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
for (j = 0; j < MAX_MACHINE_MODE; j++)
|
for (j = 0; j < MAX_MACHINE_MODE; j++)
|
hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
|
hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
|
|
|
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
{
|
{
|
reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
|
reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
|
|
|
/* If we couldn't find a valid mode, just use the previous mode.
|
/* If we couldn't find a valid mode, just use the previous mode.
|
??? One situation in which we need to do this is on the mips where
|
??? One situation in which we need to do this is on the mips where
|
HARD_REGNO_NREGS (fpreg, [SD]Fmode) returns 2. Ideally we'd like
|
HARD_REGNO_NREGS (fpreg, [SD]Fmode) returns 2. Ideally we'd like
|
to use DF mode for the even registers and VOIDmode for the odd
|
to use DF mode for the even registers and VOIDmode for the odd
|
(for the cpu models where the odd ones are inaccessible). */
|
(for the cpu models where the odd ones are inaccessible). */
|
if (reg_raw_mode[i] == VOIDmode)
|
if (reg_raw_mode[i] == VOIDmode)
|
reg_raw_mode[i] = i == 0 ? word_mode : reg_raw_mode[i-1];
|
reg_raw_mode[i] = i == 0 ? word_mode : reg_raw_mode[i-1];
|
}
|
}
|
}
|
}
|
|
|
/* Finish initializing the register sets and
|
/* Finish initializing the register sets and
|
initialize the register modes. */
|
initialize the register modes. */
|
|
|
void
|
void
|
init_regs (void)
|
init_regs (void)
|
{
|
{
|
/* This finishes what was started by init_reg_sets, but couldn't be done
|
/* This finishes what was started by init_reg_sets, but couldn't be done
|
until after register usage was specified. */
|
until after register usage was specified. */
|
init_reg_sets_1 ();
|
init_reg_sets_1 ();
|
|
|
init_reg_autoinc ();
|
init_reg_autoinc ();
|
}
|
}
|
|
|
/* Initialize some fake stack-frame MEM references for use in
|
/* Initialize some fake stack-frame MEM references for use in
|
memory_move_secondary_cost. */
|
memory_move_secondary_cost. */
|
|
|
void
|
void
|
init_fake_stack_mems (void)
|
init_fake_stack_mems (void)
|
{
|
{
|
{
|
{
|
int i;
|
int i;
|
|
|
for (i = 0; i < MAX_MACHINE_MODE; i++)
|
for (i = 0; i < MAX_MACHINE_MODE; i++)
|
top_of_stack[i] = gen_rtx_MEM (i, stack_pointer_rtx);
|
top_of_stack[i] = gen_rtx_MEM (i, stack_pointer_rtx);
|
}
|
}
|
}
|
}
|
|
|
|
|
/* Compute extra cost of moving registers to/from memory due to reloads.
|
/* Compute extra cost of moving registers to/from memory due to reloads.
|
Only needed if secondary reloads are required for memory moves. */
|
Only needed if secondary reloads are required for memory moves. */
|
|
|
int
|
int
|
memory_move_secondary_cost (enum machine_mode mode, enum reg_class class, int in)
|
memory_move_secondary_cost (enum machine_mode mode, enum reg_class class, int in)
|
{
|
{
|
enum reg_class altclass;
|
enum reg_class altclass;
|
int partial_cost = 0;
|
int partial_cost = 0;
|
/* We need a memory reference to feed to SECONDARY... macros. */
|
/* We need a memory reference to feed to SECONDARY... macros. */
|
/* mem may be unused even if the SECONDARY_ macros are defined. */
|
/* mem may be unused even if the SECONDARY_ macros are defined. */
|
rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
|
rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
|
|
|
|
|
altclass = secondary_reload_class (in ? 1 : 0, class, mode, mem);
|
altclass = secondary_reload_class (in ? 1 : 0, class, mode, mem);
|
|
|
if (altclass == NO_REGS)
|
if (altclass == NO_REGS)
|
return 0;
|
return 0;
|
|
|
if (in)
|
if (in)
|
partial_cost = REGISTER_MOVE_COST (mode, altclass, class);
|
partial_cost = REGISTER_MOVE_COST (mode, altclass, class);
|
else
|
else
|
partial_cost = REGISTER_MOVE_COST (mode, class, altclass);
|
partial_cost = REGISTER_MOVE_COST (mode, class, altclass);
|
|
|
if (class == altclass)
|
if (class == altclass)
|
/* This isn't simply a copy-to-temporary situation. Can't guess
|
/* This isn't simply a copy-to-temporary situation. Can't guess
|
what it is, so MEMORY_MOVE_COST really ought not to be calling
|
what it is, so MEMORY_MOVE_COST really ought not to be calling
|
here in that case.
|
here in that case.
|
|
|
I'm tempted to put in an assert here, but returning this will
|
I'm tempted to put in an assert here, but returning this will
|
probably only give poor estimates, which is what we would've
|
probably only give poor estimates, which is what we would've
|
had before this code anyways. */
|
had before this code anyways. */
|
return partial_cost;
|
return partial_cost;
|
|
|
/* Check if the secondary reload register will also need a
|
/* Check if the secondary reload register will also need a
|
secondary reload. */
|
secondary reload. */
|
return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
|
return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
|
}
|
}
|
|
|
/* Return a machine mode that is legitimate for hard reg REGNO and large
|
/* Return a machine mode that is legitimate for hard reg REGNO and large
|
enough to save nregs. If we can't find one, return VOIDmode.
|
enough to save nregs. If we can't find one, return VOIDmode.
|
If CALL_SAVED is true, only consider modes that are call saved. */
|
If CALL_SAVED is true, only consider modes that are call saved. */
|
|
|
enum machine_mode
|
enum machine_mode
|
choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
|
choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
|
unsigned int nregs, bool call_saved)
|
unsigned int nregs, bool call_saved)
|
{
|
{
|
unsigned int /* enum machine_mode */ m;
|
unsigned int /* enum machine_mode */ m;
|
enum machine_mode found_mode = VOIDmode, mode;
|
enum machine_mode found_mode = VOIDmode, mode;
|
|
|
/* We first look for the largest integer mode that can be validly
|
/* We first look for the largest integer mode that can be validly
|
held in REGNO. If none, we look for the largest floating-point mode.
|
held in REGNO. If none, we look for the largest floating-point mode.
|
If we still didn't find a valid mode, try CCmode. */
|
If we still didn't find a valid mode, try CCmode. */
|
|
|
for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
|
for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
|
mode != VOIDmode;
|
mode != VOIDmode;
|
mode = GET_MODE_WIDER_MODE (mode))
|
mode = GET_MODE_WIDER_MODE (mode))
|
if ((unsigned) hard_regno_nregs[regno][mode] == nregs
|
if ((unsigned) hard_regno_nregs[regno][mode] == nregs
|
&& HARD_REGNO_MODE_OK (regno, mode)
|
&& HARD_REGNO_MODE_OK (regno, mode)
|
&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
|
&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
|
found_mode = mode;
|
found_mode = mode;
|
|
|
if (found_mode != VOIDmode)
|
if (found_mode != VOIDmode)
|
return found_mode;
|
return found_mode;
|
|
|
for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
|
for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
|
mode != VOIDmode;
|
mode != VOIDmode;
|
mode = GET_MODE_WIDER_MODE (mode))
|
mode = GET_MODE_WIDER_MODE (mode))
|
if ((unsigned) hard_regno_nregs[regno][mode] == nregs
|
if ((unsigned) hard_regno_nregs[regno][mode] == nregs
|
&& HARD_REGNO_MODE_OK (regno, mode)
|
&& HARD_REGNO_MODE_OK (regno, mode)
|
&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
|
&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
|
found_mode = mode;
|
found_mode = mode;
|
|
|
if (found_mode != VOIDmode)
|
if (found_mode != VOIDmode)
|
return found_mode;
|
return found_mode;
|
|
|
for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
|
for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
|
mode != VOIDmode;
|
mode != VOIDmode;
|
mode = GET_MODE_WIDER_MODE (mode))
|
mode = GET_MODE_WIDER_MODE (mode))
|
if ((unsigned) hard_regno_nregs[regno][mode] == nregs
|
if ((unsigned) hard_regno_nregs[regno][mode] == nregs
|
&& HARD_REGNO_MODE_OK (regno, mode)
|
&& HARD_REGNO_MODE_OK (regno, mode)
|
&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
|
&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
|
found_mode = mode;
|
found_mode = mode;
|
|
|
if (found_mode != VOIDmode)
|
if (found_mode != VOIDmode)
|
return found_mode;
|
return found_mode;
|
|
|
for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
|
for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
|
mode != VOIDmode;
|
mode != VOIDmode;
|
mode = GET_MODE_WIDER_MODE (mode))
|
mode = GET_MODE_WIDER_MODE (mode))
|
if ((unsigned) hard_regno_nregs[regno][mode] == nregs
|
if ((unsigned) hard_regno_nregs[regno][mode] == nregs
|
&& HARD_REGNO_MODE_OK (regno, mode)
|
&& HARD_REGNO_MODE_OK (regno, mode)
|
&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
|
&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
|
found_mode = mode;
|
found_mode = mode;
|
|
|
if (found_mode != VOIDmode)
|
if (found_mode != VOIDmode)
|
return found_mode;
|
return found_mode;
|
|
|
/* Iterate over all of the CCmodes. */
|
/* Iterate over all of the CCmodes. */
|
for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
|
for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
|
{
|
{
|
mode = (enum machine_mode) m;
|
mode = (enum machine_mode) m;
|
if ((unsigned) hard_regno_nregs[regno][mode] == nregs
|
if ((unsigned) hard_regno_nregs[regno][mode] == nregs
|
&& HARD_REGNO_MODE_OK (regno, mode)
|
&& HARD_REGNO_MODE_OK (regno, mode)
|
&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
|
&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
|
return mode;
|
return mode;
|
}
|
}
|
|
|
/* We can't find a mode valid for this register. */
|
/* We can't find a mode valid for this register. */
|
return VOIDmode;
|
return VOIDmode;
|
}
|
}
|
|
|
/* Specify the usage characteristics of the register named NAME.
|
/* Specify the usage characteristics of the register named NAME.
|
It should be a fixed register if FIXED and a
|
It should be a fixed register if FIXED and a
|
call-used register if CALL_USED. */
|
call-used register if CALL_USED. */
|
|
|
void
|
void
|
fix_register (const char *name, int fixed, int call_used)
|
fix_register (const char *name, int fixed, int call_used)
|
{
|
{
|
int i;
|
int i;
|
|
|
/* Decode the name and update the primary form of
|
/* Decode the name and update the primary form of
|
the register info. */
|
the register info. */
|
|
|
if ((i = decode_reg_name (name)) >= 0)
|
if ((i = decode_reg_name (name)) >= 0)
|
{
|
{
|
if ((i == STACK_POINTER_REGNUM
|
if ((i == STACK_POINTER_REGNUM
|
#ifdef HARD_FRAME_POINTER_REGNUM
|
#ifdef HARD_FRAME_POINTER_REGNUM
|
|| i == HARD_FRAME_POINTER_REGNUM
|
|| i == HARD_FRAME_POINTER_REGNUM
|
#else
|
#else
|
|| i == FRAME_POINTER_REGNUM
|
|| i == FRAME_POINTER_REGNUM
|
#endif
|
#endif
|
)
|
)
|
&& (fixed == 0 || call_used == 0))
|
&& (fixed == 0 || call_used == 0))
|
{
|
{
|
static const char * const what_option[2][2] = {
|
static const char * const what_option[2][2] = {
|
{ "call-saved", "call-used" },
|
{ "call-saved", "call-used" },
|
{ "no-such-option", "fixed" }};
|
{ "no-such-option", "fixed" }};
|
|
|
error ("can't use '%s' as a %s register", name,
|
error ("can't use '%s' as a %s register", name,
|
what_option[fixed][call_used]);
|
what_option[fixed][call_used]);
|
}
|
}
|
else
|
else
|
{
|
{
|
fixed_regs[i] = fixed;
|
fixed_regs[i] = fixed;
|
call_used_regs[i] = call_used;
|
call_used_regs[i] = call_used;
|
#ifdef CALL_REALLY_USED_REGISTERS
|
#ifdef CALL_REALLY_USED_REGISTERS
|
if (fixed == 0)
|
if (fixed == 0)
|
call_really_used_regs[i] = call_used;
|
call_really_used_regs[i] = call_used;
|
#endif
|
#endif
|
}
|
}
|
}
|
}
|
else
|
else
|
{
|
{
|
warning (0, "unknown register name: %s", name);
|
warning (0, "unknown register name: %s", name);
|
}
|
}
|
}
|
}
|
|
|
/* Mark register number I as global. */
|
/* Mark register number I as global. */
|
|
|
void
|
void
|
globalize_reg (int i)
|
globalize_reg (int i)
|
{
|
{
|
if (fixed_regs[i] == 0 && no_global_reg_vars)
|
if (fixed_regs[i] == 0 && no_global_reg_vars)
|
error ("global register variable follows a function definition");
|
error ("global register variable follows a function definition");
|
|
|
if (global_regs[i])
|
if (global_regs[i])
|
{
|
{
|
warning (0, "register used for two global register variables");
|
warning (0, "register used for two global register variables");
|
return;
|
return;
|
}
|
}
|
|
|
if (call_used_regs[i] && ! fixed_regs[i])
|
if (call_used_regs[i] && ! fixed_regs[i])
|
warning (0, "call-clobbered register used for global register variable");
|
warning (0, "call-clobbered register used for global register variable");
|
|
|
global_regs[i] = 1;
|
global_regs[i] = 1;
|
|
|
/* If we're globalizing the frame pointer, we need to set the
|
/* If we're globalizing the frame pointer, we need to set the
|
appropriate regs_invalidated_by_call bit, even if it's already
|
appropriate regs_invalidated_by_call bit, even if it's already
|
set in fixed_regs. */
|
set in fixed_regs. */
|
if (i != STACK_POINTER_REGNUM)
|
if (i != STACK_POINTER_REGNUM)
|
SET_HARD_REG_BIT (regs_invalidated_by_call, i);
|
SET_HARD_REG_BIT (regs_invalidated_by_call, i);
|
|
|
/* If already fixed, nothing else to do. */
|
/* If already fixed, nothing else to do. */
|
if (fixed_regs[i])
|
if (fixed_regs[i])
|
return;
|
return;
|
|
|
fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1;
|
fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1;
|
#ifdef CALL_REALLY_USED_REGISTERS
|
#ifdef CALL_REALLY_USED_REGISTERS
|
call_really_used_regs[i] = 1;
|
call_really_used_regs[i] = 1;
|
#endif
|
#endif
|
|
|
SET_HARD_REG_BIT (fixed_reg_set, i);
|
SET_HARD_REG_BIT (fixed_reg_set, i);
|
SET_HARD_REG_BIT (call_used_reg_set, i);
|
SET_HARD_REG_BIT (call_used_reg_set, i);
|
SET_HARD_REG_BIT (call_fixed_reg_set, i);
|
SET_HARD_REG_BIT (call_fixed_reg_set, i);
|
}
|
}
|
|
|
/* Now the data and code for the `regclass' pass, which happens
|
/* Now the data and code for the `regclass' pass, which happens
|
just before local-alloc. */
|
just before local-alloc. */
|
|
|
/* The `costs' struct records the cost of using a hard register of each class
|
/* The `costs' struct records the cost of using a hard register of each class
|
and of using memory for each pseudo. We use this data to set up
|
and of using memory for each pseudo. We use this data to set up
|
register class preferences. */
|
register class preferences. */
|
|
|
struct costs
|
struct costs
|
{
|
{
|
int cost[N_REG_CLASSES];
|
int cost[N_REG_CLASSES];
|
int mem_cost;
|
int mem_cost;
|
};
|
};
|
|
|
/* Structure used to record preferences of given pseudo. */
|
/* Structure used to record preferences of given pseudo. */
|
struct reg_pref
|
struct reg_pref
|
{
|
{
|
/* (enum reg_class) prefclass is the preferred class. May be
|
/* (enum reg_class) prefclass is the preferred class. May be
|
NO_REGS if no class is better than memory. */
|
NO_REGS if no class is better than memory. */
|
char prefclass;
|
char prefclass;
|
|
|
/* altclass is a register class that we should use for allocating
|
/* altclass is a register class that we should use for allocating
|
pseudo if no register in the preferred class is available.
|
pseudo if no register in the preferred class is available.
|
If no register in this class is available, memory is preferred.
|
If no register in this class is available, memory is preferred.
|
|
|
It might appear to be more general to have a bitmask of classes here,
|
It might appear to be more general to have a bitmask of classes here,
|
but since it is recommended that there be a class corresponding to the
|
but since it is recommended that there be a class corresponding to the
|
union of most major pair of classes, that generality is not required. */
|
union of most major pair of classes, that generality is not required. */
|
char altclass;
|
char altclass;
|
};
|
};
|
|
|
/* Record the cost of each class for each pseudo. */
|
/* Record the cost of each class for each pseudo. */
|
|
|
static struct costs *costs;
|
static struct costs *costs;
|
|
|
/* Initialized once, and used to initialize cost values for each insn. */
|
/* Initialized once, and used to initialize cost values for each insn. */
|
|
|
static struct costs init_cost;
|
static struct costs init_cost;
|
|
|
/* Record preferences of each pseudo.
|
/* Record preferences of each pseudo.
|
This is available after `regclass' is run. */
|
This is available after `regclass' is run. */
|
|
|
static struct reg_pref *reg_pref;
|
static struct reg_pref *reg_pref;
|
|
|
/* Allocated buffers for reg_pref. */
|
/* Allocated buffers for reg_pref. */
|
|
|
static struct reg_pref *reg_pref_buffer;
|
static struct reg_pref *reg_pref_buffer;
|
|
|
/* Frequency of executions of current insn. */
|
/* Frequency of executions of current insn. */
|
|
|
static int frequency;
|
static int frequency;
|
|
|
static rtx scan_one_insn (rtx, int);
|
static rtx scan_one_insn (rtx, int);
|
static void record_operand_costs (rtx, struct costs *, struct reg_pref *);
|
static void record_operand_costs (rtx, struct costs *, struct reg_pref *);
|
static void dump_regclass (FILE *);
|
static void dump_regclass (FILE *);
|
static void record_reg_classes (int, int, rtx *, enum machine_mode *,
|
static void record_reg_classes (int, int, rtx *, enum machine_mode *,
|
const char **, rtx, struct costs *,
|
const char **, rtx, struct costs *,
|
struct reg_pref *);
|
struct reg_pref *);
|
static int copy_cost (rtx, enum machine_mode, enum reg_class, int,
|
static int copy_cost (rtx, enum machine_mode, enum reg_class, int,
|
secondary_reload_info *);
|
secondary_reload_info *);
|
static void record_address_regs (enum machine_mode, rtx, int, enum rtx_code,
|
static void record_address_regs (enum machine_mode, rtx, int, enum rtx_code,
|
enum rtx_code, int);
|
enum rtx_code, int);
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
static int auto_inc_dec_reg_p (rtx, enum machine_mode);
|
static int auto_inc_dec_reg_p (rtx, enum machine_mode);
|
#endif
|
#endif
|
static void reg_scan_mark_refs (rtx, rtx, int);
|
static void reg_scan_mark_refs (rtx, rtx, int);
|
|
|
/* Wrapper around REGNO_OK_FOR_INDEX_P, to allow pseudo registers. */
|
/* Wrapper around REGNO_OK_FOR_INDEX_P, to allow pseudo registers. */
|
|
|
static inline bool
|
static inline bool
|
ok_for_index_p_nonstrict (rtx reg)
|
ok_for_index_p_nonstrict (rtx reg)
|
{
|
{
|
unsigned regno = REGNO (reg);
|
unsigned regno = REGNO (reg);
|
return regno >= FIRST_PSEUDO_REGISTER || REGNO_OK_FOR_INDEX_P (regno);
|
return regno >= FIRST_PSEUDO_REGISTER || REGNO_OK_FOR_INDEX_P (regno);
|
}
|
}
|
|
|
/* A version of regno_ok_for_base_p for use during regclass, when all pseudos
|
/* A version of regno_ok_for_base_p for use during regclass, when all pseudos
|
should count as OK. Arguments as for regno_ok_for_base_p. */
|
should count as OK. Arguments as for regno_ok_for_base_p. */
|
|
|
static inline bool
|
static inline bool
|
ok_for_base_p_nonstrict (rtx reg, enum machine_mode mode,
|
ok_for_base_p_nonstrict (rtx reg, enum machine_mode mode,
|
enum rtx_code outer_code, enum rtx_code index_code)
|
enum rtx_code outer_code, enum rtx_code index_code)
|
{
|
{
|
unsigned regno = REGNO (reg);
|
unsigned regno = REGNO (reg);
|
if (regno >= FIRST_PSEUDO_REGISTER)
|
if (regno >= FIRST_PSEUDO_REGISTER)
|
return true;
|
return true;
|
|
|
return ok_for_base_p_1 (regno, mode, outer_code, index_code);
|
return ok_for_base_p_1 (regno, mode, outer_code, index_code);
|
}
|
}
|
|
|
/* Return the reg_class in which pseudo reg number REGNO is best allocated.
|
/* Return the reg_class in which pseudo reg number REGNO is best allocated.
|
This function is sometimes called before the info has been computed.
|
This function is sometimes called before the info has been computed.
|
When that happens, just return GENERAL_REGS, which is innocuous. */
|
When that happens, just return GENERAL_REGS, which is innocuous. */
|
|
|
enum reg_class
|
enum reg_class
|
reg_preferred_class (int regno)
|
reg_preferred_class (int regno)
|
{
|
{
|
if (reg_pref == 0)
|
if (reg_pref == 0)
|
return GENERAL_REGS;
|
return GENERAL_REGS;
|
return (enum reg_class) reg_pref[regno].prefclass;
|
return (enum reg_class) reg_pref[regno].prefclass;
|
}
|
}
|
|
|
enum reg_class
|
enum reg_class
|
reg_alternate_class (int regno)
|
reg_alternate_class (int regno)
|
{
|
{
|
if (reg_pref == 0)
|
if (reg_pref == 0)
|
return ALL_REGS;
|
return ALL_REGS;
|
|
|
return (enum reg_class) reg_pref[regno].altclass;
|
return (enum reg_class) reg_pref[regno].altclass;
|
}
|
}
|
|
|
/* Initialize some global data for this pass. */
|
/* Initialize some global data for this pass. */
|
|
|
void
|
void
|
regclass_init (void)
|
regclass_init (void)
|
{
|
{
|
int i;
|
int i;
|
|
|
init_cost.mem_cost = 10000;
|
init_cost.mem_cost = 10000;
|
for (i = 0; i < N_REG_CLASSES; i++)
|
for (i = 0; i < N_REG_CLASSES; i++)
|
init_cost.cost[i] = 10000;
|
init_cost.cost[i] = 10000;
|
|
|
/* This prevents dump_flow_info from losing if called
|
/* This prevents dump_flow_info from losing if called
|
before regclass is run. */
|
before regclass is run. */
|
reg_pref = NULL;
|
reg_pref = NULL;
|
|
|
/* No more global register variables may be declared. */
|
/* No more global register variables may be declared. */
|
no_global_reg_vars = 1;
|
no_global_reg_vars = 1;
|
}
|
}
|
|
|
/* Dump register costs. */
|
/* Dump register costs. */
|
static void
|
static void
|
dump_regclass (FILE *dump)
|
dump_regclass (FILE *dump)
|
{
|
{
|
int i;
|
int i;
|
for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
|
for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
|
{
|
{
|
int /* enum reg_class */ class;
|
int /* enum reg_class */ class;
|
if (REG_N_REFS (i))
|
if (REG_N_REFS (i))
|
{
|
{
|
fprintf (dump, " Register %i costs:", i);
|
fprintf (dump, " Register %i costs:", i);
|
for (class = 0; class < (int) N_REG_CLASSES; class++)
|
for (class = 0; class < (int) N_REG_CLASSES; class++)
|
if (contains_reg_of_mode [(enum reg_class) class][PSEUDO_REGNO_MODE (i)]
|
if (contains_reg_of_mode [(enum reg_class) class][PSEUDO_REGNO_MODE (i)]
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
&& (!in_inc_dec[i]
|
&& (!in_inc_dec[i]
|
|| !forbidden_inc_dec_class[(enum reg_class) class])
|
|| !forbidden_inc_dec_class[(enum reg_class) class])
|
#endif
|
#endif
|
#ifdef CANNOT_CHANGE_MODE_CLASS
|
#ifdef CANNOT_CHANGE_MODE_CLASS
|
&& ! invalid_mode_change_p (i, (enum reg_class) class,
|
&& ! invalid_mode_change_p (i, (enum reg_class) class,
|
PSEUDO_REGNO_MODE (i))
|
PSEUDO_REGNO_MODE (i))
|
#endif
|
#endif
|
)
|
)
|
fprintf (dump, " %s:%i", reg_class_names[class],
|
fprintf (dump, " %s:%i", reg_class_names[class],
|
costs[i].cost[(enum reg_class) class]);
|
costs[i].cost[(enum reg_class) class]);
|
fprintf (dump, " MEM:%i\n", costs[i].mem_cost);
|
fprintf (dump, " MEM:%i\n", costs[i].mem_cost);
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
|
|
/* Calculate the costs of insn operands. */
|
/* Calculate the costs of insn operands. */
|
|
|
static void
|
static void
|
record_operand_costs (rtx insn, struct costs *op_costs,
|
record_operand_costs (rtx insn, struct costs *op_costs,
|
struct reg_pref *reg_pref)
|
struct reg_pref *reg_pref)
|
{
|
{
|
const char *constraints[MAX_RECOG_OPERANDS];
|
const char *constraints[MAX_RECOG_OPERANDS];
|
enum machine_mode modes[MAX_RECOG_OPERANDS];
|
enum machine_mode modes[MAX_RECOG_OPERANDS];
|
int i;
|
int i;
|
|
|
for (i = 0; i < recog_data.n_operands; i++)
|
for (i = 0; i < recog_data.n_operands; i++)
|
{
|
{
|
constraints[i] = recog_data.constraints[i];
|
constraints[i] = recog_data.constraints[i];
|
modes[i] = recog_data.operand_mode[i];
|
modes[i] = recog_data.operand_mode[i];
|
}
|
}
|
|
|
/* If we get here, we are set up to record the costs of all the
|
/* If we get here, we are set up to record the costs of all the
|
operands for this insn. Start by initializing the costs.
|
operands for this insn. Start by initializing the costs.
|
Then handle any address registers. Finally record the desired
|
Then handle any address registers. Finally record the desired
|
classes for any pseudos, doing it twice if some pair of
|
classes for any pseudos, doing it twice if some pair of
|
operands are commutative. */
|
operands are commutative. */
|
|
|
for (i = 0; i < recog_data.n_operands; i++)
|
for (i = 0; i < recog_data.n_operands; i++)
|
{
|
{
|
op_costs[i] = init_cost;
|
op_costs[i] = init_cost;
|
|
|
if (GET_CODE (recog_data.operand[i]) == SUBREG)
|
if (GET_CODE (recog_data.operand[i]) == SUBREG)
|
recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
|
recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
|
|
|
if (MEM_P (recog_data.operand[i]))
|
if (MEM_P (recog_data.operand[i]))
|
record_address_regs (GET_MODE (recog_data.operand[i]),
|
record_address_regs (GET_MODE (recog_data.operand[i]),
|
XEXP (recog_data.operand[i], 0),
|
XEXP (recog_data.operand[i], 0),
|
0, MEM, SCRATCH, frequency * 2);
|
0, MEM, SCRATCH, frequency * 2);
|
else if (constraints[i][0] == 'p'
|
else if (constraints[i][0] == 'p'
|
|| EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
|
|| EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
|
record_address_regs (VOIDmode, recog_data.operand[i], 0, ADDRESS,
|
record_address_regs (VOIDmode, recog_data.operand[i], 0, ADDRESS,
|
SCRATCH, frequency * 2);
|
SCRATCH, frequency * 2);
|
}
|
}
|
|
|
/* Check for commutative in a separate loop so everything will
|
/* Check for commutative in a separate loop so everything will
|
have been initialized. We must do this even if one operand
|
have been initialized. We must do this even if one operand
|
is a constant--see addsi3 in m68k.md. */
|
is a constant--see addsi3 in m68k.md. */
|
|
|
for (i = 0; i < (int) recog_data.n_operands - 1; i++)
|
for (i = 0; i < (int) recog_data.n_operands - 1; i++)
|
if (constraints[i][0] == '%')
|
if (constraints[i][0] == '%')
|
{
|
{
|
const char *xconstraints[MAX_RECOG_OPERANDS];
|
const char *xconstraints[MAX_RECOG_OPERANDS];
|
int j;
|
int j;
|
|
|
/* Handle commutative operands by swapping the constraints.
|
/* Handle commutative operands by swapping the constraints.
|
We assume the modes are the same. */
|
We assume the modes are the same. */
|
|
|
for (j = 0; j < recog_data.n_operands; j++)
|
for (j = 0; j < recog_data.n_operands; j++)
|
xconstraints[j] = constraints[j];
|
xconstraints[j] = constraints[j];
|
|
|
xconstraints[i] = constraints[i+1];
|
xconstraints[i] = constraints[i+1];
|
xconstraints[i+1] = constraints[i];
|
xconstraints[i+1] = constraints[i];
|
record_reg_classes (recog_data.n_alternatives, recog_data.n_operands,
|
record_reg_classes (recog_data.n_alternatives, recog_data.n_operands,
|
recog_data.operand, modes,
|
recog_data.operand, modes,
|
xconstraints, insn, op_costs, reg_pref);
|
xconstraints, insn, op_costs, reg_pref);
|
}
|
}
|
|
|
record_reg_classes (recog_data.n_alternatives, recog_data.n_operands,
|
record_reg_classes (recog_data.n_alternatives, recog_data.n_operands,
|
recog_data.operand, modes,
|
recog_data.operand, modes,
|
constraints, insn, op_costs, reg_pref);
|
constraints, insn, op_costs, reg_pref);
|
}
|
}
|
|
|
/* Subroutine of regclass, processes one insn INSN. Scan it and record each
|
/* Subroutine of regclass, processes one insn INSN. Scan it and record each
|
time it would save code to put a certain register in a certain class.
|
time it would save code to put a certain register in a certain class.
|
PASS, when nonzero, inhibits some optimizations which need only be done
|
PASS, when nonzero, inhibits some optimizations which need only be done
|
once.
|
once.
|
Return the last insn processed, so that the scan can be continued from
|
Return the last insn processed, so that the scan can be continued from
|
there. */
|
there. */
|
|
|
static rtx
|
static rtx
|
scan_one_insn (rtx insn, int pass)
|
scan_one_insn (rtx insn, int pass)
|
{
|
{
|
enum rtx_code pat_code;
|
enum rtx_code pat_code;
|
rtx set, note;
|
rtx set, note;
|
int i, j;
|
int i, j;
|
struct costs op_costs[MAX_RECOG_OPERANDS];
|
struct costs op_costs[MAX_RECOG_OPERANDS];
|
|
|
if (!INSN_P (insn))
|
if (!INSN_P (insn))
|
return insn;
|
return insn;
|
|
|
pat_code = GET_CODE (PATTERN (insn));
|
pat_code = GET_CODE (PATTERN (insn));
|
if (pat_code == USE
|
if (pat_code == USE
|
|| pat_code == CLOBBER
|
|| pat_code == CLOBBER
|
|| pat_code == ASM_INPUT
|
|| pat_code == ASM_INPUT
|
|| pat_code == ADDR_VEC
|
|| pat_code == ADDR_VEC
|
|| pat_code == ADDR_DIFF_VEC)
|
|| pat_code == ADDR_DIFF_VEC)
|
return insn;
|
return insn;
|
|
|
set = single_set (insn);
|
set = single_set (insn);
|
extract_insn (insn);
|
extract_insn (insn);
|
|
|
/* If this insn loads a parameter from its stack slot, then
|
/* If this insn loads a parameter from its stack slot, then
|
it represents a savings, rather than a cost, if the
|
it represents a savings, rather than a cost, if the
|
parameter is stored in memory. Record this fact. */
|
parameter is stored in memory. Record this fact. */
|
|
|
if (set != 0 && REG_P (SET_DEST (set))
|
if (set != 0 && REG_P (SET_DEST (set))
|
&& MEM_P (SET_SRC (set))
|
&& MEM_P (SET_SRC (set))
|
&& (note = find_reg_note (insn, REG_EQUIV,
|
&& (note = find_reg_note (insn, REG_EQUIV,
|
NULL_RTX)) != 0
|
NULL_RTX)) != 0
|
&& MEM_P (XEXP (note, 0)))
|
&& MEM_P (XEXP (note, 0)))
|
{
|
{
|
costs[REGNO (SET_DEST (set))].mem_cost
|
costs[REGNO (SET_DEST (set))].mem_cost
|
-= (MEMORY_MOVE_COST (GET_MODE (SET_DEST (set)),
|
-= (MEMORY_MOVE_COST (GET_MODE (SET_DEST (set)),
|
GENERAL_REGS, 1)
|
GENERAL_REGS, 1)
|
* frequency);
|
* frequency);
|
record_address_regs (GET_MODE (SET_SRC (set)), XEXP (SET_SRC (set), 0),
|
record_address_regs (GET_MODE (SET_SRC (set)), XEXP (SET_SRC (set), 0),
|
0, MEM, SCRATCH, frequency * 2);
|
0, MEM, SCRATCH, frequency * 2);
|
return insn;
|
return insn;
|
}
|
}
|
|
|
/* Improve handling of two-address insns such as
|
/* Improve handling of two-address insns such as
|
(set X (ashift CONST Y)) where CONST must be made to
|
(set X (ashift CONST Y)) where CONST must be made to
|
match X. Change it into two insns: (set X CONST)
|
match X. Change it into two insns: (set X CONST)
|
(set X (ashift X Y)). If we left this for reloading, it
|
(set X (ashift X Y)). If we left this for reloading, it
|
would probably get three insns because X and Y might go
|
would probably get three insns because X and Y might go
|
in the same place. This prevents X and Y from receiving
|
in the same place. This prevents X and Y from receiving
|
the same hard reg.
|
the same hard reg.
|
|
|
We can only do this if the modes of operands 0 and 1
|
We can only do this if the modes of operands 0 and 1
|
(which might not be the same) are tieable and we only need
|
(which might not be the same) are tieable and we only need
|
do this during our first pass. */
|
do this during our first pass. */
|
|
|
if (pass == 0 && optimize
|
if (pass == 0 && optimize
|
&& recog_data.n_operands >= 3
|
&& recog_data.n_operands >= 3
|
&& recog_data.constraints[1][0] == '0'
|
&& recog_data.constraints[1][0] == '0'
|
&& recog_data.constraints[1][1] == 0
|
&& recog_data.constraints[1][1] == 0
|
&& CONSTANT_P (recog_data.operand[1])
|
&& CONSTANT_P (recog_data.operand[1])
|
&& ! rtx_equal_p (recog_data.operand[0], recog_data.operand[1])
|
&& ! rtx_equal_p (recog_data.operand[0], recog_data.operand[1])
|
&& ! rtx_equal_p (recog_data.operand[0], recog_data.operand[2])
|
&& ! rtx_equal_p (recog_data.operand[0], recog_data.operand[2])
|
&& REG_P (recog_data.operand[0])
|
&& REG_P (recog_data.operand[0])
|
&& MODES_TIEABLE_P (GET_MODE (recog_data.operand[0]),
|
&& MODES_TIEABLE_P (GET_MODE (recog_data.operand[0]),
|
recog_data.operand_mode[1]))
|
recog_data.operand_mode[1]))
|
{
|
{
|
rtx previnsn = prev_real_insn (insn);
|
rtx previnsn = prev_real_insn (insn);
|
rtx dest
|
rtx dest
|
= gen_lowpart (recog_data.operand_mode[1],
|
= gen_lowpart (recog_data.operand_mode[1],
|
recog_data.operand[0]);
|
recog_data.operand[0]);
|
rtx newinsn
|
rtx newinsn
|
= emit_insn_before (gen_move_insn (dest, recog_data.operand[1]), insn);
|
= emit_insn_before (gen_move_insn (dest, recog_data.operand[1]), insn);
|
|
|
/* If this insn was the start of a basic block,
|
/* If this insn was the start of a basic block,
|
include the new insn in that block.
|
include the new insn in that block.
|
We need not check for code_label here;
|
We need not check for code_label here;
|
while a basic block can start with a code_label,
|
while a basic block can start with a code_label,
|
INSN could not be at the beginning of that block. */
|
INSN could not be at the beginning of that block. */
|
if (previnsn == 0 || JUMP_P (previnsn))
|
if (previnsn == 0 || JUMP_P (previnsn))
|
{
|
{
|
basic_block b;
|
basic_block b;
|
FOR_EACH_BB (b)
|
FOR_EACH_BB (b)
|
if (insn == BB_HEAD (b))
|
if (insn == BB_HEAD (b))
|
BB_HEAD (b) = newinsn;
|
BB_HEAD (b) = newinsn;
|
}
|
}
|
|
|
/* This makes one more setting of new insns's dest. */
|
/* This makes one more setting of new insns's dest. */
|
REG_N_SETS (REGNO (recog_data.operand[0]))++;
|
REG_N_SETS (REGNO (recog_data.operand[0]))++;
|
REG_N_REFS (REGNO (recog_data.operand[0]))++;
|
REG_N_REFS (REGNO (recog_data.operand[0]))++;
|
REG_FREQ (REGNO (recog_data.operand[0])) += frequency;
|
REG_FREQ (REGNO (recog_data.operand[0])) += frequency;
|
|
|
*recog_data.operand_loc[1] = recog_data.operand[0];
|
*recog_data.operand_loc[1] = recog_data.operand[0];
|
REG_N_REFS (REGNO (recog_data.operand[0]))++;
|
REG_N_REFS (REGNO (recog_data.operand[0]))++;
|
REG_FREQ (REGNO (recog_data.operand[0])) += frequency;
|
REG_FREQ (REGNO (recog_data.operand[0])) += frequency;
|
for (i = recog_data.n_dups - 1; i >= 0; i--)
|
for (i = recog_data.n_dups - 1; i >= 0; i--)
|
if (recog_data.dup_num[i] == 1)
|
if (recog_data.dup_num[i] == 1)
|
{
|
{
|
*recog_data.dup_loc[i] = recog_data.operand[0];
|
*recog_data.dup_loc[i] = recog_data.operand[0];
|
REG_N_REFS (REGNO (recog_data.operand[0]))++;
|
REG_N_REFS (REGNO (recog_data.operand[0]))++;
|
REG_FREQ (REGNO (recog_data.operand[0])) += frequency;
|
REG_FREQ (REGNO (recog_data.operand[0])) += frequency;
|
}
|
}
|
|
|
return PREV_INSN (newinsn);
|
return PREV_INSN (newinsn);
|
}
|
}
|
|
|
record_operand_costs (insn, op_costs, reg_pref);
|
record_operand_costs (insn, op_costs, reg_pref);
|
|
|
/* Now add the cost for each operand to the total costs for
|
/* Now add the cost for each operand to the total costs for
|
its register. */
|
its register. */
|
|
|
for (i = 0; i < recog_data.n_operands; i++)
|
for (i = 0; i < recog_data.n_operands; i++)
|
if (REG_P (recog_data.operand[i])
|
if (REG_P (recog_data.operand[i])
|
&& REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER)
|
&& REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER)
|
{
|
{
|
int regno = REGNO (recog_data.operand[i]);
|
int regno = REGNO (recog_data.operand[i]);
|
struct costs *p = &costs[regno], *q = &op_costs[i];
|
struct costs *p = &costs[regno], *q = &op_costs[i];
|
|
|
p->mem_cost += q->mem_cost * frequency;
|
p->mem_cost += q->mem_cost * frequency;
|
for (j = 0; j < N_REG_CLASSES; j++)
|
for (j = 0; j < N_REG_CLASSES; j++)
|
p->cost[j] += q->cost[j] * frequency;
|
p->cost[j] += q->cost[j] * frequency;
|
}
|
}
|
|
|
return insn;
|
return insn;
|
}
|
}
|
|
|
/* Initialize information about which register classes can be used for
|
/* Initialize information about which register classes can be used for
|
pseudos that are auto-incremented or auto-decremented. */
|
pseudos that are auto-incremented or auto-decremented. */
|
|
|
static void
|
static void
|
init_reg_autoinc (void)
|
init_reg_autoinc (void)
|
{
|
{
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
int i;
|
int i;
|
|
|
for (i = 0; i < N_REG_CLASSES; i++)
|
for (i = 0; i < N_REG_CLASSES; i++)
|
{
|
{
|
rtx r = gen_rtx_raw_REG (VOIDmode, 0);
|
rtx r = gen_rtx_raw_REG (VOIDmode, 0);
|
enum machine_mode m;
|
enum machine_mode m;
|
int j;
|
int j;
|
|
|
for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
|
for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
|
if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
|
if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
|
{
|
{
|
REGNO (r) = j;
|
REGNO (r) = j;
|
|
|
for (m = VOIDmode; (int) m < (int) MAX_MACHINE_MODE;
|
for (m = VOIDmode; (int) m < (int) MAX_MACHINE_MODE;
|
m = (enum machine_mode) ((int) m + 1))
|
m = (enum machine_mode) ((int) m + 1))
|
if (HARD_REGNO_MODE_OK (j, m))
|
if (HARD_REGNO_MODE_OK (j, m))
|
{
|
{
|
/* ??? There are two assumptions here; that the base class does not
|
/* ??? There are two assumptions here; that the base class does not
|
depend on the exact outer code (POST_INC vs. PRE_INC etc.), and
|
depend on the exact outer code (POST_INC vs. PRE_INC etc.), and
|
that it does not depend on the machine mode of the memory
|
that it does not depend on the machine mode of the memory
|
reference. */
|
reference. */
|
enum reg_class base_class
|
enum reg_class base_class
|
= base_reg_class (VOIDmode, POST_INC, SCRATCH);
|
= base_reg_class (VOIDmode, POST_INC, SCRATCH);
|
|
|
PUT_MODE (r, m);
|
PUT_MODE (r, m);
|
|
|
/* If a register is not directly suitable for an
|
/* If a register is not directly suitable for an
|
auto-increment or decrement addressing mode and
|
auto-increment or decrement addressing mode and
|
requires secondary reloads, disallow its class from
|
requires secondary reloads, disallow its class from
|
being used in such addresses. */
|
being used in such addresses. */
|
|
|
if ((secondary_reload_class (1, base_class, m, r)
|
if ((secondary_reload_class (1, base_class, m, r)
|
|| secondary_reload_class (1, base_class, m, r))
|
|| secondary_reload_class (1, base_class, m, r))
|
&& ! auto_inc_dec_reg_p (r, m))
|
&& ! auto_inc_dec_reg_p (r, m))
|
forbidden_inc_dec_class[i] = 1;
|
forbidden_inc_dec_class[i] = 1;
|
}
|
}
|
}
|
}
|
}
|
}
|
#endif /* FORBIDDEN_INC_DEC_CLASSES */
|
#endif /* FORBIDDEN_INC_DEC_CLASSES */
|
}
|
}
|
|
|
/* This is a pass of the compiler that scans all instructions
|
/* This is a pass of the compiler that scans all instructions
|
and calculates the preferred class for each pseudo-register.
|
and calculates the preferred class for each pseudo-register.
|
This information can be accessed later by calling `reg_preferred_class'.
|
This information can be accessed later by calling `reg_preferred_class'.
|
This pass comes just before local register allocation. */
|
This pass comes just before local register allocation. */
|
|
|
void
|
void
|
regclass (rtx f, int nregs)
|
regclass (rtx f, int nregs)
|
{
|
{
|
rtx insn;
|
rtx insn;
|
int i;
|
int i;
|
int pass;
|
int pass;
|
|
|
init_recog ();
|
init_recog ();
|
|
|
costs = XNEWVEC (struct costs, nregs);
|
costs = XNEWVEC (struct costs, nregs);
|
|
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
|
|
in_inc_dec = XNEWVEC (char, nregs);
|
in_inc_dec = XNEWVEC (char, nregs);
|
|
|
#endif /* FORBIDDEN_INC_DEC_CLASSES */
|
#endif /* FORBIDDEN_INC_DEC_CLASSES */
|
|
|
/* Normally we scan the insns once and determine the best class to use for
|
/* Normally we scan the insns once and determine the best class to use for
|
each register. However, if -fexpensive_optimizations are on, we do so
|
each register. However, if -fexpensive_optimizations are on, we do so
|
twice, the second time using the tentative best classes to guide the
|
twice, the second time using the tentative best classes to guide the
|
selection. */
|
selection. */
|
|
|
for (pass = 0; pass <= flag_expensive_optimizations; pass++)
|
for (pass = 0; pass <= flag_expensive_optimizations; pass++)
|
{
|
{
|
basic_block bb;
|
basic_block bb;
|
|
|
if (dump_file)
|
if (dump_file)
|
fprintf (dump_file, "\n\nPass %i\n\n",pass);
|
fprintf (dump_file, "\n\nPass %i\n\n",pass);
|
/* Zero out our accumulation of the cost of each class for each reg. */
|
/* Zero out our accumulation of the cost of each class for each reg. */
|
|
|
memset (costs, 0, nregs * sizeof (struct costs));
|
memset (costs, 0, nregs * sizeof (struct costs));
|
|
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
memset (in_inc_dec, 0, nregs);
|
memset (in_inc_dec, 0, nregs);
|
#endif
|
#endif
|
|
|
/* Scan the instructions and record each time it would
|
/* Scan the instructions and record each time it would
|
save code to put a certain register in a certain class. */
|
save code to put a certain register in a certain class. */
|
|
|
if (!optimize)
|
if (!optimize)
|
{
|
{
|
frequency = REG_FREQ_MAX;
|
frequency = REG_FREQ_MAX;
|
for (insn = f; insn; insn = NEXT_INSN (insn))
|
for (insn = f; insn; insn = NEXT_INSN (insn))
|
insn = scan_one_insn (insn, pass);
|
insn = scan_one_insn (insn, pass);
|
}
|
}
|
else
|
else
|
FOR_EACH_BB (bb)
|
FOR_EACH_BB (bb)
|
{
|
{
|
/* Show that an insn inside a loop is likely to be executed three
|
/* Show that an insn inside a loop is likely to be executed three
|
times more than insns outside a loop. This is much more
|
times more than insns outside a loop. This is much more
|
aggressive than the assumptions made elsewhere and is being
|
aggressive than the assumptions made elsewhere and is being
|
tried as an experiment. */
|
tried as an experiment. */
|
frequency = REG_FREQ_FROM_BB (bb);
|
frequency = REG_FREQ_FROM_BB (bb);
|
for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn))
|
for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn))
|
{
|
{
|
insn = scan_one_insn (insn, pass);
|
insn = scan_one_insn (insn, pass);
|
if (insn == BB_END (bb))
|
if (insn == BB_END (bb))
|
break;
|
break;
|
}
|
}
|
}
|
}
|
|
|
/* Now for each register look at how desirable each class is
|
/* Now for each register look at how desirable each class is
|
and find which class is preferred. Store that in
|
and find which class is preferred. Store that in
|
`prefclass'. Record in `altclass' the largest register
|
`prefclass'. Record in `altclass' the largest register
|
class any of whose registers is better than memory. */
|
class any of whose registers is better than memory. */
|
|
|
if (pass == 0)
|
if (pass == 0)
|
reg_pref = reg_pref_buffer;
|
reg_pref = reg_pref_buffer;
|
|
|
if (dump_file)
|
if (dump_file)
|
{
|
{
|
dump_regclass (dump_file);
|
dump_regclass (dump_file);
|
fprintf (dump_file,"\n");
|
fprintf (dump_file,"\n");
|
}
|
}
|
for (i = FIRST_PSEUDO_REGISTER; i < nregs; i++)
|
for (i = FIRST_PSEUDO_REGISTER; i < nregs; i++)
|
{
|
{
|
int best_cost = (1 << (HOST_BITS_PER_INT - 2)) - 1;
|
int best_cost = (1 << (HOST_BITS_PER_INT - 2)) - 1;
|
enum reg_class best = ALL_REGS, alt = NO_REGS;
|
enum reg_class best = ALL_REGS, alt = NO_REGS;
|
/* This is an enum reg_class, but we call it an int
|
/* This is an enum reg_class, but we call it an int
|
to save lots of casts. */
|
to save lots of casts. */
|
int class;
|
int class;
|
struct costs *p = &costs[i];
|
struct costs *p = &costs[i];
|
|
|
/* In non-optimizing compilation REG_N_REFS is not initialized
|
/* In non-optimizing compilation REG_N_REFS is not initialized
|
yet. */
|
yet. */
|
if (optimize && !REG_N_REFS (i) && !REG_N_SETS (i))
|
if (optimize && !REG_N_REFS (i) && !REG_N_SETS (i))
|
continue;
|
continue;
|
|
|
for (class = (int) ALL_REGS - 1; class > 0; class--)
|
for (class = (int) ALL_REGS - 1; class > 0; class--)
|
{
|
{
|
/* Ignore classes that are too small for this operand or
|
/* Ignore classes that are too small for this operand or
|
invalid for an operand that was auto-incremented. */
|
invalid for an operand that was auto-incremented. */
|
if (!contains_reg_of_mode [class][PSEUDO_REGNO_MODE (i)]
|
if (!contains_reg_of_mode [class][PSEUDO_REGNO_MODE (i)]
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
|| (in_inc_dec[i] && forbidden_inc_dec_class[class])
|
|| (in_inc_dec[i] && forbidden_inc_dec_class[class])
|
#endif
|
#endif
|
#ifdef CANNOT_CHANGE_MODE_CLASS
|
#ifdef CANNOT_CHANGE_MODE_CLASS
|
|| invalid_mode_change_p (i, (enum reg_class) class,
|
|| invalid_mode_change_p (i, (enum reg_class) class,
|
PSEUDO_REGNO_MODE (i))
|
PSEUDO_REGNO_MODE (i))
|
#endif
|
#endif
|
)
|
)
|
;
|
;
|
else if (p->cost[class] < best_cost)
|
else if (p->cost[class] < best_cost)
|
{
|
{
|
best_cost = p->cost[class];
|
best_cost = p->cost[class];
|
best = (enum reg_class) class;
|
best = (enum reg_class) class;
|
}
|
}
|
else if (p->cost[class] == best_cost)
|
else if (p->cost[class] == best_cost)
|
best = reg_class_subunion[(int) best][class];
|
best = reg_class_subunion[(int) best][class];
|
}
|
}
|
|
|
/* If no register class is better than memory, use memory. */
|
/* If no register class is better than memory, use memory. */
|
if (p->mem_cost < best_cost)
|
if (p->mem_cost < best_cost)
|
best = NO_REGS;
|
best = NO_REGS;
|
|
|
/* Record the alternate register class; i.e., a class for which
|
/* Record the alternate register class; i.e., a class for which
|
every register in it is better than using memory. If adding a
|
every register in it is better than using memory. If adding a
|
class would make a smaller class (i.e., no union of just those
|
class would make a smaller class (i.e., no union of just those
|
classes exists), skip that class. The major unions of classes
|
classes exists), skip that class. The major unions of classes
|
should be provided as a register class. Don't do this if we
|
should be provided as a register class. Don't do this if we
|
will be doing it again later. */
|
will be doing it again later. */
|
|
|
if ((pass == 1 || dump_file) || ! flag_expensive_optimizations)
|
if ((pass == 1 || dump_file) || ! flag_expensive_optimizations)
|
for (class = 0; class < N_REG_CLASSES; class++)
|
for (class = 0; class < N_REG_CLASSES; class++)
|
if (p->cost[class] < p->mem_cost
|
if (p->cost[class] < p->mem_cost
|
&& (reg_class_size[(int) reg_class_subunion[(int) alt][class]]
|
&& (reg_class_size[(int) reg_class_subunion[(int) alt][class]]
|
> reg_class_size[(int) alt])
|
> reg_class_size[(int) alt])
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
&& ! (in_inc_dec[i] && forbidden_inc_dec_class[class])
|
&& ! (in_inc_dec[i] && forbidden_inc_dec_class[class])
|
#endif
|
#endif
|
#ifdef CANNOT_CHANGE_MODE_CLASS
|
#ifdef CANNOT_CHANGE_MODE_CLASS
|
&& ! invalid_mode_change_p (i, (enum reg_class) class,
|
&& ! invalid_mode_change_p (i, (enum reg_class) class,
|
PSEUDO_REGNO_MODE (i))
|
PSEUDO_REGNO_MODE (i))
|
#endif
|
#endif
|
)
|
)
|
alt = reg_class_subunion[(int) alt][class];
|
alt = reg_class_subunion[(int) alt][class];
|
|
|
/* If we don't add any classes, nothing to try. */
|
/* If we don't add any classes, nothing to try. */
|
if (alt == best)
|
if (alt == best)
|
alt = NO_REGS;
|
alt = NO_REGS;
|
|
|
if (dump_file
|
if (dump_file
|
&& (reg_pref[i].prefclass != (int) best
|
&& (reg_pref[i].prefclass != (int) best
|
|| reg_pref[i].altclass != (int) alt))
|
|| reg_pref[i].altclass != (int) alt))
|
{
|
{
|
fprintf (dump_file, " Register %i", i);
|
fprintf (dump_file, " Register %i", i);
|
if (alt == ALL_REGS || best == ALL_REGS)
|
if (alt == ALL_REGS || best == ALL_REGS)
|
fprintf (dump_file, " pref %s\n", reg_class_names[(int) best]);
|
fprintf (dump_file, " pref %s\n", reg_class_names[(int) best]);
|
else if (alt == NO_REGS)
|
else if (alt == NO_REGS)
|
fprintf (dump_file, " pref %s or none\n", reg_class_names[(int) best]);
|
fprintf (dump_file, " pref %s or none\n", reg_class_names[(int) best]);
|
else
|
else
|
fprintf (dump_file, " pref %s, else %s\n",
|
fprintf (dump_file, " pref %s, else %s\n",
|
reg_class_names[(int) best],
|
reg_class_names[(int) best],
|
reg_class_names[(int) alt]);
|
reg_class_names[(int) alt]);
|
}
|
}
|
|
|
/* We cast to (int) because (char) hits bugs in some compilers. */
|
/* We cast to (int) because (char) hits bugs in some compilers. */
|
reg_pref[i].prefclass = (int) best;
|
reg_pref[i].prefclass = (int) best;
|
reg_pref[i].altclass = (int) alt;
|
reg_pref[i].altclass = (int) alt;
|
}
|
}
|
}
|
}
|
|
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
free (in_inc_dec);
|
free (in_inc_dec);
|
#endif
|
#endif
|
free (costs);
|
free (costs);
|
}
|
}
|
|
|
/* Record the cost of using memory or registers of various classes for
|
/* Record the cost of using memory or registers of various classes for
|
the operands in INSN.
|
the operands in INSN.
|
|
|
N_ALTS is the number of alternatives.
|
N_ALTS is the number of alternatives.
|
|
|
N_OPS is the number of operands.
|
N_OPS is the number of operands.
|
|
|
OPS is an array of the operands.
|
OPS is an array of the operands.
|
|
|
MODES are the modes of the operands, in case any are VOIDmode.
|
MODES are the modes of the operands, in case any are VOIDmode.
|
|
|
CONSTRAINTS are the constraints to use for the operands. This array
|
CONSTRAINTS are the constraints to use for the operands. This array
|
is modified by this procedure.
|
is modified by this procedure.
|
|
|
This procedure works alternative by alternative. For each alternative
|
This procedure works alternative by alternative. For each alternative
|
we assume that we will be able to allocate all pseudos to their ideal
|
we assume that we will be able to allocate all pseudos to their ideal
|
register class and calculate the cost of using that alternative. Then
|
register class and calculate the cost of using that alternative. Then
|
we compute for each operand that is a pseudo-register, the cost of
|
we compute for each operand that is a pseudo-register, the cost of
|
having the pseudo allocated to each register class and using it in that
|
having the pseudo allocated to each register class and using it in that
|
alternative. To this cost is added the cost of the alternative.
|
alternative. To this cost is added the cost of the alternative.
|
|
|
The cost of each class for this insn is its lowest cost among all the
|
The cost of each class for this insn is its lowest cost among all the
|
alternatives. */
|
alternatives. */
|
|
|
static void
|
static void
|
record_reg_classes (int n_alts, int n_ops, rtx *ops,
|
record_reg_classes (int n_alts, int n_ops, rtx *ops,
|
enum machine_mode *modes, const char **constraints,
|
enum machine_mode *modes, const char **constraints,
|
rtx insn, struct costs *op_costs,
|
rtx insn, struct costs *op_costs,
|
struct reg_pref *reg_pref)
|
struct reg_pref *reg_pref)
|
{
|
{
|
int alt;
|
int alt;
|
int i, j;
|
int i, j;
|
rtx set;
|
rtx set;
|
|
|
/* Process each alternative, each time minimizing an operand's cost with
|
/* Process each alternative, each time minimizing an operand's cost with
|
the cost for each operand in that alternative. */
|
the cost for each operand in that alternative. */
|
|
|
for (alt = 0; alt < n_alts; alt++)
|
for (alt = 0; alt < n_alts; alt++)
|
{
|
{
|
struct costs this_op_costs[MAX_RECOG_OPERANDS];
|
struct costs this_op_costs[MAX_RECOG_OPERANDS];
|
int alt_fail = 0;
|
int alt_fail = 0;
|
int alt_cost = 0;
|
int alt_cost = 0;
|
enum reg_class classes[MAX_RECOG_OPERANDS];
|
enum reg_class classes[MAX_RECOG_OPERANDS];
|
int allows_mem[MAX_RECOG_OPERANDS];
|
int allows_mem[MAX_RECOG_OPERANDS];
|
int class;
|
int class;
|
|
|
for (i = 0; i < n_ops; i++)
|
for (i = 0; i < n_ops; i++)
|
{
|
{
|
const char *p = constraints[i];
|
const char *p = constraints[i];
|
rtx op = ops[i];
|
rtx op = ops[i];
|
enum machine_mode mode = modes[i];
|
enum machine_mode mode = modes[i];
|
int allows_addr = 0;
|
int allows_addr = 0;
|
int win = 0;
|
int win = 0;
|
unsigned char c;
|
unsigned char c;
|
|
|
/* Initially show we know nothing about the register class. */
|
/* Initially show we know nothing about the register class. */
|
classes[i] = NO_REGS;
|
classes[i] = NO_REGS;
|
allows_mem[i] = 0;
|
allows_mem[i] = 0;
|
|
|
/* If this operand has no constraints at all, we can conclude
|
/* If this operand has no constraints at all, we can conclude
|
nothing about it since anything is valid. */
|
nothing about it since anything is valid. */
|
|
|
if (*p == 0)
|
if (*p == 0)
|
{
|
{
|
if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER)
|
if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER)
|
memset (&this_op_costs[i], 0, sizeof this_op_costs[i]);
|
memset (&this_op_costs[i], 0, sizeof this_op_costs[i]);
|
|
|
continue;
|
continue;
|
}
|
}
|
|
|
/* If this alternative is only relevant when this operand
|
/* If this alternative is only relevant when this operand
|
matches a previous operand, we do different things depending
|
matches a previous operand, we do different things depending
|
on whether this operand is a pseudo-reg or not. We must process
|
on whether this operand is a pseudo-reg or not. We must process
|
any modifiers for the operand before we can make this test. */
|
any modifiers for the operand before we can make this test. */
|
|
|
while (*p == '%' || *p == '=' || *p == '+' || *p == '&')
|
while (*p == '%' || *p == '=' || *p == '+' || *p == '&')
|
p++;
|
p++;
|
|
|
if (p[0] >= '0' && p[0] <= '0' + i && (p[1] == ',' || p[1] == 0))
|
if (p[0] >= '0' && p[0] <= '0' + i && (p[1] == ',' || p[1] == 0))
|
{
|
{
|
/* Copy class and whether memory is allowed from the matching
|
/* Copy class and whether memory is allowed from the matching
|
alternative. Then perform any needed cost computations
|
alternative. Then perform any needed cost computations
|
and/or adjustments. */
|
and/or adjustments. */
|
j = p[0] - '0';
|
j = p[0] - '0';
|
classes[i] = classes[j];
|
classes[i] = classes[j];
|
allows_mem[i] = allows_mem[j];
|
allows_mem[i] = allows_mem[j];
|
|
|
if (!REG_P (op) || REGNO (op) < FIRST_PSEUDO_REGISTER)
|
if (!REG_P (op) || REGNO (op) < FIRST_PSEUDO_REGISTER)
|
{
|
{
|
/* If this matches the other operand, we have no added
|
/* If this matches the other operand, we have no added
|
cost and we win. */
|
cost and we win. */
|
if (rtx_equal_p (ops[j], op))
|
if (rtx_equal_p (ops[j], op))
|
win = 1;
|
win = 1;
|
|
|
/* If we can put the other operand into a register, add to
|
/* If we can put the other operand into a register, add to
|
the cost of this alternative the cost to copy this
|
the cost of this alternative the cost to copy this
|
operand to the register used for the other operand. */
|
operand to the register used for the other operand. */
|
|
|
else if (classes[j] != NO_REGS)
|
else if (classes[j] != NO_REGS)
|
{
|
{
|
alt_cost += copy_cost (op, mode, classes[j], 1, NULL);
|
alt_cost += copy_cost (op, mode, classes[j], 1, NULL);
|
win = 1;
|
win = 1;
|
}
|
}
|
}
|
}
|
else if (!REG_P (ops[j])
|
else if (!REG_P (ops[j])
|
|| REGNO (ops[j]) < FIRST_PSEUDO_REGISTER)
|
|| REGNO (ops[j]) < FIRST_PSEUDO_REGISTER)
|
{
|
{
|
/* This op is a pseudo but the one it matches is not. */
|
/* This op is a pseudo but the one it matches is not. */
|
|
|
/* If we can't put the other operand into a register, this
|
/* If we can't put the other operand into a register, this
|
alternative can't be used. */
|
alternative can't be used. */
|
|
|
if (classes[j] == NO_REGS)
|
if (classes[j] == NO_REGS)
|
alt_fail = 1;
|
alt_fail = 1;
|
|
|
/* Otherwise, add to the cost of this alternative the cost
|
/* Otherwise, add to the cost of this alternative the cost
|
to copy the other operand to the register used for this
|
to copy the other operand to the register used for this
|
operand. */
|
operand. */
|
|
|
else
|
else
|
alt_cost += copy_cost (ops[j], mode, classes[j], 1, NULL);
|
alt_cost += copy_cost (ops[j], mode, classes[j], 1, NULL);
|
}
|
}
|
else
|
else
|
{
|
{
|
/* The costs of this operand are not the same as the other
|
/* The costs of this operand are not the same as the other
|
operand since move costs are not symmetric. Moreover,
|
operand since move costs are not symmetric. Moreover,
|
if we cannot tie them, this alternative needs to do a
|
if we cannot tie them, this alternative needs to do a
|
copy, which is one instruction. */
|
copy, which is one instruction. */
|
|
|
struct costs *pp = &this_op_costs[i];
|
struct costs *pp = &this_op_costs[i];
|
|
|
for (class = 0; class < N_REG_CLASSES; class++)
|
for (class = 0; class < N_REG_CLASSES; class++)
|
pp->cost[class]
|
pp->cost[class]
|
= ((recog_data.operand_type[i] != OP_OUT
|
= ((recog_data.operand_type[i] != OP_OUT
|
? may_move_in_cost[mode][class][(int) classes[i]]
|
? may_move_in_cost[mode][class][(int) classes[i]]
|
: 0)
|
: 0)
|
+ (recog_data.operand_type[i] != OP_IN
|
+ (recog_data.operand_type[i] != OP_IN
|
? may_move_out_cost[mode][(int) classes[i]][class]
|
? may_move_out_cost[mode][(int) classes[i]][class]
|
: 0));
|
: 0));
|
|
|
/* If the alternative actually allows memory, make things
|
/* If the alternative actually allows memory, make things
|
a bit cheaper since we won't need an extra insn to
|
a bit cheaper since we won't need an extra insn to
|
load it. */
|
load it. */
|
|
|
pp->mem_cost
|
pp->mem_cost
|
= ((recog_data.operand_type[i] != OP_IN
|
= ((recog_data.operand_type[i] != OP_IN
|
? MEMORY_MOVE_COST (mode, classes[i], 0)
|
? MEMORY_MOVE_COST (mode, classes[i], 0)
|
: 0)
|
: 0)
|
+ (recog_data.operand_type[i] != OP_OUT
|
+ (recog_data.operand_type[i] != OP_OUT
|
? MEMORY_MOVE_COST (mode, classes[i], 1)
|
? MEMORY_MOVE_COST (mode, classes[i], 1)
|
: 0) - allows_mem[i]);
|
: 0) - allows_mem[i]);
|
|
|
/* If we have assigned a class to this register in our
|
/* If we have assigned a class to this register in our
|
first pass, add a cost to this alternative corresponding
|
first pass, add a cost to this alternative corresponding
|
to what we would add if this register were not in the
|
to what we would add if this register were not in the
|
appropriate class. */
|
appropriate class. */
|
|
|
if (reg_pref && reg_pref[REGNO (op)].prefclass != NO_REGS)
|
if (reg_pref && reg_pref[REGNO (op)].prefclass != NO_REGS)
|
alt_cost
|
alt_cost
|
+= (may_move_in_cost[mode]
|
+= (may_move_in_cost[mode]
|
[(unsigned char) reg_pref[REGNO (op)].prefclass]
|
[(unsigned char) reg_pref[REGNO (op)].prefclass]
|
[(int) classes[i]]);
|
[(int) classes[i]]);
|
|
|
if (REGNO (ops[i]) != REGNO (ops[j])
|
if (REGNO (ops[i]) != REGNO (ops[j])
|
&& ! find_reg_note (insn, REG_DEAD, op))
|
&& ! find_reg_note (insn, REG_DEAD, op))
|
alt_cost += 2;
|
alt_cost += 2;
|
|
|
/* This is in place of ordinary cost computation
|
/* This is in place of ordinary cost computation
|
for this operand, so skip to the end of the
|
for this operand, so skip to the end of the
|
alternative (should be just one character). */
|
alternative (should be just one character). */
|
while (*p && *p++ != ',')
|
while (*p && *p++ != ',')
|
;
|
;
|
|
|
constraints[i] = p;
|
constraints[i] = p;
|
continue;
|
continue;
|
}
|
}
|
}
|
}
|
|
|
/* Scan all the constraint letters. See if the operand matches
|
/* Scan all the constraint letters. See if the operand matches
|
any of the constraints. Collect the valid register classes
|
any of the constraints. Collect the valid register classes
|
and see if this operand accepts memory. */
|
and see if this operand accepts memory. */
|
|
|
while ((c = *p))
|
while ((c = *p))
|
{
|
{
|
switch (c)
|
switch (c)
|
{
|
{
|
case ',':
|
case ',':
|
break;
|
break;
|
case '*':
|
case '*':
|
/* Ignore the next letter for this pass. */
|
/* Ignore the next letter for this pass. */
|
c = *++p;
|
c = *++p;
|
break;
|
break;
|
|
|
case '?':
|
case '?':
|
alt_cost += 2;
|
alt_cost += 2;
|
case '!': case '#': case '&':
|
case '!': case '#': case '&':
|
case '0': case '1': case '2': case '3': case '4':
|
case '0': case '1': case '2': case '3': case '4':
|
case '5': case '6': case '7': case '8': case '9':
|
case '5': case '6': case '7': case '8': case '9':
|
break;
|
break;
|
|
|
case 'p':
|
case 'p':
|
allows_addr = 1;
|
allows_addr = 1;
|
win = address_operand (op, GET_MODE (op));
|
win = address_operand (op, GET_MODE (op));
|
/* We know this operand is an address, so we want it to be
|
/* We know this operand is an address, so we want it to be
|
allocated to a register that can be the base of an
|
allocated to a register that can be the base of an
|
address, i.e. BASE_REG_CLASS. */
|
address, i.e. BASE_REG_CLASS. */
|
classes[i]
|
classes[i]
|
= reg_class_subunion[(int) classes[i]]
|
= reg_class_subunion[(int) classes[i]]
|
[(int) base_reg_class (VOIDmode, ADDRESS, SCRATCH)];
|
[(int) base_reg_class (VOIDmode, ADDRESS, SCRATCH)];
|
break;
|
break;
|
|
|
case 'm': case 'o': case 'V':
|
case 'm': case 'o': case 'V':
|
/* It doesn't seem worth distinguishing between offsettable
|
/* It doesn't seem worth distinguishing between offsettable
|
and non-offsettable addresses here. */
|
and non-offsettable addresses here. */
|
allows_mem[i] = 1;
|
allows_mem[i] = 1;
|
if (MEM_P (op))
|
if (MEM_P (op))
|
win = 1;
|
win = 1;
|
break;
|
break;
|
|
|
case '<':
|
case '<':
|
if (MEM_P (op)
|
if (MEM_P (op)
|
&& (GET_CODE (XEXP (op, 0)) == PRE_DEC
|
&& (GET_CODE (XEXP (op, 0)) == PRE_DEC
|
|| GET_CODE (XEXP (op, 0)) == POST_DEC))
|
|| GET_CODE (XEXP (op, 0)) == POST_DEC))
|
win = 1;
|
win = 1;
|
break;
|
break;
|
|
|
case '>':
|
case '>':
|
if (MEM_P (op)
|
if (MEM_P (op)
|
&& (GET_CODE (XEXP (op, 0)) == PRE_INC
|
&& (GET_CODE (XEXP (op, 0)) == PRE_INC
|
|| GET_CODE (XEXP (op, 0)) == POST_INC))
|
|| GET_CODE (XEXP (op, 0)) == POST_INC))
|
win = 1;
|
win = 1;
|
break;
|
break;
|
|
|
case 'E':
|
case 'E':
|
case 'F':
|
case 'F':
|
if (GET_CODE (op) == CONST_DOUBLE
|
if (GET_CODE (op) == CONST_DOUBLE
|
|| (GET_CODE (op) == CONST_VECTOR
|
|| (GET_CODE (op) == CONST_VECTOR
|
&& (GET_MODE_CLASS (GET_MODE (op))
|
&& (GET_MODE_CLASS (GET_MODE (op))
|
== MODE_VECTOR_FLOAT)))
|
== MODE_VECTOR_FLOAT)))
|
win = 1;
|
win = 1;
|
break;
|
break;
|
|
|
case 'G':
|
case 'G':
|
case 'H':
|
case 'H':
|
if (GET_CODE (op) == CONST_DOUBLE
|
if (GET_CODE (op) == CONST_DOUBLE
|
&& CONST_DOUBLE_OK_FOR_CONSTRAINT_P (op, c, p))
|
&& CONST_DOUBLE_OK_FOR_CONSTRAINT_P (op, c, p))
|
win = 1;
|
win = 1;
|
break;
|
break;
|
|
|
case 's':
|
case 's':
|
if (GET_CODE (op) == CONST_INT
|
if (GET_CODE (op) == CONST_INT
|
|| (GET_CODE (op) == CONST_DOUBLE
|
|| (GET_CODE (op) == CONST_DOUBLE
|
&& GET_MODE (op) == VOIDmode))
|
&& GET_MODE (op) == VOIDmode))
|
break;
|
break;
|
case 'i':
|
case 'i':
|
if (CONSTANT_P (op)
|
if (CONSTANT_P (op)
|
&& (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op)))
|
&& (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op)))
|
win = 1;
|
win = 1;
|
break;
|
break;
|
|
|
case 'n':
|
case 'n':
|
if (GET_CODE (op) == CONST_INT
|
if (GET_CODE (op) == CONST_INT
|
|| (GET_CODE (op) == CONST_DOUBLE
|
|| (GET_CODE (op) == CONST_DOUBLE
|
&& GET_MODE (op) == VOIDmode))
|
&& GET_MODE (op) == VOIDmode))
|
win = 1;
|
win = 1;
|
break;
|
break;
|
|
|
case 'I':
|
case 'I':
|
case 'J':
|
case 'J':
|
case 'K':
|
case 'K':
|
case 'L':
|
case 'L':
|
case 'M':
|
case 'M':
|
case 'N':
|
case 'N':
|
case 'O':
|
case 'O':
|
case 'P':
|
case 'P':
|
if (GET_CODE (op) == CONST_INT
|
if (GET_CODE (op) == CONST_INT
|
&& CONST_OK_FOR_CONSTRAINT_P (INTVAL (op), c, p))
|
&& CONST_OK_FOR_CONSTRAINT_P (INTVAL (op), c, p))
|
win = 1;
|
win = 1;
|
break;
|
break;
|
|
|
case 'X':
|
case 'X':
|
win = 1;
|
win = 1;
|
break;
|
break;
|
|
|
case 'g':
|
case 'g':
|
if (MEM_P (op)
|
if (MEM_P (op)
|
|| (CONSTANT_P (op)
|
|| (CONSTANT_P (op)
|
&& (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op))))
|
&& (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op))))
|
win = 1;
|
win = 1;
|
allows_mem[i] = 1;
|
allows_mem[i] = 1;
|
case 'r':
|
case 'r':
|
classes[i]
|
classes[i]
|
= reg_class_subunion[(int) classes[i]][(int) GENERAL_REGS];
|
= reg_class_subunion[(int) classes[i]][(int) GENERAL_REGS];
|
break;
|
break;
|
|
|
default:
|
default:
|
if (REG_CLASS_FROM_CONSTRAINT (c, p) != NO_REGS)
|
if (REG_CLASS_FROM_CONSTRAINT (c, p) != NO_REGS)
|
classes[i]
|
classes[i]
|
= reg_class_subunion[(int) classes[i]]
|
= reg_class_subunion[(int) classes[i]]
|
[(int) REG_CLASS_FROM_CONSTRAINT (c, p)];
|
[(int) REG_CLASS_FROM_CONSTRAINT (c, p)];
|
#ifdef EXTRA_CONSTRAINT_STR
|
#ifdef EXTRA_CONSTRAINT_STR
|
else if (EXTRA_CONSTRAINT_STR (op, c, p))
|
else if (EXTRA_CONSTRAINT_STR (op, c, p))
|
win = 1;
|
win = 1;
|
|
|
if (EXTRA_MEMORY_CONSTRAINT (c, p))
|
if (EXTRA_MEMORY_CONSTRAINT (c, p))
|
{
|
{
|
/* Every MEM can be reloaded to fit. */
|
/* Every MEM can be reloaded to fit. */
|
allows_mem[i] = 1;
|
allows_mem[i] = 1;
|
if (MEM_P (op))
|
if (MEM_P (op))
|
win = 1;
|
win = 1;
|
}
|
}
|
if (EXTRA_ADDRESS_CONSTRAINT (c, p))
|
if (EXTRA_ADDRESS_CONSTRAINT (c, p))
|
{
|
{
|
/* Every address can be reloaded to fit. */
|
/* Every address can be reloaded to fit. */
|
allows_addr = 1;
|
allows_addr = 1;
|
if (address_operand (op, GET_MODE (op)))
|
if (address_operand (op, GET_MODE (op)))
|
win = 1;
|
win = 1;
|
/* We know this operand is an address, so we want it to
|
/* We know this operand is an address, so we want it to
|
be allocated to a register that can be the base of an
|
be allocated to a register that can be the base of an
|
address, i.e. BASE_REG_CLASS. */
|
address, i.e. BASE_REG_CLASS. */
|
classes[i]
|
classes[i]
|
= reg_class_subunion[(int) classes[i]]
|
= reg_class_subunion[(int) classes[i]]
|
[(int) base_reg_class (VOIDmode, ADDRESS, SCRATCH)];
|
[(int) base_reg_class (VOIDmode, ADDRESS, SCRATCH)];
|
}
|
}
|
#endif
|
#endif
|
break;
|
break;
|
}
|
}
|
p += CONSTRAINT_LEN (c, p);
|
p += CONSTRAINT_LEN (c, p);
|
if (c == ',')
|
if (c == ',')
|
break;
|
break;
|
}
|
}
|
|
|
constraints[i] = p;
|
constraints[i] = p;
|
|
|
/* How we account for this operand now depends on whether it is a
|
/* How we account for this operand now depends on whether it is a
|
pseudo register or not. If it is, we first check if any
|
pseudo register or not. If it is, we first check if any
|
register classes are valid. If not, we ignore this alternative,
|
register classes are valid. If not, we ignore this alternative,
|
since we want to assume that all pseudos get allocated for
|
since we want to assume that all pseudos get allocated for
|
register preferencing. If some register class is valid, compute
|
register preferencing. If some register class is valid, compute
|
the costs of moving the pseudo into that class. */
|
the costs of moving the pseudo into that class. */
|
|
|
if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER)
|
if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER)
|
{
|
{
|
if (classes[i] == NO_REGS)
|
if (classes[i] == NO_REGS)
|
{
|
{
|
/* We must always fail if the operand is a REG, but
|
/* We must always fail if the operand is a REG, but
|
we did not find a suitable class.
|
we did not find a suitable class.
|
|
|
Otherwise we may perform an uninitialized read
|
Otherwise we may perform an uninitialized read
|
from this_op_costs after the `continue' statement
|
from this_op_costs after the `continue' statement
|
below. */
|
below. */
|
alt_fail = 1;
|
alt_fail = 1;
|
}
|
}
|
else
|
else
|
{
|
{
|
struct costs *pp = &this_op_costs[i];
|
struct costs *pp = &this_op_costs[i];
|
|
|
for (class = 0; class < N_REG_CLASSES; class++)
|
for (class = 0; class < N_REG_CLASSES; class++)
|
pp->cost[class]
|
pp->cost[class]
|
= ((recog_data.operand_type[i] != OP_OUT
|
= ((recog_data.operand_type[i] != OP_OUT
|
? may_move_in_cost[mode][class][(int) classes[i]]
|
? may_move_in_cost[mode][class][(int) classes[i]]
|
: 0)
|
: 0)
|
+ (recog_data.operand_type[i] != OP_IN
|
+ (recog_data.operand_type[i] != OP_IN
|
? may_move_out_cost[mode][(int) classes[i]][class]
|
? may_move_out_cost[mode][(int) classes[i]][class]
|
: 0));
|
: 0));
|
|
|
/* If the alternative actually allows memory, make things
|
/* If the alternative actually allows memory, make things
|
a bit cheaper since we won't need an extra insn to
|
a bit cheaper since we won't need an extra insn to
|
load it. */
|
load it. */
|
|
|
pp->mem_cost
|
pp->mem_cost
|
= ((recog_data.operand_type[i] != OP_IN
|
= ((recog_data.operand_type[i] != OP_IN
|
? MEMORY_MOVE_COST (mode, classes[i], 0)
|
? MEMORY_MOVE_COST (mode, classes[i], 0)
|
: 0)
|
: 0)
|
+ (recog_data.operand_type[i] != OP_OUT
|
+ (recog_data.operand_type[i] != OP_OUT
|
? MEMORY_MOVE_COST (mode, classes[i], 1)
|
? MEMORY_MOVE_COST (mode, classes[i], 1)
|
: 0) - allows_mem[i]);
|
: 0) - allows_mem[i]);
|
|
|
/* If we have assigned a class to this register in our
|
/* If we have assigned a class to this register in our
|
first pass, add a cost to this alternative corresponding
|
first pass, add a cost to this alternative corresponding
|
to what we would add if this register were not in the
|
to what we would add if this register were not in the
|
appropriate class. */
|
appropriate class. */
|
|
|
if (reg_pref && reg_pref[REGNO (op)].prefclass != NO_REGS)
|
if (reg_pref && reg_pref[REGNO (op)].prefclass != NO_REGS)
|
alt_cost
|
alt_cost
|
+= (may_move_in_cost[mode]
|
+= (may_move_in_cost[mode]
|
[(unsigned char) reg_pref[REGNO (op)].prefclass]
|
[(unsigned char) reg_pref[REGNO (op)].prefclass]
|
[(int) classes[i]]);
|
[(int) classes[i]]);
|
}
|
}
|
}
|
}
|
|
|
/* Otherwise, if this alternative wins, either because we
|
/* Otherwise, if this alternative wins, either because we
|
have already determined that or if we have a hard register of
|
have already determined that or if we have a hard register of
|
the proper class, there is no cost for this alternative. */
|
the proper class, there is no cost for this alternative. */
|
|
|
else if (win
|
else if (win
|
|| (REG_P (op)
|
|| (REG_P (op)
|
&& reg_fits_class_p (op, classes[i], 0, GET_MODE (op))))
|
&& reg_fits_class_p (op, classes[i], 0, GET_MODE (op))))
|
;
|
;
|
|
|
/* If registers are valid, the cost of this alternative includes
|
/* If registers are valid, the cost of this alternative includes
|
copying the object to and/or from a register. */
|
copying the object to and/or from a register. */
|
|
|
else if (classes[i] != NO_REGS)
|
else if (classes[i] != NO_REGS)
|
{
|
{
|
if (recog_data.operand_type[i] != OP_OUT)
|
if (recog_data.operand_type[i] != OP_OUT)
|
alt_cost += copy_cost (op, mode, classes[i], 1, NULL);
|
alt_cost += copy_cost (op, mode, classes[i], 1, NULL);
|
|
|
if (recog_data.operand_type[i] != OP_IN)
|
if (recog_data.operand_type[i] != OP_IN)
|
alt_cost += copy_cost (op, mode, classes[i], 0, NULL);
|
alt_cost += copy_cost (op, mode, classes[i], 0, NULL);
|
}
|
}
|
|
|
/* The only other way this alternative can be used is if this is a
|
/* The only other way this alternative can be used is if this is a
|
constant that could be placed into memory. */
|
constant that could be placed into memory. */
|
|
|
else if (CONSTANT_P (op) && (allows_addr || allows_mem[i]))
|
else if (CONSTANT_P (op) && (allows_addr || allows_mem[i]))
|
alt_cost += MEMORY_MOVE_COST (mode, classes[i], 1);
|
alt_cost += MEMORY_MOVE_COST (mode, classes[i], 1);
|
else
|
else
|
alt_fail = 1;
|
alt_fail = 1;
|
}
|
}
|
|
|
if (alt_fail)
|
if (alt_fail)
|
continue;
|
continue;
|
|
|
/* Finally, update the costs with the information we've calculated
|
/* Finally, update the costs with the information we've calculated
|
about this alternative. */
|
about this alternative. */
|
|
|
for (i = 0; i < n_ops; i++)
|
for (i = 0; i < n_ops; i++)
|
if (REG_P (ops[i])
|
if (REG_P (ops[i])
|
&& REGNO (ops[i]) >= FIRST_PSEUDO_REGISTER)
|
&& REGNO (ops[i]) >= FIRST_PSEUDO_REGISTER)
|
{
|
{
|
struct costs *pp = &op_costs[i], *qq = &this_op_costs[i];
|
struct costs *pp = &op_costs[i], *qq = &this_op_costs[i];
|
int scale = 1 + (recog_data.operand_type[i] == OP_INOUT);
|
int scale = 1 + (recog_data.operand_type[i] == OP_INOUT);
|
|
|
pp->mem_cost = MIN (pp->mem_cost,
|
pp->mem_cost = MIN (pp->mem_cost,
|
(qq->mem_cost + alt_cost) * scale);
|
(qq->mem_cost + alt_cost) * scale);
|
|
|
for (class = 0; class < N_REG_CLASSES; class++)
|
for (class = 0; class < N_REG_CLASSES; class++)
|
pp->cost[class] = MIN (pp->cost[class],
|
pp->cost[class] = MIN (pp->cost[class],
|
(qq->cost[class] + alt_cost) * scale);
|
(qq->cost[class] + alt_cost) * scale);
|
}
|
}
|
}
|
}
|
|
|
/* If this insn is a single set copying operand 1 to operand 0
|
/* If this insn is a single set copying operand 1 to operand 0
|
and one operand is a pseudo with the other a hard reg or a pseudo
|
and one operand is a pseudo with the other a hard reg or a pseudo
|
that prefers a register that is in its own register class then
|
that prefers a register that is in its own register class then
|
we may want to adjust the cost of that register class to -1.
|
we may want to adjust the cost of that register class to -1.
|
|
|
Avoid the adjustment if the source does not die to avoid stressing of
|
Avoid the adjustment if the source does not die to avoid stressing of
|
register allocator by preferrencing two colliding registers into single
|
register allocator by preferrencing two colliding registers into single
|
class.
|
class.
|
|
|
Also avoid the adjustment if a copy between registers of the class
|
Also avoid the adjustment if a copy between registers of the class
|
is expensive (ten times the cost of a default copy is considered
|
is expensive (ten times the cost of a default copy is considered
|
arbitrarily expensive). This avoids losing when the preferred class
|
arbitrarily expensive). This avoids losing when the preferred class
|
is very expensive as the source of a copy instruction. */
|
is very expensive as the source of a copy instruction. */
|
|
|
if ((set = single_set (insn)) != 0
|
if ((set = single_set (insn)) != 0
|
&& ops[0] == SET_DEST (set) && ops[1] == SET_SRC (set)
|
&& ops[0] == SET_DEST (set) && ops[1] == SET_SRC (set)
|
&& REG_P (ops[0]) && REG_P (ops[1])
|
&& REG_P (ops[0]) && REG_P (ops[1])
|
&& find_regno_note (insn, REG_DEAD, REGNO (ops[1])))
|
&& find_regno_note (insn, REG_DEAD, REGNO (ops[1])))
|
for (i = 0; i <= 1; i++)
|
for (i = 0; i <= 1; i++)
|
if (REGNO (ops[i]) >= FIRST_PSEUDO_REGISTER)
|
if (REGNO (ops[i]) >= FIRST_PSEUDO_REGISTER)
|
{
|
{
|
unsigned int regno = REGNO (ops[!i]);
|
unsigned int regno = REGNO (ops[!i]);
|
enum machine_mode mode = GET_MODE (ops[!i]);
|
enum machine_mode mode = GET_MODE (ops[!i]);
|
int class;
|
int class;
|
unsigned int nr;
|
unsigned int nr;
|
|
|
if (regno >= FIRST_PSEUDO_REGISTER && reg_pref != 0
|
if (regno >= FIRST_PSEUDO_REGISTER && reg_pref != 0
|
&& reg_pref[regno].prefclass != NO_REGS)
|
&& reg_pref[regno].prefclass != NO_REGS)
|
{
|
{
|
enum reg_class pref = reg_pref[regno].prefclass;
|
enum reg_class pref = reg_pref[regno].prefclass;
|
|
|
if ((reg_class_size[(unsigned char) pref]
|
if ((reg_class_size[(unsigned char) pref]
|
== (unsigned) CLASS_MAX_NREGS (pref, mode))
|
== (unsigned) CLASS_MAX_NREGS (pref, mode))
|
&& REGISTER_MOVE_COST (mode, pref, pref) < 10 * 2)
|
&& REGISTER_MOVE_COST (mode, pref, pref) < 10 * 2)
|
op_costs[i].cost[(unsigned char) pref] = -1;
|
op_costs[i].cost[(unsigned char) pref] = -1;
|
}
|
}
|
else if (regno < FIRST_PSEUDO_REGISTER)
|
else if (regno < FIRST_PSEUDO_REGISTER)
|
for (class = 0; class < N_REG_CLASSES; class++)
|
for (class = 0; class < N_REG_CLASSES; class++)
|
if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
|
if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
|
&& reg_class_size[class] == (unsigned) CLASS_MAX_NREGS (class, mode))
|
&& reg_class_size[class] == (unsigned) CLASS_MAX_NREGS (class, mode))
|
{
|
{
|
if (reg_class_size[class] == 1)
|
if (reg_class_size[class] == 1)
|
op_costs[i].cost[class] = -1;
|
op_costs[i].cost[class] = -1;
|
else
|
else
|
{
|
{
|
for (nr = 0; nr < (unsigned) hard_regno_nregs[regno][mode]; nr++)
|
for (nr = 0; nr < (unsigned) hard_regno_nregs[regno][mode]; nr++)
|
{
|
{
|
if (! TEST_HARD_REG_BIT (reg_class_contents[class],
|
if (! TEST_HARD_REG_BIT (reg_class_contents[class],
|
regno + nr))
|
regno + nr))
|
break;
|
break;
|
}
|
}
|
|
|
if (nr == (unsigned) hard_regno_nregs[regno][mode])
|
if (nr == (unsigned) hard_regno_nregs[regno][mode])
|
op_costs[i].cost[class] = -1;
|
op_costs[i].cost[class] = -1;
|
}
|
}
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
/* Compute the cost of loading X into (if TO_P is nonzero) or from (if
|
/* Compute the cost of loading X into (if TO_P is nonzero) or from (if
|
TO_P is zero) a register of class CLASS in mode MODE.
|
TO_P is zero) a register of class CLASS in mode MODE.
|
|
|
X must not be a pseudo. */
|
X must not be a pseudo. */
|
|
|
static int
|
static int
|
copy_cost (rtx x, enum machine_mode mode, enum reg_class class, int to_p,
|
copy_cost (rtx x, enum machine_mode mode, enum reg_class class, int to_p,
|
secondary_reload_info *prev_sri)
|
secondary_reload_info *prev_sri)
|
{
|
{
|
enum reg_class secondary_class = NO_REGS;
|
enum reg_class secondary_class = NO_REGS;
|
secondary_reload_info sri;
|
secondary_reload_info sri;
|
|
|
/* If X is a SCRATCH, there is actually nothing to move since we are
|
/* If X is a SCRATCH, there is actually nothing to move since we are
|
assuming optimal allocation. */
|
assuming optimal allocation. */
|
|
|
if (GET_CODE (x) == SCRATCH)
|
if (GET_CODE (x) == SCRATCH)
|
return 0;
|
return 0;
|
|
|
/* Get the class we will actually use for a reload. */
|
/* Get the class we will actually use for a reload. */
|
class = PREFERRED_RELOAD_CLASS (x, class);
|
class = PREFERRED_RELOAD_CLASS (x, class);
|
|
|
/* If we need a secondary reload for an intermediate, the
|
/* If we need a secondary reload for an intermediate, the
|
cost is that to load the input into the intermediate register, then
|
cost is that to load the input into the intermediate register, then
|
to copy it. */
|
to copy it. */
|
|
|
sri.prev_sri = prev_sri;
|
sri.prev_sri = prev_sri;
|
sri.extra_cost = 0;
|
sri.extra_cost = 0;
|
secondary_class = targetm.secondary_reload (to_p, x, class, mode, &sri);
|
secondary_class = targetm.secondary_reload (to_p, x, class, mode, &sri);
|
|
|
if (secondary_class != NO_REGS)
|
if (secondary_class != NO_REGS)
|
return (move_cost[mode][(int) secondary_class][(int) class]
|
return (move_cost[mode][(int) secondary_class][(int) class]
|
+ sri.extra_cost
|
+ sri.extra_cost
|
+ copy_cost (x, mode, secondary_class, to_p, &sri));
|
+ copy_cost (x, mode, secondary_class, to_p, &sri));
|
|
|
/* For memory, use the memory move cost, for (hard) registers, use the
|
/* For memory, use the memory move cost, for (hard) registers, use the
|
cost to move between the register classes, and use 2 for everything
|
cost to move between the register classes, and use 2 for everything
|
else (constants). */
|
else (constants). */
|
|
|
if (MEM_P (x) || class == NO_REGS)
|
if (MEM_P (x) || class == NO_REGS)
|
return sri.extra_cost + MEMORY_MOVE_COST (mode, class, to_p);
|
return sri.extra_cost + MEMORY_MOVE_COST (mode, class, to_p);
|
|
|
else if (REG_P (x))
|
else if (REG_P (x))
|
return (sri.extra_cost
|
return (sri.extra_cost
|
+ move_cost[mode][(int) REGNO_REG_CLASS (REGNO (x))][(int) class]);
|
+ move_cost[mode][(int) REGNO_REG_CLASS (REGNO (x))][(int) class]);
|
|
|
else
|
else
|
/* If this is a constant, we may eventually want to call rtx_cost here. */
|
/* If this is a constant, we may eventually want to call rtx_cost here. */
|
return sri.extra_cost + COSTS_N_INSNS (1);
|
return sri.extra_cost + COSTS_N_INSNS (1);
|
}
|
}
|
|
|
/* Record the pseudo registers we must reload into hard registers
|
/* Record the pseudo registers we must reload into hard registers
|
in a subexpression of a memory address, X.
|
in a subexpression of a memory address, X.
|
|
|
If CONTEXT is 0, we are looking at the base part of an address, otherwise we
|
If CONTEXT is 0, we are looking at the base part of an address, otherwise we
|
are looking at the index part.
|
are looking at the index part.
|
|
|
MODE is the mode of the memory reference; OUTER_CODE and INDEX_CODE
|
MODE is the mode of the memory reference; OUTER_CODE and INDEX_CODE
|
give the context that the rtx appears in. These three arguments are
|
give the context that the rtx appears in. These three arguments are
|
passed down to base_reg_class.
|
passed down to base_reg_class.
|
|
|
SCALE is twice the amount to multiply the cost by (it is twice so we
|
SCALE is twice the amount to multiply the cost by (it is twice so we
|
can represent half-cost adjustments). */
|
can represent half-cost adjustments). */
|
|
|
static void
|
static void
|
record_address_regs (enum machine_mode mode, rtx x, int context,
|
record_address_regs (enum machine_mode mode, rtx x, int context,
|
enum rtx_code outer_code, enum rtx_code index_code,
|
enum rtx_code outer_code, enum rtx_code index_code,
|
int scale)
|
int scale)
|
{
|
{
|
enum rtx_code code = GET_CODE (x);
|
enum rtx_code code = GET_CODE (x);
|
enum reg_class class;
|
enum reg_class class;
|
|
|
if (context == 1)
|
if (context == 1)
|
class = INDEX_REG_CLASS;
|
class = INDEX_REG_CLASS;
|
else
|
else
|
class = base_reg_class (mode, outer_code, index_code);
|
class = base_reg_class (mode, outer_code, index_code);
|
|
|
switch (code)
|
switch (code)
|
{
|
{
|
case CONST_INT:
|
case CONST_INT:
|
case CONST:
|
case CONST:
|
case CC0:
|
case CC0:
|
case PC:
|
case PC:
|
case SYMBOL_REF:
|
case SYMBOL_REF:
|
case LABEL_REF:
|
case LABEL_REF:
|
return;
|
return;
|
|
|
case PLUS:
|
case PLUS:
|
/* When we have an address that is a sum,
|
/* When we have an address that is a sum,
|
we must determine whether registers are "base" or "index" regs.
|
we must determine whether registers are "base" or "index" regs.
|
If there is a sum of two registers, we must choose one to be
|
If there is a sum of two registers, we must choose one to be
|
the "base". Luckily, we can use the REG_POINTER to make a good
|
the "base". Luckily, we can use the REG_POINTER to make a good
|
choice most of the time. We only need to do this on machines
|
choice most of the time. We only need to do this on machines
|
that can have two registers in an address and where the base
|
that can have two registers in an address and where the base
|
and index register classes are different.
|
and index register classes are different.
|
|
|
??? This code used to set REGNO_POINTER_FLAG in some cases, but
|
??? This code used to set REGNO_POINTER_FLAG in some cases, but
|
that seems bogus since it should only be set when we are sure
|
that seems bogus since it should only be set when we are sure
|
the register is being used as a pointer. */
|
the register is being used as a pointer. */
|
|
|
{
|
{
|
rtx arg0 = XEXP (x, 0);
|
rtx arg0 = XEXP (x, 0);
|
rtx arg1 = XEXP (x, 1);
|
rtx arg1 = XEXP (x, 1);
|
enum rtx_code code0 = GET_CODE (arg0);
|
enum rtx_code code0 = GET_CODE (arg0);
|
enum rtx_code code1 = GET_CODE (arg1);
|
enum rtx_code code1 = GET_CODE (arg1);
|
|
|
/* Look inside subregs. */
|
/* Look inside subregs. */
|
if (code0 == SUBREG)
|
if (code0 == SUBREG)
|
arg0 = SUBREG_REG (arg0), code0 = GET_CODE (arg0);
|
arg0 = SUBREG_REG (arg0), code0 = GET_CODE (arg0);
|
if (code1 == SUBREG)
|
if (code1 == SUBREG)
|
arg1 = SUBREG_REG (arg1), code1 = GET_CODE (arg1);
|
arg1 = SUBREG_REG (arg1), code1 = GET_CODE (arg1);
|
|
|
/* If this machine only allows one register per address, it must
|
/* If this machine only allows one register per address, it must
|
be in the first operand. */
|
be in the first operand. */
|
|
|
if (MAX_REGS_PER_ADDRESS == 1)
|
if (MAX_REGS_PER_ADDRESS == 1)
|
record_address_regs (mode, arg0, 0, PLUS, code1, scale);
|
record_address_regs (mode, arg0, 0, PLUS, code1, scale);
|
|
|
/* If index and base registers are the same on this machine, just
|
/* If index and base registers are the same on this machine, just
|
record registers in any non-constant operands. We assume here,
|
record registers in any non-constant operands. We assume here,
|
as well as in the tests below, that all addresses are in
|
as well as in the tests below, that all addresses are in
|
canonical form. */
|
canonical form. */
|
|
|
else if (INDEX_REG_CLASS == base_reg_class (VOIDmode, PLUS, SCRATCH))
|
else if (INDEX_REG_CLASS == base_reg_class (VOIDmode, PLUS, SCRATCH))
|
{
|
{
|
record_address_regs (mode, arg0, context, PLUS, code1, scale);
|
record_address_regs (mode, arg0, context, PLUS, code1, scale);
|
if (! CONSTANT_P (arg1))
|
if (! CONSTANT_P (arg1))
|
record_address_regs (mode, arg1, context, PLUS, code0, scale);
|
record_address_regs (mode, arg1, context, PLUS, code0, scale);
|
}
|
}
|
|
|
/* If the second operand is a constant integer, it doesn't change
|
/* If the second operand is a constant integer, it doesn't change
|
what class the first operand must be. */
|
what class the first operand must be. */
|
|
|
else if (code1 == CONST_INT || code1 == CONST_DOUBLE)
|
else if (code1 == CONST_INT || code1 == CONST_DOUBLE)
|
record_address_regs (mode, arg0, context, PLUS, code1, scale);
|
record_address_regs (mode, arg0, context, PLUS, code1, scale);
|
|
|
/* If the second operand is a symbolic constant, the first operand
|
/* If the second operand is a symbolic constant, the first operand
|
must be an index register. */
|
must be an index register. */
|
|
|
else if (code1 == SYMBOL_REF || code1 == CONST || code1 == LABEL_REF)
|
else if (code1 == SYMBOL_REF || code1 == CONST || code1 == LABEL_REF)
|
record_address_regs (mode, arg0, 1, PLUS, code1, scale);
|
record_address_regs (mode, arg0, 1, PLUS, code1, scale);
|
|
|
/* If both operands are registers but one is already a hard register
|
/* If both operands are registers but one is already a hard register
|
of index or reg-base class, give the other the class that the
|
of index or reg-base class, give the other the class that the
|
hard register is not. */
|
hard register is not. */
|
|
|
else if (code0 == REG && code1 == REG
|
else if (code0 == REG && code1 == REG
|
&& REGNO (arg0) < FIRST_PSEUDO_REGISTER
|
&& REGNO (arg0) < FIRST_PSEUDO_REGISTER
|
&& (ok_for_base_p_nonstrict (arg0, mode, PLUS, REG)
|
&& (ok_for_base_p_nonstrict (arg0, mode, PLUS, REG)
|
|| ok_for_index_p_nonstrict (arg0)))
|
|| ok_for_index_p_nonstrict (arg0)))
|
record_address_regs (mode, arg1,
|
record_address_regs (mode, arg1,
|
ok_for_base_p_nonstrict (arg0, mode, PLUS, REG)
|
ok_for_base_p_nonstrict (arg0, mode, PLUS, REG)
|
? 1 : 0,
|
? 1 : 0,
|
PLUS, REG, scale);
|
PLUS, REG, scale);
|
else if (code0 == REG && code1 == REG
|
else if (code0 == REG && code1 == REG
|
&& REGNO (arg1) < FIRST_PSEUDO_REGISTER
|
&& REGNO (arg1) < FIRST_PSEUDO_REGISTER
|
&& (ok_for_base_p_nonstrict (arg1, mode, PLUS, REG)
|
&& (ok_for_base_p_nonstrict (arg1, mode, PLUS, REG)
|
|| ok_for_index_p_nonstrict (arg1)))
|
|| ok_for_index_p_nonstrict (arg1)))
|
record_address_regs (mode, arg0,
|
record_address_regs (mode, arg0,
|
ok_for_base_p_nonstrict (arg1, mode, PLUS, REG)
|
ok_for_base_p_nonstrict (arg1, mode, PLUS, REG)
|
? 1 : 0,
|
? 1 : 0,
|
PLUS, REG, scale);
|
PLUS, REG, scale);
|
|
|
/* If one operand is known to be a pointer, it must be the base
|
/* If one operand is known to be a pointer, it must be the base
|
with the other operand the index. Likewise if the other operand
|
with the other operand the index. Likewise if the other operand
|
is a MULT. */
|
is a MULT. */
|
|
|
else if ((code0 == REG && REG_POINTER (arg0))
|
else if ((code0 == REG && REG_POINTER (arg0))
|
|| code1 == MULT)
|
|| code1 == MULT)
|
{
|
{
|
record_address_regs (mode, arg0, 0, PLUS, code1, scale);
|
record_address_regs (mode, arg0, 0, PLUS, code1, scale);
|
record_address_regs (mode, arg1, 1, PLUS, code0, scale);
|
record_address_regs (mode, arg1, 1, PLUS, code0, scale);
|
}
|
}
|
else if ((code1 == REG && REG_POINTER (arg1))
|
else if ((code1 == REG && REG_POINTER (arg1))
|
|| code0 == MULT)
|
|| code0 == MULT)
|
{
|
{
|
record_address_regs (mode, arg0, 1, PLUS, code1, scale);
|
record_address_regs (mode, arg0, 1, PLUS, code1, scale);
|
record_address_regs (mode, arg1, 0, PLUS, code0, scale);
|
record_address_regs (mode, arg1, 0, PLUS, code0, scale);
|
}
|
}
|
|
|
/* Otherwise, count equal chances that each might be a base
|
/* Otherwise, count equal chances that each might be a base
|
or index register. This case should be rare. */
|
or index register. This case should be rare. */
|
|
|
else
|
else
|
{
|
{
|
record_address_regs (mode, arg0, 0, PLUS, code1, scale / 2);
|
record_address_regs (mode, arg0, 0, PLUS, code1, scale / 2);
|
record_address_regs (mode, arg0, 1, PLUS, code1, scale / 2);
|
record_address_regs (mode, arg0, 1, PLUS, code1, scale / 2);
|
record_address_regs (mode, arg1, 0, PLUS, code0, scale / 2);
|
record_address_regs (mode, arg1, 0, PLUS, code0, scale / 2);
|
record_address_regs (mode, arg1, 1, PLUS, code0, scale / 2);
|
record_address_regs (mode, arg1, 1, PLUS, code0, scale / 2);
|
}
|
}
|
}
|
}
|
break;
|
break;
|
|
|
/* Double the importance of a pseudo register that is incremented
|
/* Double the importance of a pseudo register that is incremented
|
or decremented, since it would take two extra insns
|
or decremented, since it would take two extra insns
|
if it ends up in the wrong place. */
|
if it ends up in the wrong place. */
|
case POST_MODIFY:
|
case POST_MODIFY:
|
case PRE_MODIFY:
|
case PRE_MODIFY:
|
record_address_regs (mode, XEXP (x, 0), 0, code,
|
record_address_regs (mode, XEXP (x, 0), 0, code,
|
GET_CODE (XEXP (XEXP (x, 1), 1)), 2 * scale);
|
GET_CODE (XEXP (XEXP (x, 1), 1)), 2 * scale);
|
if (REG_P (XEXP (XEXP (x, 1), 1)))
|
if (REG_P (XEXP (XEXP (x, 1), 1)))
|
record_address_regs (mode, XEXP (XEXP (x, 1), 1), 1, code, REG,
|
record_address_regs (mode, XEXP (XEXP (x, 1), 1), 1, code, REG,
|
2 * scale);
|
2 * scale);
|
break;
|
break;
|
|
|
case POST_INC:
|
case POST_INC:
|
case PRE_INC:
|
case PRE_INC:
|
case POST_DEC:
|
case POST_DEC:
|
case PRE_DEC:
|
case PRE_DEC:
|
/* Double the importance of a pseudo register that is incremented
|
/* Double the importance of a pseudo register that is incremented
|
or decremented, since it would take two extra insns
|
or decremented, since it would take two extra insns
|
if it ends up in the wrong place. If the operand is a pseudo,
|
if it ends up in the wrong place. If the operand is a pseudo,
|
show it is being used in an INC_DEC context. */
|
show it is being used in an INC_DEC context. */
|
|
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
if (REG_P (XEXP (x, 0))
|
if (REG_P (XEXP (x, 0))
|
&& REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER)
|
&& REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER)
|
in_inc_dec[REGNO (XEXP (x, 0))] = 1;
|
in_inc_dec[REGNO (XEXP (x, 0))] = 1;
|
#endif
|
#endif
|
|
|
record_address_regs (mode, XEXP (x, 0), 0, code, SCRATCH, 2 * scale);
|
record_address_regs (mode, XEXP (x, 0), 0, code, SCRATCH, 2 * scale);
|
break;
|
break;
|
|
|
case REG:
|
case REG:
|
{
|
{
|
struct costs *pp = &costs[REGNO (x)];
|
struct costs *pp = &costs[REGNO (x)];
|
int i;
|
int i;
|
|
|
pp->mem_cost += (MEMORY_MOVE_COST (Pmode, class, 1) * scale) / 2;
|
pp->mem_cost += (MEMORY_MOVE_COST (Pmode, class, 1) * scale) / 2;
|
|
|
for (i = 0; i < N_REG_CLASSES; i++)
|
for (i = 0; i < N_REG_CLASSES; i++)
|
pp->cost[i] += (may_move_in_cost[Pmode][i][(int) class] * scale) / 2;
|
pp->cost[i] += (may_move_in_cost[Pmode][i][(int) class] * scale) / 2;
|
}
|
}
|
break;
|
break;
|
|
|
default:
|
default:
|
{
|
{
|
const char *fmt = GET_RTX_FORMAT (code);
|
const char *fmt = GET_RTX_FORMAT (code);
|
int i;
|
int i;
|
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
|
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
|
if (fmt[i] == 'e')
|
if (fmt[i] == 'e')
|
record_address_regs (mode, XEXP (x, i), context, code, SCRATCH,
|
record_address_regs (mode, XEXP (x, i), context, code, SCRATCH,
|
scale);
|
scale);
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
|
|
/* Return 1 if REG is valid as an auto-increment memory reference
|
/* Return 1 if REG is valid as an auto-increment memory reference
|
to an object of MODE. */
|
to an object of MODE. */
|
|
|
static int
|
static int
|
auto_inc_dec_reg_p (rtx reg, enum machine_mode mode)
|
auto_inc_dec_reg_p (rtx reg, enum machine_mode mode)
|
{
|
{
|
if (HAVE_POST_INCREMENT
|
if (HAVE_POST_INCREMENT
|
&& memory_address_p (mode, gen_rtx_POST_INC (Pmode, reg)))
|
&& memory_address_p (mode, gen_rtx_POST_INC (Pmode, reg)))
|
return 1;
|
return 1;
|
|
|
if (HAVE_POST_DECREMENT
|
if (HAVE_POST_DECREMENT
|
&& memory_address_p (mode, gen_rtx_POST_DEC (Pmode, reg)))
|
&& memory_address_p (mode, gen_rtx_POST_DEC (Pmode, reg)))
|
return 1;
|
return 1;
|
|
|
if (HAVE_PRE_INCREMENT
|
if (HAVE_PRE_INCREMENT
|
&& memory_address_p (mode, gen_rtx_PRE_INC (Pmode, reg)))
|
&& memory_address_p (mode, gen_rtx_PRE_INC (Pmode, reg)))
|
return 1;
|
return 1;
|
|
|
if (HAVE_PRE_DECREMENT
|
if (HAVE_PRE_DECREMENT
|
&& memory_address_p (mode, gen_rtx_PRE_DEC (Pmode, reg)))
|
&& memory_address_p (mode, gen_rtx_PRE_DEC (Pmode, reg)))
|
return 1;
|
return 1;
|
|
|
return 0;
|
return 0;
|
}
|
}
|
#endif
|
#endif
|
|
|
static short *renumber;
|
static short *renumber;
|
static size_t regno_allocated;
|
static size_t regno_allocated;
|
static unsigned int reg_n_max;
|
static unsigned int reg_n_max;
|
|
|
/* Allocate enough space to hold NUM_REGS registers for the tables used for
|
/* Allocate enough space to hold NUM_REGS registers for the tables used for
|
reg_scan and flow_analysis that are indexed by the register number. If
|
reg_scan and flow_analysis that are indexed by the register number. If
|
NEW_P is nonzero, initialize all of the registers, otherwise only
|
NEW_P is nonzero, initialize all of the registers, otherwise only
|
initialize the new registers allocated. The same table is kept from
|
initialize the new registers allocated. The same table is kept from
|
function to function, only reallocating it when we need more room. If
|
function to function, only reallocating it when we need more room. If
|
RENUMBER_P is nonzero, allocate the reg_renumber array also. */
|
RENUMBER_P is nonzero, allocate the reg_renumber array also. */
|
|
|
void
|
void
|
allocate_reg_info (size_t num_regs, int new_p, int renumber_p)
|
allocate_reg_info (size_t num_regs, int new_p, int renumber_p)
|
{
|
{
|
size_t size_info;
|
size_t size_info;
|
size_t size_renumber;
|
size_t size_renumber;
|
size_t min = (new_p) ? 0 : reg_n_max;
|
size_t min = (new_p) ? 0 : reg_n_max;
|
struct reg_info_data *reg_data;
|
struct reg_info_data *reg_data;
|
|
|
if (num_regs > regno_allocated)
|
if (num_regs > regno_allocated)
|
{
|
{
|
size_t old_allocated = regno_allocated;
|
size_t old_allocated = regno_allocated;
|
|
|
regno_allocated = num_regs + (num_regs / 20); /* Add some slop space. */
|
regno_allocated = num_regs + (num_regs / 20); /* Add some slop space. */
|
size_renumber = regno_allocated * sizeof (short);
|
size_renumber = regno_allocated * sizeof (short);
|
|
|
if (!reg_n_info)
|
if (!reg_n_info)
|
{
|
{
|
reg_n_info = VEC_alloc (reg_info_p, heap, regno_allocated);
|
reg_n_info = VEC_alloc (reg_info_p, heap, regno_allocated);
|
VEC_safe_grow (reg_info_p, heap, reg_n_info, regno_allocated);
|
VEC_safe_grow (reg_info_p, heap, reg_n_info, regno_allocated);
|
memset (VEC_address (reg_info_p, reg_n_info), 0,
|
memset (VEC_address (reg_info_p, reg_n_info), 0,
|
sizeof (reg_info_p) * regno_allocated);
|
sizeof (reg_info_p) * regno_allocated);
|
renumber = xmalloc (size_renumber);
|
renumber = xmalloc (size_renumber);
|
reg_pref_buffer = XNEWVEC (struct reg_pref, regno_allocated);
|
reg_pref_buffer = XNEWVEC (struct reg_pref, regno_allocated);
|
}
|
}
|
else
|
else
|
{
|
{
|
size_t old_length = VEC_length (reg_info_p, reg_n_info);
|
size_t old_length = VEC_length (reg_info_p, reg_n_info);
|
if (old_length < regno_allocated)
|
if (old_length < regno_allocated)
|
{
|
{
|
reg_info_p *addr;
|
reg_info_p *addr;
|
VEC_safe_grow (reg_info_p, heap, reg_n_info, regno_allocated);
|
VEC_safe_grow (reg_info_p, heap, reg_n_info, regno_allocated);
|
addr = VEC_address (reg_info_p, reg_n_info);
|
addr = VEC_address (reg_info_p, reg_n_info);
|
memset (&addr[old_length], 0,
|
memset (&addr[old_length], 0,
|
sizeof (reg_info_p) * (regno_allocated - old_length));
|
sizeof (reg_info_p) * (regno_allocated - old_length));
|
}
|
}
|
else if (regno_allocated < old_length)
|
else if (regno_allocated < old_length)
|
{
|
{
|
VEC_truncate (reg_info_p, reg_n_info, regno_allocated);
|
VEC_truncate (reg_info_p, reg_n_info, regno_allocated);
|
}
|
}
|
|
|
if (new_p) /* If we're zapping everything, no need to realloc. */
|
if (new_p) /* If we're zapping everything, no need to realloc. */
|
{
|
{
|
free ((char *) renumber);
|
free ((char *) renumber);
|
free ((char *) reg_pref);
|
free ((char *) reg_pref);
|
renumber = xmalloc (size_renumber);
|
renumber = xmalloc (size_renumber);
|
reg_pref_buffer = XNEWVEC (struct reg_pref, regno_allocated);
|
reg_pref_buffer = XNEWVEC (struct reg_pref, regno_allocated);
|
}
|
}
|
|
|
else
|
else
|
{
|
{
|
renumber = xrealloc (renumber, size_renumber);
|
renumber = xrealloc (renumber, size_renumber);
|
reg_pref_buffer = (struct reg_pref *) xrealloc (reg_pref_buffer,
|
reg_pref_buffer = (struct reg_pref *) xrealloc (reg_pref_buffer,
|
regno_allocated
|
regno_allocated
|
* sizeof (struct reg_pref));
|
* sizeof (struct reg_pref));
|
}
|
}
|
}
|
}
|
|
|
size_info = (regno_allocated - old_allocated) * sizeof (reg_info)
|
size_info = (regno_allocated - old_allocated) * sizeof (reg_info)
|
+ sizeof (struct reg_info_data) - sizeof (reg_info);
|
+ sizeof (struct reg_info_data) - sizeof (reg_info);
|
reg_data = xcalloc (size_info, 1);
|
reg_data = xcalloc (size_info, 1);
|
reg_data->min_index = old_allocated;
|
reg_data->min_index = old_allocated;
|
reg_data->max_index = regno_allocated - 1;
|
reg_data->max_index = regno_allocated - 1;
|
reg_data->next = reg_info_head;
|
reg_data->next = reg_info_head;
|
reg_info_head = reg_data;
|
reg_info_head = reg_data;
|
}
|
}
|
|
|
reg_n_max = num_regs;
|
reg_n_max = num_regs;
|
if (min < num_regs)
|
if (min < num_regs)
|
{
|
{
|
/* Loop through each of the segments allocated for the actual
|
/* Loop through each of the segments allocated for the actual
|
reg_info pages, and set up the pointers, zero the pages, etc. */
|
reg_info pages, and set up the pointers, zero the pages, etc. */
|
for (reg_data = reg_info_head;
|
for (reg_data = reg_info_head;
|
reg_data && reg_data->max_index >= min;
|
reg_data && reg_data->max_index >= min;
|
reg_data = reg_data->next)
|
reg_data = reg_data->next)
|
{
|
{
|
size_t min_index = reg_data->min_index;
|
size_t min_index = reg_data->min_index;
|
size_t max_index = reg_data->max_index;
|
size_t max_index = reg_data->max_index;
|
size_t max = MIN (max_index, num_regs);
|
size_t max = MIN (max_index, num_regs);
|
size_t local_min = min - min_index;
|
size_t local_min = min - min_index;
|
size_t i;
|
size_t i;
|
|
|
if (reg_data->min_index > num_regs)
|
if (reg_data->min_index > num_regs)
|
continue;
|
continue;
|
|
|
if (min < min_index)
|
if (min < min_index)
|
local_min = 0;
|
local_min = 0;
|
if (!reg_data->used_p) /* page just allocated with calloc */
|
if (!reg_data->used_p) /* page just allocated with calloc */
|
reg_data->used_p = 1; /* no need to zero */
|
reg_data->used_p = 1; /* no need to zero */
|
else
|
else
|
memset (®_data->data[local_min], 0,
|
memset (®_data->data[local_min], 0,
|
sizeof (reg_info) * (max - min_index - local_min + 1));
|
sizeof (reg_info) * (max - min_index - local_min + 1));
|
|
|
for (i = min_index+local_min; i <= max; i++)
|
for (i = min_index+local_min; i <= max; i++)
|
{
|
{
|
VEC_replace (reg_info_p, reg_n_info, i,
|
VEC_replace (reg_info_p, reg_n_info, i,
|
®_data->data[i-min_index]);
|
®_data->data[i-min_index]);
|
REG_BASIC_BLOCK (i) = REG_BLOCK_UNKNOWN;
|
REG_BASIC_BLOCK (i) = REG_BLOCK_UNKNOWN;
|
renumber[i] = -1;
|
renumber[i] = -1;
|
reg_pref_buffer[i].prefclass = (char) NO_REGS;
|
reg_pref_buffer[i].prefclass = (char) NO_REGS;
|
reg_pref_buffer[i].altclass = (char) NO_REGS;
|
reg_pref_buffer[i].altclass = (char) NO_REGS;
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
/* If {pref,alt}class have already been allocated, update the pointers to
|
/* If {pref,alt}class have already been allocated, update the pointers to
|
the newly realloced ones. */
|
the newly realloced ones. */
|
if (reg_pref)
|
if (reg_pref)
|
reg_pref = reg_pref_buffer;
|
reg_pref = reg_pref_buffer;
|
|
|
if (renumber_p)
|
if (renumber_p)
|
reg_renumber = renumber;
|
reg_renumber = renumber;
|
}
|
}
|
|
|
/* Free up the space allocated by allocate_reg_info. */
|
/* Free up the space allocated by allocate_reg_info. */
|
void
|
void
|
free_reg_info (void)
|
free_reg_info (void)
|
{
|
{
|
if (reg_n_info)
|
if (reg_n_info)
|
{
|
{
|
struct reg_info_data *reg_data;
|
struct reg_info_data *reg_data;
|
struct reg_info_data *reg_next;
|
struct reg_info_data *reg_next;
|
|
|
VEC_free (reg_info_p, heap, reg_n_info);
|
VEC_free (reg_info_p, heap, reg_n_info);
|
for (reg_data = reg_info_head; reg_data; reg_data = reg_next)
|
for (reg_data = reg_info_head; reg_data; reg_data = reg_next)
|
{
|
{
|
reg_next = reg_data->next;
|
reg_next = reg_data->next;
|
free ((char *) reg_data);
|
free ((char *) reg_data);
|
}
|
}
|
|
|
free (reg_pref_buffer);
|
free (reg_pref_buffer);
|
reg_pref_buffer = (struct reg_pref *) 0;
|
reg_pref_buffer = (struct reg_pref *) 0;
|
reg_info_head = (struct reg_info_data *) 0;
|
reg_info_head = (struct reg_info_data *) 0;
|
renumber = (short *) 0;
|
renumber = (short *) 0;
|
}
|
}
|
regno_allocated = 0;
|
regno_allocated = 0;
|
reg_n_max = 0;
|
reg_n_max = 0;
|
}
|
}
|
|
|
/* This is the `regscan' pass of the compiler, run just before cse
|
/* This is the `regscan' pass of the compiler, run just before cse
|
and again just before loop.
|
and again just before loop.
|
|
|
It finds the first and last use of each pseudo-register
|
It finds the first and last use of each pseudo-register
|
and records them in the vectors regno_first_uid, regno_last_uid
|
and records them in the vectors regno_first_uid, regno_last_uid
|
and counts the number of sets in the vector reg_n_sets.
|
and counts the number of sets in the vector reg_n_sets.
|
|
|
REPEAT is nonzero the second time this is called. */
|
REPEAT is nonzero the second time this is called. */
|
|
|
/* Maximum number of parallel sets and clobbers in any insn in this fn.
|
/* Maximum number of parallel sets and clobbers in any insn in this fn.
|
Always at least 3, since the combiner could put that many together
|
Always at least 3, since the combiner could put that many together
|
and we want this to remain correct for all the remaining passes.
|
and we want this to remain correct for all the remaining passes.
|
This corresponds to the maximum number of times note_stores will call
|
This corresponds to the maximum number of times note_stores will call
|
a function for any insn. */
|
a function for any insn. */
|
|
|
int max_parallel;
|
int max_parallel;
|
|
|
/* Used as a temporary to record the largest number of registers in
|
/* Used as a temporary to record the largest number of registers in
|
PARALLEL in a SET_DEST. This is added to max_parallel. */
|
PARALLEL in a SET_DEST. This is added to max_parallel. */
|
|
|
static int max_set_parallel;
|
static int max_set_parallel;
|
|
|
void
|
void
|
reg_scan (rtx f, unsigned int nregs)
|
reg_scan (rtx f, unsigned int nregs)
|
{
|
{
|
rtx insn;
|
rtx insn;
|
|
|
timevar_push (TV_REG_SCAN);
|
timevar_push (TV_REG_SCAN);
|
|
|
allocate_reg_info (nregs, TRUE, FALSE);
|
allocate_reg_info (nregs, TRUE, FALSE);
|
max_parallel = 3;
|
max_parallel = 3;
|
max_set_parallel = 0;
|
max_set_parallel = 0;
|
|
|
for (insn = f; insn; insn = NEXT_INSN (insn))
|
for (insn = f; insn; insn = NEXT_INSN (insn))
|
if (INSN_P (insn))
|
if (INSN_P (insn))
|
{
|
{
|
rtx pat = PATTERN (insn);
|
rtx pat = PATTERN (insn);
|
if (GET_CODE (pat) == PARALLEL
|
if (GET_CODE (pat) == PARALLEL
|
&& XVECLEN (pat, 0) > max_parallel)
|
&& XVECLEN (pat, 0) > max_parallel)
|
max_parallel = XVECLEN (pat, 0);
|
max_parallel = XVECLEN (pat, 0);
|
reg_scan_mark_refs (pat, insn, 0);
|
reg_scan_mark_refs (pat, insn, 0);
|
|
|
if (REG_NOTES (insn))
|
if (REG_NOTES (insn))
|
reg_scan_mark_refs (REG_NOTES (insn), insn, 1);
|
reg_scan_mark_refs (REG_NOTES (insn), insn, 1);
|
}
|
}
|
|
|
max_parallel += max_set_parallel;
|
max_parallel += max_set_parallel;
|
|
|
timevar_pop (TV_REG_SCAN);
|
timevar_pop (TV_REG_SCAN);
|
}
|
}
|
|
|
/* X is the expression to scan. INSN is the insn it appears in.
|
/* X is the expression to scan. INSN is the insn it appears in.
|
NOTE_FLAG is nonzero if X is from INSN's notes rather than its body. */
|
NOTE_FLAG is nonzero if X is from INSN's notes rather than its body. */
|
|
|
static void
|
static void
|
reg_scan_mark_refs (rtx x, rtx insn, int note_flag)
|
reg_scan_mark_refs (rtx x, rtx insn, int note_flag)
|
{
|
{
|
enum rtx_code code;
|
enum rtx_code code;
|
rtx dest;
|
rtx dest;
|
rtx note;
|
rtx note;
|
|
|
if (!x)
|
if (!x)
|
return;
|
return;
|
code = GET_CODE (x);
|
code = GET_CODE (x);
|
switch (code)
|
switch (code)
|
{
|
{
|
case CONST:
|
case CONST:
|
case CONST_INT:
|
case CONST_INT:
|
case CONST_DOUBLE:
|
case CONST_DOUBLE:
|
case CONST_VECTOR:
|
case CONST_VECTOR:
|
case CC0:
|
case CC0:
|
case PC:
|
case PC:
|
case SYMBOL_REF:
|
case SYMBOL_REF:
|
case LABEL_REF:
|
case LABEL_REF:
|
case ADDR_VEC:
|
case ADDR_VEC:
|
case ADDR_DIFF_VEC:
|
case ADDR_DIFF_VEC:
|
return;
|
return;
|
|
|
case REG:
|
case REG:
|
{
|
{
|
unsigned int regno = REGNO (x);
|
unsigned int regno = REGNO (x);
|
|
|
if (!note_flag)
|
if (!note_flag)
|
REGNO_LAST_UID (regno) = INSN_UID (insn);
|
REGNO_LAST_UID (regno) = INSN_UID (insn);
|
if (REGNO_FIRST_UID (regno) == 0)
|
if (REGNO_FIRST_UID (regno) == 0)
|
REGNO_FIRST_UID (regno) = INSN_UID (insn);
|
REGNO_FIRST_UID (regno) = INSN_UID (insn);
|
}
|
}
|
break;
|
break;
|
|
|
case EXPR_LIST:
|
case EXPR_LIST:
|
if (XEXP (x, 0))
|
if (XEXP (x, 0))
|
reg_scan_mark_refs (XEXP (x, 0), insn, note_flag);
|
reg_scan_mark_refs (XEXP (x, 0), insn, note_flag);
|
if (XEXP (x, 1))
|
if (XEXP (x, 1))
|
reg_scan_mark_refs (XEXP (x, 1), insn, note_flag);
|
reg_scan_mark_refs (XEXP (x, 1), insn, note_flag);
|
break;
|
break;
|
|
|
case INSN_LIST:
|
case INSN_LIST:
|
if (XEXP (x, 1))
|
if (XEXP (x, 1))
|
reg_scan_mark_refs (XEXP (x, 1), insn, note_flag);
|
reg_scan_mark_refs (XEXP (x, 1), insn, note_flag);
|
break;
|
break;
|
|
|
case CLOBBER:
|
case CLOBBER:
|
{
|
{
|
rtx reg = XEXP (x, 0);
|
rtx reg = XEXP (x, 0);
|
if (REG_P (reg))
|
if (REG_P (reg))
|
{
|
{
|
REG_N_SETS (REGNO (reg))++;
|
REG_N_SETS (REGNO (reg))++;
|
REG_N_REFS (REGNO (reg))++;
|
REG_N_REFS (REGNO (reg))++;
|
}
|
}
|
else if (MEM_P (reg))
|
else if (MEM_P (reg))
|
reg_scan_mark_refs (XEXP (reg, 0), insn, note_flag);
|
reg_scan_mark_refs (XEXP (reg, 0), insn, note_flag);
|
}
|
}
|
break;
|
break;
|
|
|
case SET:
|
case SET:
|
/* Count a set of the destination if it is a register. */
|
/* Count a set of the destination if it is a register. */
|
for (dest = SET_DEST (x);
|
for (dest = SET_DEST (x);
|
GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
|
GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
|
|| GET_CODE (dest) == ZERO_EXTEND;
|
|| GET_CODE (dest) == ZERO_EXTEND;
|
dest = XEXP (dest, 0))
|
dest = XEXP (dest, 0))
|
;
|
;
|
|
|
/* For a PARALLEL, record the number of things (less the usual one for a
|
/* For a PARALLEL, record the number of things (less the usual one for a
|
SET) that are set. */
|
SET) that are set. */
|
if (GET_CODE (dest) == PARALLEL)
|
if (GET_CODE (dest) == PARALLEL)
|
max_set_parallel = MAX (max_set_parallel, XVECLEN (dest, 0) - 1);
|
max_set_parallel = MAX (max_set_parallel, XVECLEN (dest, 0) - 1);
|
|
|
if (REG_P (dest))
|
if (REG_P (dest))
|
{
|
{
|
REG_N_SETS (REGNO (dest))++;
|
REG_N_SETS (REGNO (dest))++;
|
REG_N_REFS (REGNO (dest))++;
|
REG_N_REFS (REGNO (dest))++;
|
}
|
}
|
|
|
/* If this is setting a pseudo from another pseudo or the sum of a
|
/* If this is setting a pseudo from another pseudo or the sum of a
|
pseudo and a constant integer and the other pseudo is known to be
|
pseudo and a constant integer and the other pseudo is known to be
|
a pointer, set the destination to be a pointer as well.
|
a pointer, set the destination to be a pointer as well.
|
|
|
Likewise if it is setting the destination from an address or from a
|
Likewise if it is setting the destination from an address or from a
|
value equivalent to an address or to the sum of an address and
|
value equivalent to an address or to the sum of an address and
|
something else.
|
something else.
|
|
|
But don't do any of this if the pseudo corresponds to a user
|
But don't do any of this if the pseudo corresponds to a user
|
variable since it should have already been set as a pointer based
|
variable since it should have already been set as a pointer based
|
on the type. */
|
on the type. */
|
|
|
if (REG_P (SET_DEST (x))
|
if (REG_P (SET_DEST (x))
|
&& REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
|
&& REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
|
/* If the destination pseudo is set more than once, then other
|
/* If the destination pseudo is set more than once, then other
|
sets might not be to a pointer value (consider access to a
|
sets might not be to a pointer value (consider access to a
|
union in two threads of control in the presence of global
|
union in two threads of control in the presence of global
|
optimizations). So only set REG_POINTER on the destination
|
optimizations). So only set REG_POINTER on the destination
|
pseudo if this is the only set of that pseudo. */
|
pseudo if this is the only set of that pseudo. */
|
&& REG_N_SETS (REGNO (SET_DEST (x))) == 1
|
&& REG_N_SETS (REGNO (SET_DEST (x))) == 1
|
&& ! REG_USERVAR_P (SET_DEST (x))
|
&& ! REG_USERVAR_P (SET_DEST (x))
|
&& ! REG_POINTER (SET_DEST (x))
|
&& ! REG_POINTER (SET_DEST (x))
|
&& ((REG_P (SET_SRC (x))
|
&& ((REG_P (SET_SRC (x))
|
&& REG_POINTER (SET_SRC (x)))
|
&& REG_POINTER (SET_SRC (x)))
|
|| ((GET_CODE (SET_SRC (x)) == PLUS
|
|| ((GET_CODE (SET_SRC (x)) == PLUS
|
|| GET_CODE (SET_SRC (x)) == LO_SUM)
|
|| GET_CODE (SET_SRC (x)) == LO_SUM)
|
&& GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT
|
&& GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT
|
&& REG_P (XEXP (SET_SRC (x), 0))
|
&& REG_P (XEXP (SET_SRC (x), 0))
|
&& REG_POINTER (XEXP (SET_SRC (x), 0)))
|
&& REG_POINTER (XEXP (SET_SRC (x), 0)))
|
|| GET_CODE (SET_SRC (x)) == CONST
|
|| GET_CODE (SET_SRC (x)) == CONST
|
|| GET_CODE (SET_SRC (x)) == SYMBOL_REF
|
|| GET_CODE (SET_SRC (x)) == SYMBOL_REF
|
|| GET_CODE (SET_SRC (x)) == LABEL_REF
|
|| GET_CODE (SET_SRC (x)) == LABEL_REF
|
|| (GET_CODE (SET_SRC (x)) == HIGH
|
|| (GET_CODE (SET_SRC (x)) == HIGH
|
&& (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
|
&& (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
|
|| GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
|
|| GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
|
|| GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
|
|| GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
|
|| ((GET_CODE (SET_SRC (x)) == PLUS
|
|| ((GET_CODE (SET_SRC (x)) == PLUS
|
|| GET_CODE (SET_SRC (x)) == LO_SUM)
|
|| GET_CODE (SET_SRC (x)) == LO_SUM)
|
&& (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
|
&& (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
|
|| GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
|
|| GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
|
|| GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
|
|| GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
|
|| ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
|
|| ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
|
&& (GET_CODE (XEXP (note, 0)) == CONST
|
&& (GET_CODE (XEXP (note, 0)) == CONST
|
|| GET_CODE (XEXP (note, 0)) == SYMBOL_REF
|
|| GET_CODE (XEXP (note, 0)) == SYMBOL_REF
|
|| GET_CODE (XEXP (note, 0)) == LABEL_REF))))
|
|| GET_CODE (XEXP (note, 0)) == LABEL_REF))))
|
REG_POINTER (SET_DEST (x)) = 1;
|
REG_POINTER (SET_DEST (x)) = 1;
|
|
|
/* If this is setting a register from a register or from a simple
|
/* If this is setting a register from a register or from a simple
|
conversion of a register, propagate REG_EXPR. */
|
conversion of a register, propagate REG_EXPR. */
|
if (REG_P (dest))
|
if (REG_P (dest))
|
{
|
{
|
rtx src = SET_SRC (x);
|
rtx src = SET_SRC (x);
|
|
|
while (GET_CODE (src) == SIGN_EXTEND
|
while (GET_CODE (src) == SIGN_EXTEND
|
|| GET_CODE (src) == ZERO_EXTEND
|
|| GET_CODE (src) == ZERO_EXTEND
|
|| GET_CODE (src) == TRUNCATE
|
|| GET_CODE (src) == TRUNCATE
|
|| (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)))
|
|| (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)))
|
src = XEXP (src, 0);
|
src = XEXP (src, 0);
|
|
|
if (!REG_ATTRS (dest) && REG_P (src))
|
if (!REG_ATTRS (dest) && REG_P (src))
|
REG_ATTRS (dest) = REG_ATTRS (src);
|
REG_ATTRS (dest) = REG_ATTRS (src);
|
if (!REG_ATTRS (dest) && MEM_P (src))
|
if (!REG_ATTRS (dest) && MEM_P (src))
|
set_reg_attrs_from_mem (dest, src);
|
set_reg_attrs_from_mem (dest, src);
|
}
|
}
|
|
|
/* ... fall through ... */
|
/* ... fall through ... */
|
|
|
default:
|
default:
|
{
|
{
|
const char *fmt = GET_RTX_FORMAT (code);
|
const char *fmt = GET_RTX_FORMAT (code);
|
int i;
|
int i;
|
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
|
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
|
{
|
{
|
if (fmt[i] == 'e')
|
if (fmt[i] == 'e')
|
reg_scan_mark_refs (XEXP (x, i), insn, note_flag);
|
reg_scan_mark_refs (XEXP (x, i), insn, note_flag);
|
else if (fmt[i] == 'E' && XVEC (x, i) != 0)
|
else if (fmt[i] == 'E' && XVEC (x, i) != 0)
|
{
|
{
|
int j;
|
int j;
|
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
|
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
|
reg_scan_mark_refs (XVECEXP (x, i, j), insn, note_flag);
|
reg_scan_mark_refs (XVECEXP (x, i, j), insn, note_flag);
|
}
|
}
|
}
|
}
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
/* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
|
/* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
|
is also in C2. */
|
is also in C2. */
|
|
|
int
|
int
|
reg_class_subset_p (enum reg_class c1, enum reg_class c2)
|
reg_class_subset_p (enum reg_class c1, enum reg_class c2)
|
{
|
{
|
if (c1 == c2) return 1;
|
if (c1 == c2) return 1;
|
|
|
if (c2 == ALL_REGS)
|
if (c2 == ALL_REGS)
|
win:
|
win:
|
return 1;
|
return 1;
|
GO_IF_HARD_REG_SUBSET (reg_class_contents[(int) c1],
|
GO_IF_HARD_REG_SUBSET (reg_class_contents[(int) c1],
|
reg_class_contents[(int) c2],
|
reg_class_contents[(int) c2],
|
win);
|
win);
|
return 0;
|
return 0;
|
}
|
}
|
|
|
/* Return nonzero if there is a register that is in both C1 and C2. */
|
/* Return nonzero if there is a register that is in both C1 and C2. */
|
|
|
int
|
int
|
reg_classes_intersect_p (enum reg_class c1, enum reg_class c2)
|
reg_classes_intersect_p (enum reg_class c1, enum reg_class c2)
|
{
|
{
|
HARD_REG_SET c;
|
HARD_REG_SET c;
|
|
|
if (c1 == c2) return 1;
|
if (c1 == c2) return 1;
|
|
|
if (c1 == ALL_REGS || c2 == ALL_REGS)
|
if (c1 == ALL_REGS || c2 == ALL_REGS)
|
return 1;
|
return 1;
|
|
|
COPY_HARD_REG_SET (c, reg_class_contents[(int) c1]);
|
COPY_HARD_REG_SET (c, reg_class_contents[(int) c1]);
|
AND_HARD_REG_SET (c, reg_class_contents[(int) c2]);
|
AND_HARD_REG_SET (c, reg_class_contents[(int) c2]);
|
|
|
GO_IF_HARD_REG_SUBSET (c, reg_class_contents[(int) NO_REGS], lose);
|
GO_IF_HARD_REG_SUBSET (c, reg_class_contents[(int) NO_REGS], lose);
|
return 1;
|
return 1;
|
|
|
lose:
|
lose:
|
return 0;
|
return 0;
|
}
|
}
|
|
|
#ifdef CANNOT_CHANGE_MODE_CLASS
|
#ifdef CANNOT_CHANGE_MODE_CLASS
|
|
|
struct subregs_of_mode_node
|
struct subregs_of_mode_node
|
{
|
{
|
unsigned int block;
|
unsigned int block;
|
unsigned char modes[MAX_MACHINE_MODE];
|
unsigned char modes[MAX_MACHINE_MODE];
|
};
|
};
|
|
|
static htab_t subregs_of_mode;
|
static htab_t subregs_of_mode;
|
|
|
static hashval_t
|
static hashval_t
|
som_hash (const void *x)
|
som_hash (const void *x)
|
{
|
{
|
const struct subregs_of_mode_node *a = x;
|
const struct subregs_of_mode_node *a = x;
|
return a->block;
|
return a->block;
|
}
|
}
|
|
|
static int
|
static int
|
som_eq (const void *x, const void *y)
|
som_eq (const void *x, const void *y)
|
{
|
{
|
const struct subregs_of_mode_node *a = x;
|
const struct subregs_of_mode_node *a = x;
|
const struct subregs_of_mode_node *b = y;
|
const struct subregs_of_mode_node *b = y;
|
return a->block == b->block;
|
return a->block == b->block;
|
}
|
}
|
|
|
void
|
void
|
init_subregs_of_mode (void)
|
init_subregs_of_mode (void)
|
{
|
{
|
if (subregs_of_mode)
|
if (subregs_of_mode)
|
htab_empty (subregs_of_mode);
|
htab_empty (subregs_of_mode);
|
else
|
else
|
subregs_of_mode = htab_create (100, som_hash, som_eq, free);
|
subregs_of_mode = htab_create (100, som_hash, som_eq, free);
|
}
|
}
|
|
|
void
|
void
|
record_subregs_of_mode (rtx subreg)
|
record_subregs_of_mode (rtx subreg)
|
{
|
{
|
struct subregs_of_mode_node dummy, *node;
|
struct subregs_of_mode_node dummy, *node;
|
enum machine_mode mode;
|
enum machine_mode mode;
|
unsigned int regno;
|
unsigned int regno;
|
void **slot;
|
void **slot;
|
|
|
if (!REG_P (SUBREG_REG (subreg)))
|
if (!REG_P (SUBREG_REG (subreg)))
|
return;
|
return;
|
|
|
regno = REGNO (SUBREG_REG (subreg));
|
regno = REGNO (SUBREG_REG (subreg));
|
mode = GET_MODE (subreg);
|
mode = GET_MODE (subreg);
|
|
|
if (regno < FIRST_PSEUDO_REGISTER)
|
if (regno < FIRST_PSEUDO_REGISTER)
|
return;
|
return;
|
|
|
dummy.block = regno & -8;
|
dummy.block = regno & -8;
|
slot = htab_find_slot_with_hash (subregs_of_mode, &dummy,
|
slot = htab_find_slot_with_hash (subregs_of_mode, &dummy,
|
dummy.block, INSERT);
|
dummy.block, INSERT);
|
node = *slot;
|
node = *slot;
|
if (node == NULL)
|
if (node == NULL)
|
{
|
{
|
node = XCNEW (struct subregs_of_mode_node);
|
node = XCNEW (struct subregs_of_mode_node);
|
node->block = regno & -8;
|
node->block = regno & -8;
|
*slot = node;
|
*slot = node;
|
}
|
}
|
|
|
node->modes[mode] |= 1 << (regno & 7);
|
node->modes[mode] |= 1 << (regno & 7);
|
}
|
}
|
|
|
/* Set bits in *USED which correspond to registers which can't change
|
/* Set bits in *USED which correspond to registers which can't change
|
their mode from FROM to any mode in which REGNO was encountered. */
|
their mode from FROM to any mode in which REGNO was encountered. */
|
|
|
void
|
void
|
cannot_change_mode_set_regs (HARD_REG_SET *used, enum machine_mode from,
|
cannot_change_mode_set_regs (HARD_REG_SET *used, enum machine_mode from,
|
unsigned int regno)
|
unsigned int regno)
|
{
|
{
|
struct subregs_of_mode_node dummy, *node;
|
struct subregs_of_mode_node dummy, *node;
|
enum machine_mode to;
|
enum machine_mode to;
|
unsigned char mask;
|
unsigned char mask;
|
unsigned int i;
|
unsigned int i;
|
|
|
dummy.block = regno & -8;
|
dummy.block = regno & -8;
|
node = htab_find_with_hash (subregs_of_mode, &dummy, dummy.block);
|
node = htab_find_with_hash (subregs_of_mode, &dummy, dummy.block);
|
if (node == NULL)
|
if (node == NULL)
|
return;
|
return;
|
|
|
mask = 1 << (regno & 7);
|
mask = 1 << (regno & 7);
|
for (to = VOIDmode; to < NUM_MACHINE_MODES; to++)
|
for (to = VOIDmode; to < NUM_MACHINE_MODES; to++)
|
if (node->modes[to] & mask)
|
if (node->modes[to] & mask)
|
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
if (!TEST_HARD_REG_BIT (*used, i)
|
if (!TEST_HARD_REG_BIT (*used, i)
|
&& REG_CANNOT_CHANGE_MODE_P (i, from, to))
|
&& REG_CANNOT_CHANGE_MODE_P (i, from, to))
|
SET_HARD_REG_BIT (*used, i);
|
SET_HARD_REG_BIT (*used, i);
|
}
|
}
|
|
|
/* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
|
/* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
|
mode. */
|
mode. */
|
|
|
bool
|
bool
|
invalid_mode_change_p (unsigned int regno, enum reg_class class,
|
invalid_mode_change_p (unsigned int regno, enum reg_class class,
|
enum machine_mode from)
|
enum machine_mode from)
|
{
|
{
|
struct subregs_of_mode_node dummy, *node;
|
struct subregs_of_mode_node dummy, *node;
|
enum machine_mode to;
|
enum machine_mode to;
|
unsigned char mask;
|
unsigned char mask;
|
|
|
dummy.block = regno & -8;
|
dummy.block = regno & -8;
|
node = htab_find_with_hash (subregs_of_mode, &dummy, dummy.block);
|
node = htab_find_with_hash (subregs_of_mode, &dummy, dummy.block);
|
if (node == NULL)
|
if (node == NULL)
|
return false;
|
return false;
|
|
|
mask = 1 << (regno & 7);
|
mask = 1 << (regno & 7);
|
for (to = VOIDmode; to < NUM_MACHINE_MODES; to++)
|
for (to = VOIDmode; to < NUM_MACHINE_MODES; to++)
|
if (node->modes[to] & mask)
|
if (node->modes[to] & mask)
|
if (CANNOT_CHANGE_MODE_CLASS (from, to, class))
|
if (CANNOT_CHANGE_MODE_CLASS (from, to, class))
|
return true;
|
return true;
|
|
|
return false;
|
return false;
|
}
|
}
|
#endif /* CANNOT_CHANGE_MODE_CLASS */
|
#endif /* CANNOT_CHANGE_MODE_CLASS */
|
|
|
#include "gt-regclass.h"
|
#include "gt-regclass.h"
|
|
|
