/* Define per-register tables for data flow info and register allocation.
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/* Define per-register tables for data flow info and register allocation.
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Copyright (C) 1987, 1993, 1994, 1995, 1996, 1997, 1998,
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Copyright (C) 1987, 1993, 1994, 1995, 1996, 1997, 1998,
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1999, 2000, 2003, 2004, 2007 Free Software Foundation, Inc.
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1999, 2000, 2003, 2004, 2007 Free Software Foundation, Inc.
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This file is part of GCC.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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Software Foundation; either version 3, or (at your option) any later
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version.
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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<http://www.gnu.org/licenses/>. */
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#ifndef GCC_REGS_H
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#ifndef GCC_REGS_H
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#define GCC_REGS_H
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#define GCC_REGS_H
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#include "varray.h"
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#include "varray.h"
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#include "obstack.h"
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#include "obstack.h"
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#include "hard-reg-set.h"
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#include "hard-reg-set.h"
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#include "basic-block.h"
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#include "basic-block.h"
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#define REG_BYTES(R) mode_size[(int) GET_MODE (R)]
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#define REG_BYTES(R) mode_size[(int) GET_MODE (R)]
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/* When you only have the mode of a pseudo register before it has a hard
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/* When you only have the mode of a pseudo register before it has a hard
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register chosen for it, this reports the size of each hard register
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register chosen for it, this reports the size of each hard register
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a pseudo in such a mode would get allocated to. A target may
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a pseudo in such a mode would get allocated to. A target may
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override this. */
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override this. */
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#ifndef REGMODE_NATURAL_SIZE
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#ifndef REGMODE_NATURAL_SIZE
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#define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD
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#define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD
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#endif
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#endif
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#ifndef SMALL_REGISTER_CLASSES
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#ifndef SMALL_REGISTER_CLASSES
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#define SMALL_REGISTER_CLASSES 0
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#define SMALL_REGISTER_CLASSES 0
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#endif
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#endif
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/* Maximum register number used in this function, plus one. */
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/* Maximum register number used in this function, plus one. */
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extern int max_regno;
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extern int max_regno;
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/* Register information indexed by register number */
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/* Register information indexed by register number */
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typedef struct reg_info_def
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typedef struct reg_info_def
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{ /* fields set by reg_scan */
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{ /* fields set by reg_scan */
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int first_uid; /* UID of first insn to use (REG n) */
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int first_uid; /* UID of first insn to use (REG n) */
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int last_uid; /* UID of last insn to use (REG n) */
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int last_uid; /* UID of last insn to use (REG n) */
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/* fields set by reg_scan & flow_analysis */
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/* fields set by reg_scan & flow_analysis */
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int sets; /* # of times (REG n) is set */
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int sets; /* # of times (REG n) is set */
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/* fields set by flow_analysis */
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/* fields set by flow_analysis */
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int refs; /* # of times (REG n) is used or set */
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int refs; /* # of times (REG n) is used or set */
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int freq; /* # estimated frequency (REG n) is used or set */
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int freq; /* # estimated frequency (REG n) is used or set */
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int deaths; /* # of times (REG n) dies */
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int deaths; /* # of times (REG n) dies */
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int live_length; /* # of instructions (REG n) is live */
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int live_length; /* # of instructions (REG n) is live */
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int calls_crossed; /* # of calls (REG n) is live across */
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int calls_crossed; /* # of calls (REG n) is live across */
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int throw_calls_crossed; /* # of calls that may throw (REG n) is live across */
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int throw_calls_crossed; /* # of calls that may throw (REG n) is live across */
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int basic_block; /* # of basic blocks (REG n) is used in */
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int basic_block; /* # of basic blocks (REG n) is used in */
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} reg_info;
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} reg_info;
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typedef reg_info *reg_info_p;
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typedef reg_info *reg_info_p;
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DEF_VEC_P(reg_info_p);
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DEF_VEC_P(reg_info_p);
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DEF_VEC_ALLOC_P(reg_info_p,heap);
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DEF_VEC_ALLOC_P(reg_info_p,heap);
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extern VEC(reg_info_p,heap) *reg_n_info;
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extern VEC(reg_info_p,heap) *reg_n_info;
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/* Indexed by n, gives number of times (REG n) is used or set. */
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/* Indexed by n, gives number of times (REG n) is used or set. */
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#define REG_N_REFS(N) (VEC_index (reg_info_p, reg_n_info, N)->refs)
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#define REG_N_REFS(N) (VEC_index (reg_info_p, reg_n_info, N)->refs)
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/* Estimate frequency of references to register N. */
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/* Estimate frequency of references to register N. */
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#define REG_FREQ(N) (VEC_index (reg_info_p, reg_n_info, N)->freq)
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#define REG_FREQ(N) (VEC_index (reg_info_p, reg_n_info, N)->freq)
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/* The weights for each insn varries from 0 to REG_FREQ_BASE.
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/* The weights for each insn varries from 0 to REG_FREQ_BASE.
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This constant does not need to be high, as in infrequently executed
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This constant does not need to be high, as in infrequently executed
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regions we want to count instructions equivalently to optimize for
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regions we want to count instructions equivalently to optimize for
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size instead of speed. */
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size instead of speed. */
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#define REG_FREQ_MAX 1000
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#define REG_FREQ_MAX 1000
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/* Compute register frequency from the BB frequency. When optimizing for size,
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/* Compute register frequency from the BB frequency. When optimizing for size,
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or profile driven feedback is available and the function is never executed,
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or profile driven feedback is available and the function is never executed,
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frequency is always equivalent. Otherwise rescale the basic block
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frequency is always equivalent. Otherwise rescale the basic block
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frequency. */
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frequency. */
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#define REG_FREQ_FROM_BB(bb) (optimize_size \
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#define REG_FREQ_FROM_BB(bb) (optimize_size \
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|| (flag_branch_probabilities \
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|| (flag_branch_probabilities \
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&& !ENTRY_BLOCK_PTR->count) \
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&& !ENTRY_BLOCK_PTR->count) \
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? REG_FREQ_MAX \
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? REG_FREQ_MAX \
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: ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
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: ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
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? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
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? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
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: 1)
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: 1)
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/* Indexed by n, gives number of times (REG n) is set.
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/* Indexed by n, gives number of times (REG n) is set.
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??? both regscan and flow allocate space for this. We should settle
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??? both regscan and flow allocate space for this. We should settle
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on just copy. */
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on just copy. */
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#define REG_N_SETS(N) (VEC_index (reg_info_p, reg_n_info, N)->sets)
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#define REG_N_SETS(N) (VEC_index (reg_info_p, reg_n_info, N)->sets)
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/* Indexed by N, gives number of insns in which register N dies.
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/* Indexed by N, gives number of insns in which register N dies.
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Note that if register N is live around loops, it can die
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Note that if register N is live around loops, it can die
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in transitions between basic blocks, and that is not counted here.
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in transitions between basic blocks, and that is not counted here.
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So this is only a reliable indicator of how many regions of life there are
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So this is only a reliable indicator of how many regions of life there are
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for registers that are contained in one basic block. */
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for registers that are contained in one basic block. */
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#define REG_N_DEATHS(N) (VEC_index (reg_info_p, reg_n_info, N)->deaths)
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#define REG_N_DEATHS(N) (VEC_index (reg_info_p, reg_n_info, N)->deaths)
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/* Get the number of consecutive words required to hold pseudo-reg N. */
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/* Get the number of consecutive words required to hold pseudo-reg N. */
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#define PSEUDO_REGNO_SIZE(N) \
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#define PSEUDO_REGNO_SIZE(N) \
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((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \
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((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \
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/ UNITS_PER_WORD)
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/ UNITS_PER_WORD)
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/* Get the number of bytes required to hold pseudo-reg N. */
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/* Get the number of bytes required to hold pseudo-reg N. */
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#define PSEUDO_REGNO_BYTES(N) \
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#define PSEUDO_REGNO_BYTES(N) \
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GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))
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GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))
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/* Get the machine mode of pseudo-reg N. */
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/* Get the machine mode of pseudo-reg N. */
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#define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])
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#define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])
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/* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */
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/* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */
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#define REG_N_CALLS_CROSSED(N) \
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#define REG_N_CALLS_CROSSED(N) \
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(VEC_index (reg_info_p, reg_n_info, N)->calls_crossed)
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(VEC_index (reg_info_p, reg_n_info, N)->calls_crossed)
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/* Indexed by N, gives number of CALL_INSNS that may throw, across which
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/* Indexed by N, gives number of CALL_INSNS that may throw, across which
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(REG n) is live. */
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(REG n) is live. */
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#define REG_N_THROWING_CALLS_CROSSED(N) \
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#define REG_N_THROWING_CALLS_CROSSED(N) \
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(VEC_index (reg_info_p, reg_n_info, N)->throw_calls_crossed)
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(VEC_index (reg_info_p, reg_n_info, N)->throw_calls_crossed)
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/* Total number of instructions at which (REG n) is live.
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/* Total number of instructions at which (REG n) is live.
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The larger this is, the less priority (REG n) gets for
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The larger this is, the less priority (REG n) gets for
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allocation in a hard register (in global-alloc).
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allocation in a hard register (in global-alloc).
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This is set in flow.c and remains valid for the rest of the compilation
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This is set in flow.c and remains valid for the rest of the compilation
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of the function; it is used to control register allocation.
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of the function; it is used to control register allocation.
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local-alloc.c may alter this number to change the priority.
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local-alloc.c may alter this number to change the priority.
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Negative values are special.
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Negative values are special.
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-1 is used to mark a pseudo reg which has a constant or memory equivalent
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-1 is used to mark a pseudo reg which has a constant or memory equivalent
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and is used infrequently enough that it should not get a hard register.
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and is used infrequently enough that it should not get a hard register.
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-2 is used to mark a pseudo reg for a parameter, when a frame pointer
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-2 is used to mark a pseudo reg for a parameter, when a frame pointer
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is not required. global.c makes an allocno for this but does
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is not required. global.c makes an allocno for this but does
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not try to assign a hard register to it. */
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not try to assign a hard register to it. */
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#define REG_LIVE_LENGTH(N) \
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#define REG_LIVE_LENGTH(N) \
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(VEC_index (reg_info_p, reg_n_info, N)->live_length)
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(VEC_index (reg_info_p, reg_n_info, N)->live_length)
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/* Vector of substitutions of register numbers,
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/* Vector of substitutions of register numbers,
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used to map pseudo regs into hardware regs.
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used to map pseudo regs into hardware regs.
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This can't be folded into reg_n_info without changing all of the
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This can't be folded into reg_n_info without changing all of the
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machine dependent directories, since the reload functions
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machine dependent directories, since the reload functions
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in the machine dependent files access it. */
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in the machine dependent files access it. */
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extern short *reg_renumber;
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extern short *reg_renumber;
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/* Vector indexed by hardware reg saying whether that reg is ever used. */
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/* Vector indexed by hardware reg saying whether that reg is ever used. */
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extern char regs_ever_live[FIRST_PSEUDO_REGISTER];
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extern char regs_ever_live[FIRST_PSEUDO_REGISTER];
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/* Like regs_ever_live, but saying whether reg is set by asm statements. */
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/* Like regs_ever_live, but saying whether reg is set by asm statements. */
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extern char regs_asm_clobbered[FIRST_PSEUDO_REGISTER];
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extern char regs_asm_clobbered[FIRST_PSEUDO_REGISTER];
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/* Vector indexed by machine mode saying whether there are regs of that mode. */
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/* Vector indexed by machine mode saying whether there are regs of that mode. */
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extern bool have_regs_of_mode [MAX_MACHINE_MODE];
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extern bool have_regs_of_mode [MAX_MACHINE_MODE];
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/* For each hard register, the widest mode object that it can contain.
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/* For each hard register, the widest mode object that it can contain.
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This will be a MODE_INT mode if the register can hold integers. Otherwise
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This will be a MODE_INT mode if the register can hold integers. Otherwise
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it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
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it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
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register. */
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register. */
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extern enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
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extern enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
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/* Vector indexed by regno; gives uid of first insn using that reg.
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/* Vector indexed by regno; gives uid of first insn using that reg.
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This is computed by reg_scan for use by cse and loop.
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This is computed by reg_scan for use by cse and loop.
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It is sometimes adjusted for subsequent changes during loop,
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It is sometimes adjusted for subsequent changes during loop,
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but not adjusted by cse even if cse invalidates it. */
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but not adjusted by cse even if cse invalidates it. */
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#define REGNO_FIRST_UID(N) (VEC_index (reg_info_p, reg_n_info, N)->first_uid)
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#define REGNO_FIRST_UID(N) (VEC_index (reg_info_p, reg_n_info, N)->first_uid)
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/* Vector indexed by regno; gives uid of last insn using that reg.
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/* Vector indexed by regno; gives uid of last insn using that reg.
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This is computed by reg_scan for use by cse and loop.
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This is computed by reg_scan for use by cse and loop.
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It is sometimes adjusted for subsequent changes during loop,
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It is sometimes adjusted for subsequent changes during loop,
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but not adjusted by cse even if cse invalidates it.
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but not adjusted by cse even if cse invalidates it.
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This is harmless since cse won't scan through a loop end. */
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This is harmless since cse won't scan through a loop end. */
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#define REGNO_LAST_UID(N) (VEC_index (reg_info_p, reg_n_info, N)->last_uid)
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#define REGNO_LAST_UID(N) (VEC_index (reg_info_p, reg_n_info, N)->last_uid)
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/* List made of EXPR_LIST rtx's which gives pairs of pseudo registers
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/* List made of EXPR_LIST rtx's which gives pairs of pseudo registers
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that have to go in the same hard reg. */
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that have to go in the same hard reg. */
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extern rtx regs_may_share;
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extern rtx regs_may_share;
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/* Flag set by local-alloc or global-alloc if they decide to allocate
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/* Flag set by local-alloc or global-alloc if they decide to allocate
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something in a call-clobbered register. */
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something in a call-clobbered register. */
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extern int caller_save_needed;
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extern int caller_save_needed;
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/* Predicate to decide whether to give a hard reg to a pseudo which
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/* Predicate to decide whether to give a hard reg to a pseudo which
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is referenced REFS times and would need to be saved and restored
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is referenced REFS times and would need to be saved and restored
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around a call CALLS times. */
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around a call CALLS times. */
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#ifndef CALLER_SAVE_PROFITABLE
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#ifndef CALLER_SAVE_PROFITABLE
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#define CALLER_SAVE_PROFITABLE(REFS, CALLS) (4 * (CALLS) < (REFS))
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#define CALLER_SAVE_PROFITABLE(REFS, CALLS) (4 * (CALLS) < (REFS))
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#endif
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#endif
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/* On most machines a register class is likely to be spilled if it
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/* On most machines a register class is likely to be spilled if it
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only has one register. */
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only has one register. */
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#ifndef CLASS_LIKELY_SPILLED_P
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#ifndef CLASS_LIKELY_SPILLED_P
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#define CLASS_LIKELY_SPILLED_P(CLASS) (reg_class_size[(int) (CLASS)] == 1)
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#define CLASS_LIKELY_SPILLED_P(CLASS) (reg_class_size[(int) (CLASS)] == 1)
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#endif
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#endif
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/* Select a register mode required for caller save of hard regno REGNO. */
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/* Select a register mode required for caller save of hard regno REGNO. */
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#ifndef HARD_REGNO_CALLER_SAVE_MODE
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#ifndef HARD_REGNO_CALLER_SAVE_MODE
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#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
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#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
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choose_hard_reg_mode (REGNO, NREGS, false)
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choose_hard_reg_mode (REGNO, NREGS, false)
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#endif
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#endif
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/* Registers that get partially clobbered by a call in a given mode.
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/* Registers that get partially clobbered by a call in a given mode.
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These must not be call used registers. */
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These must not be call used registers. */
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#ifndef HARD_REGNO_CALL_PART_CLOBBERED
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#ifndef HARD_REGNO_CALL_PART_CLOBBERED
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#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
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#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
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#endif
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#endif
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/* Allocate reg_n_info tables */
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/* Allocate reg_n_info tables */
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extern void allocate_reg_info (size_t, int, int);
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extern void allocate_reg_info (size_t, int, int);
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/* Specify number of hard registers given machine mode occupy. */
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/* Specify number of hard registers given machine mode occupy. */
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extern unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
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extern unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
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#endif /* GCC_REGS_H */
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#endif /* GCC_REGS_H */
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