/* HP PA-RISC SOM object file format: definitions internal to BFD.
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/* HP PA-RISC SOM object file format: definitions internal to BFD.
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Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000,
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Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000,
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2003, 2005, 2007 Free Software Foundation, Inc.
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2003, 2005, 2007 Free Software Foundation, Inc.
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Contributed by the Center for Software Science at the
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Contributed by the Center for Software Science at the
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University of Utah (pa-gdb-bugs@cs.utah.edu).
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University of Utah (pa-gdb-bugs@cs.utah.edu).
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This file is part of BFD, the Binary File Descriptor library.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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MA 02110-1301, USA. */
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#ifndef _LIBHPPA_H
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#ifndef _LIBHPPA_H
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#define _LIBHPPA_H
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#define _LIBHPPA_H
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#define BYTES_IN_WORD 4
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#define BYTES_IN_WORD 4
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#define PA_PAGESIZE 0x1000
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#define PA_PAGESIZE 0x1000
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/* The PA instruction set variants. */
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/* The PA instruction set variants. */
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enum pa_arch {pa10 = 10, pa11 = 11, pa20 = 20, pa20w = 25};
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enum pa_arch {pa10 = 10, pa11 = 11, pa20 = 20, pa20w = 25};
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/* HP PA-RISC relocation types */
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/* HP PA-RISC relocation types */
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enum hppa_reloc_field_selector_type
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enum hppa_reloc_field_selector_type
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{
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{
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R_HPPA_FSEL = 0x0,
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R_HPPA_FSEL = 0x0,
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R_HPPA_LSSEL = 0x1,
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R_HPPA_LSSEL = 0x1,
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R_HPPA_RSSEL = 0x2,
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R_HPPA_RSSEL = 0x2,
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R_HPPA_LSEL = 0x3,
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R_HPPA_LSEL = 0x3,
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R_HPPA_RSEL = 0x4,
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R_HPPA_RSEL = 0x4,
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R_HPPA_LDSEL = 0x5,
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R_HPPA_LDSEL = 0x5,
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R_HPPA_RDSEL = 0x6,
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R_HPPA_RDSEL = 0x6,
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R_HPPA_LRSEL = 0x7,
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R_HPPA_LRSEL = 0x7,
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R_HPPA_RRSEL = 0x8,
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R_HPPA_RRSEL = 0x8,
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R_HPPA_NSEL = 0x9,
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R_HPPA_NSEL = 0x9,
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R_HPPA_NLSEL = 0xa,
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R_HPPA_NLSEL = 0xa,
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R_HPPA_NLRSEL = 0xb,
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R_HPPA_NLRSEL = 0xb,
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R_HPPA_PSEL = 0xc,
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R_HPPA_PSEL = 0xc,
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R_HPPA_LPSEL = 0xd,
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R_HPPA_LPSEL = 0xd,
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R_HPPA_RPSEL = 0xe,
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R_HPPA_RPSEL = 0xe,
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R_HPPA_TSEL = 0xf,
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R_HPPA_TSEL = 0xf,
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R_HPPA_LTSEL = 0x10,
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R_HPPA_LTSEL = 0x10,
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R_HPPA_RTSEL = 0x11,
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R_HPPA_RTSEL = 0x11,
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R_HPPA_LTPSEL = 0x12,
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R_HPPA_LTPSEL = 0x12,
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R_HPPA_RTPSEL = 0x13
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R_HPPA_RTPSEL = 0x13
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};
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};
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/* /usr/include/reloc.h defines these to constants. We want to use
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/* /usr/include/reloc.h defines these to constants. We want to use
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them in enums, so #undef them before we start using them. We might
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them in enums, so #undef them before we start using them. We might
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be able to fix this another way by simply managing not to include
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be able to fix this another way by simply managing not to include
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/usr/include/reloc.h, but currently GDB picks up these defines
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/usr/include/reloc.h, but currently GDB picks up these defines
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somewhere. */
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somewhere. */
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#undef e_fsel
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#undef e_fsel
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#undef e_lssel
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#undef e_lssel
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#undef e_rssel
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#undef e_rssel
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#undef e_lsel
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#undef e_lsel
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#undef e_rsel
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#undef e_rsel
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#undef e_ldsel
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#undef e_ldsel
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#undef e_rdsel
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#undef e_rdsel
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#undef e_lrsel
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#undef e_lrsel
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#undef e_rrsel
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#undef e_rrsel
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#undef e_nsel
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#undef e_nsel
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#undef e_nlsel
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#undef e_nlsel
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#undef e_nlrsel
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#undef e_nlrsel
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#undef e_psel
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#undef e_psel
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#undef e_lpsel
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#undef e_lpsel
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#undef e_rpsel
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#undef e_rpsel
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#undef e_tsel
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#undef e_tsel
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#undef e_ltsel
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#undef e_ltsel
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#undef e_rtsel
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#undef e_rtsel
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#undef e_one
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#undef e_one
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#undef e_two
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#undef e_two
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#undef e_pcrel
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#undef e_pcrel
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#undef e_con
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#undef e_con
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#undef e_plabel
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#undef e_plabel
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#undef e_abs
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#undef e_abs
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|
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/* for compatibility */
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/* for compatibility */
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enum hppa_reloc_field_selector_type_alt
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enum hppa_reloc_field_selector_type_alt
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{
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{
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e_fsel = R_HPPA_FSEL,
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e_fsel = R_HPPA_FSEL,
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e_lssel = R_HPPA_LSSEL,
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e_lssel = R_HPPA_LSSEL,
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e_rssel = R_HPPA_RSSEL,
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e_rssel = R_HPPA_RSSEL,
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e_lsel = R_HPPA_LSEL,
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e_lsel = R_HPPA_LSEL,
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e_rsel = R_HPPA_RSEL,
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e_rsel = R_HPPA_RSEL,
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e_ldsel = R_HPPA_LDSEL,
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e_ldsel = R_HPPA_LDSEL,
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e_rdsel = R_HPPA_RDSEL,
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e_rdsel = R_HPPA_RDSEL,
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e_lrsel = R_HPPA_LRSEL,
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e_lrsel = R_HPPA_LRSEL,
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e_rrsel = R_HPPA_RRSEL,
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e_rrsel = R_HPPA_RRSEL,
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e_nsel = R_HPPA_NSEL,
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e_nsel = R_HPPA_NSEL,
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e_nlsel = R_HPPA_NLSEL,
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e_nlsel = R_HPPA_NLSEL,
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e_nlrsel = R_HPPA_NLRSEL,
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e_nlrsel = R_HPPA_NLRSEL,
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e_psel = R_HPPA_PSEL,
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e_psel = R_HPPA_PSEL,
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e_lpsel = R_HPPA_LPSEL,
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e_lpsel = R_HPPA_LPSEL,
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e_rpsel = R_HPPA_RPSEL,
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e_rpsel = R_HPPA_RPSEL,
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e_tsel = R_HPPA_TSEL,
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e_tsel = R_HPPA_TSEL,
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e_ltsel = R_HPPA_LTSEL,
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e_ltsel = R_HPPA_LTSEL,
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e_rtsel = R_HPPA_RTSEL,
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e_rtsel = R_HPPA_RTSEL,
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e_ltpsel = R_HPPA_LTPSEL,
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e_ltpsel = R_HPPA_LTPSEL,
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e_rtpsel = R_HPPA_RTPSEL
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e_rtpsel = R_HPPA_RTPSEL
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};
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};
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enum hppa_reloc_expr_type
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enum hppa_reloc_expr_type
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{
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{
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R_HPPA_E_ONE = 0,
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R_HPPA_E_ONE = 0,
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R_HPPA_E_TWO = 1,
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R_HPPA_E_TWO = 1,
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R_HPPA_E_PCREL = 2,
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R_HPPA_E_PCREL = 2,
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R_HPPA_E_CON = 3,
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R_HPPA_E_CON = 3,
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R_HPPA_E_PLABEL = 7,
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R_HPPA_E_PLABEL = 7,
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R_HPPA_E_ABS = 18
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R_HPPA_E_ABS = 18
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};
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};
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/* for compatibility */
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/* for compatibility */
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enum hppa_reloc_expr_type_alt
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enum hppa_reloc_expr_type_alt
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{
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{
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e_one = R_HPPA_E_ONE,
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e_one = R_HPPA_E_ONE,
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e_two = R_HPPA_E_TWO,
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e_two = R_HPPA_E_TWO,
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e_pcrel = R_HPPA_E_PCREL,
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e_pcrel = R_HPPA_E_PCREL,
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e_con = R_HPPA_E_CON,
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e_con = R_HPPA_E_CON,
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e_plabel = R_HPPA_E_PLABEL,
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e_plabel = R_HPPA_E_PLABEL,
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e_abs = R_HPPA_E_ABS
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e_abs = R_HPPA_E_ABS
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};
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};
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/* Relocations for function calls must be accompanied by parameter
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/* Relocations for function calls must be accompanied by parameter
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relocation bits. These bits describe exactly where the caller has
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relocation bits. These bits describe exactly where the caller has
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placed the function's arguments and where it expects to find a return
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placed the function's arguments and where it expects to find a return
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value.
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value.
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Both ELF and SOM encode this information within the addend field
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Both ELF and SOM encode this information within the addend field
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of the call relocation. (Note this could break very badly if one
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of the call relocation. (Note this could break very badly if one
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was to make a call like bl foo + 0x12345678).
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was to make a call like bl foo + 0x12345678).
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The high order 10 bits contain parameter relocation information,
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The high order 10 bits contain parameter relocation information,
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the low order 22 bits contain the constant offset. */
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the low order 22 bits contain the constant offset. */
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#define HPPA_R_ARG_RELOC(a) \
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#define HPPA_R_ARG_RELOC(a) \
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(((a) >> 22) & 0x3ff)
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(((a) >> 22) & 0x3ff)
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#define HPPA_R_CONSTANT(a) \
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#define HPPA_R_CONSTANT(a) \
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((((bfd_signed_vma)(a)) << (BFD_ARCH_SIZE-22)) >> (BFD_ARCH_SIZE-22))
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((((bfd_signed_vma)(a)) << (BFD_ARCH_SIZE-22)) >> (BFD_ARCH_SIZE-22))
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#define HPPA_R_ADDEND(r, c) \
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#define HPPA_R_ADDEND(r, c) \
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(((r) << 22) + ((c) & 0x3fffff))
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(((r) << 22) + ((c) & 0x3fffff))
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/* Some functions to manipulate PA instructions. */
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/* Some functions to manipulate PA instructions. */
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/* Declare the functions with the unused attribute to avoid warnings. */
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/* Declare the functions with the unused attribute to avoid warnings. */
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static inline int sign_extend (int, int) ATTRIBUTE_UNUSED;
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static inline int sign_extend (int, int) ATTRIBUTE_UNUSED;
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static inline int low_sign_extend (int, int) ATTRIBUTE_UNUSED;
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static inline int low_sign_extend (int, int) ATTRIBUTE_UNUSED;
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static inline int sign_unext (int, int) ATTRIBUTE_UNUSED;
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static inline int sign_unext (int, int) ATTRIBUTE_UNUSED;
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static inline int low_sign_unext (int, int) ATTRIBUTE_UNUSED;
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static inline int low_sign_unext (int, int) ATTRIBUTE_UNUSED;
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static inline int re_assemble_3 (int) ATTRIBUTE_UNUSED;
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static inline int re_assemble_3 (int) ATTRIBUTE_UNUSED;
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static inline int re_assemble_12 (int) ATTRIBUTE_UNUSED;
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static inline int re_assemble_12 (int) ATTRIBUTE_UNUSED;
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static inline int re_assemble_14 (int) ATTRIBUTE_UNUSED;
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static inline int re_assemble_14 (int) ATTRIBUTE_UNUSED;
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static inline int re_assemble_16 (int) ATTRIBUTE_UNUSED;
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static inline int re_assemble_16 (int) ATTRIBUTE_UNUSED;
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static inline int re_assemble_17 (int) ATTRIBUTE_UNUSED;
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static inline int re_assemble_17 (int) ATTRIBUTE_UNUSED;
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static inline int re_assemble_21 (int) ATTRIBUTE_UNUSED;
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static inline int re_assemble_21 (int) ATTRIBUTE_UNUSED;
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static inline int re_assemble_22 (int) ATTRIBUTE_UNUSED;
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static inline int re_assemble_22 (int) ATTRIBUTE_UNUSED;
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static inline bfd_signed_vma hppa_field_adjust
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static inline bfd_signed_vma hppa_field_adjust
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(bfd_vma, bfd_signed_vma, enum hppa_reloc_field_selector_type_alt)
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(bfd_vma, bfd_signed_vma, enum hppa_reloc_field_selector_type_alt)
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ATTRIBUTE_UNUSED;
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ATTRIBUTE_UNUSED;
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static inline int bfd_hppa_insn2fmt (bfd *, int) ATTRIBUTE_UNUSED;
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static inline int bfd_hppa_insn2fmt (bfd *, int) ATTRIBUTE_UNUSED;
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static inline int hppa_rebuild_insn (int, int, int) ATTRIBUTE_UNUSED;
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static inline int hppa_rebuild_insn (int, int, int) ATTRIBUTE_UNUSED;
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/* The *sign_extend functions are used to assemble various bitfields
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/* The *sign_extend functions are used to assemble various bitfields
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taken from an instruction and return the resulting immediate
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taken from an instruction and return the resulting immediate
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value. */
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value. */
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static inline int
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static inline int
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sign_extend (int x, int len)
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sign_extend (int x, int len)
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{
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{
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int signbit = (1 << (len - 1));
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int signbit = (1 << (len - 1));
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int mask = (signbit << 1) - 1;
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int mask = (signbit << 1) - 1;
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return ((x & mask) ^ signbit) - signbit;
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return ((x & mask) ^ signbit) - signbit;
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}
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}
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static inline int
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static inline int
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low_sign_extend (int x, int len)
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low_sign_extend (int x, int len)
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{
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{
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return (x >> 1) - ((x & 1) << (len - 1));
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return (x >> 1) - ((x & 1) << (len - 1));
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}
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}
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/* The re_assemble_* functions prepare an immediate value for
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/* The re_assemble_* functions prepare an immediate value for
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insertion into an opcode. pa-risc uses all sorts of weird bitfields
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insertion into an opcode. pa-risc uses all sorts of weird bitfields
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in the instruction to hold the value. */
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in the instruction to hold the value. */
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static inline int
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static inline int
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sign_unext (int x, int len)
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sign_unext (int x, int len)
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{
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{
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int len_ones;
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int len_ones;
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len_ones = (1 << len) - 1;
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len_ones = (1 << len) - 1;
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return x & len_ones;
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return x & len_ones;
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}
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}
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static inline int
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static inline int
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low_sign_unext (int x, int len)
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low_sign_unext (int x, int len)
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{
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{
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int temp;
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int temp;
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int sign;
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int sign;
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|
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sign = (x >> (len-1)) & 1;
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sign = (x >> (len-1)) & 1;
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temp = sign_unext (x, len-1);
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temp = sign_unext (x, len-1);
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return (temp << 1) | sign;
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return (temp << 1) | sign;
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}
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}
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static inline int
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static inline int
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re_assemble_3 (int as3)
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re_assemble_3 (int as3)
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{
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{
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return (( (as3 & 4) << (13-2))
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return (( (as3 & 4) << (13-2))
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| ((as3 & 3) << (13+1)));
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| ((as3 & 3) << (13+1)));
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}
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}
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|
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static inline int
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static inline int
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re_assemble_12 (int as12)
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re_assemble_12 (int as12)
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{
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{
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return (( (as12 & 0x800) >> 11)
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return (( (as12 & 0x800) >> 11)
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| ((as12 & 0x400) >> (10 - 2))
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| ((as12 & 0x400) >> (10 - 2))
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| ((as12 & 0x3ff) << (1 + 2)));
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| ((as12 & 0x3ff) << (1 + 2)));
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}
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}
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|
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static inline int
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static inline int
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re_assemble_14 (int as14)
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re_assemble_14 (int as14)
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{
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{
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return (( (as14 & 0x1fff) << 1)
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return (( (as14 & 0x1fff) << 1)
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| ((as14 & 0x2000) >> 13));
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| ((as14 & 0x2000) >> 13));
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}
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}
|
|
|
static inline int
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static inline int
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re_assemble_16 (int as16)
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re_assemble_16 (int as16)
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{
|
{
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int s, t;
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int s, t;
|
|
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/* Unusual 16-bit encoding, for wide mode only. */
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/* Unusual 16-bit encoding, for wide mode only. */
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t = (as16 << 1) & 0xffff;
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t = (as16 << 1) & 0xffff;
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s = (as16 & 0x8000);
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s = (as16 & 0x8000);
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return (t ^ s ^ (s >> 1)) | (s >> 15);
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return (t ^ s ^ (s >> 1)) | (s >> 15);
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}
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}
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|
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static inline int
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static inline int
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re_assemble_17 (int as17)
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re_assemble_17 (int as17)
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{
|
{
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return (( (as17 & 0x10000) >> 16)
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return (( (as17 & 0x10000) >> 16)
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| ((as17 & 0x0f800) << (16 - 11))
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| ((as17 & 0x0f800) << (16 - 11))
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| ((as17 & 0x00400) >> (10 - 2))
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| ((as17 & 0x00400) >> (10 - 2))
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| ((as17 & 0x003ff) << (1 + 2)));
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| ((as17 & 0x003ff) << (1 + 2)));
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}
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}
|
|
|
static inline int
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static inline int
|
re_assemble_21 (int as21)
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re_assemble_21 (int as21)
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{
|
{
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return (( (as21 & 0x100000) >> 20)
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return (( (as21 & 0x100000) >> 20)
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| ((as21 & 0x0ffe00) >> 8)
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| ((as21 & 0x0ffe00) >> 8)
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| ((as21 & 0x000180) << 7)
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| ((as21 & 0x000180) << 7)
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| ((as21 & 0x00007c) << 14)
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| ((as21 & 0x00007c) << 14)
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| ((as21 & 0x000003) << 12));
|
| ((as21 & 0x000003) << 12));
|
}
|
}
|
|
|
static inline int
|
static inline int
|
re_assemble_22 (int as22)
|
re_assemble_22 (int as22)
|
{
|
{
|
return (( (as22 & 0x200000) >> 21)
|
return (( (as22 & 0x200000) >> 21)
|
| ((as22 & 0x1f0000) << (21 - 16))
|
| ((as22 & 0x1f0000) << (21 - 16))
|
| ((as22 & 0x00f800) << (16 - 11))
|
| ((as22 & 0x00f800) << (16 - 11))
|
| ((as22 & 0x000400) >> (10 - 2))
|
| ((as22 & 0x000400) >> (10 - 2))
|
| ((as22 & 0x0003ff) << (1 + 2)));
|
| ((as22 & 0x0003ff) << (1 + 2)));
|
}
|
}
|
|
|
|
|
/* Handle field selectors for PA instructions.
|
/* Handle field selectors for PA instructions.
|
The L and R (and LS, RS etc.) selectors are used in pairs to form a
|
The L and R (and LS, RS etc.) selectors are used in pairs to form a
|
full 32 bit address. eg.
|
full 32 bit address. eg.
|
|
|
LDIL L'start,%r1 ; put left part into r1
|
LDIL L'start,%r1 ; put left part into r1
|
LDW R'start(%r1),%r2 ; add r1 and right part to form address
|
LDW R'start(%r1),%r2 ; add r1 and right part to form address
|
|
|
This function returns sign extended values in all cases.
|
This function returns sign extended values in all cases.
|
*/
|
*/
|
|
|
static inline bfd_signed_vma
|
static inline bfd_signed_vma
|
hppa_field_adjust (bfd_vma sym_val,
|
hppa_field_adjust (bfd_vma sym_val,
|
bfd_signed_vma addend,
|
bfd_signed_vma addend,
|
enum hppa_reloc_field_selector_type_alt r_field)
|
enum hppa_reloc_field_selector_type_alt r_field)
|
{
|
{
|
bfd_signed_vma value;
|
bfd_signed_vma value;
|
|
|
value = sym_val + addend;
|
value = sym_val + addend;
|
switch (r_field)
|
switch (r_field)
|
{
|
{
|
case e_fsel:
|
case e_fsel:
|
/* F: No change. */
|
/* F: No change. */
|
break;
|
break;
|
|
|
case e_nsel:
|
case e_nsel:
|
/* N: null selector. I don't really understand what this is all
|
/* N: null selector. I don't really understand what this is all
|
about, but HP's documentation says "this indicates that zero
|
about, but HP's documentation says "this indicates that zero
|
bits are to be used for the displacement on the instruction.
|
bits are to be used for the displacement on the instruction.
|
This fixup is used to identify three-instruction sequences to
|
This fixup is used to identify three-instruction sequences to
|
access data (for importing shared library data)." */
|
access data (for importing shared library data)." */
|
value = 0;
|
value = 0;
|
break;
|
break;
|
|
|
case e_lsel:
|
case e_lsel:
|
case e_nlsel:
|
case e_nlsel:
|
/* L: Select top 21 bits. */
|
/* L: Select top 21 bits. */
|
value = value >> 11;
|
value = value >> 11;
|
break;
|
break;
|
|
|
case e_rsel:
|
case e_rsel:
|
/* R: Select bottom 11 bits. */
|
/* R: Select bottom 11 bits. */
|
value = value & 0x7ff;
|
value = value & 0x7ff;
|
break;
|
break;
|
|
|
case e_lssel:
|
case e_lssel:
|
/* LS: Round to nearest multiple of 2048 then select top 21 bits. */
|
/* LS: Round to nearest multiple of 2048 then select top 21 bits. */
|
value = value + 0x400;
|
value = value + 0x400;
|
value = value >> 11;
|
value = value >> 11;
|
break;
|
break;
|
|
|
case e_rssel:
|
case e_rssel:
|
/* RS: Select bottom 11 bits for LS.
|
/* RS: Select bottom 11 bits for LS.
|
We need to return a value such that 2048 * LS'x + RS'x == x.
|
We need to return a value such that 2048 * LS'x + RS'x == x.
|
ie. RS'x = x - ((x + 0x400) & -0x800)
|
ie. RS'x = x - ((x + 0x400) & -0x800)
|
this is just a sign extension from bit 21. */
|
this is just a sign extension from bit 21. */
|
value = ((value & 0x7ff) ^ 0x400) - 0x400;
|
value = ((value & 0x7ff) ^ 0x400) - 0x400;
|
break;
|
break;
|
|
|
case e_ldsel:
|
case e_ldsel:
|
/* LD: Round to next multiple of 2048 then select top 21 bits.
|
/* LD: Round to next multiple of 2048 then select top 21 bits.
|
Yes, if we are already on a multiple of 2048, we go up to the
|
Yes, if we are already on a multiple of 2048, we go up to the
|
next one. RD in this case will be -2048. */
|
next one. RD in this case will be -2048. */
|
value = value + 0x800;
|
value = value + 0x800;
|
value = value >> 11;
|
value = value >> 11;
|
break;
|
break;
|
|
|
case e_rdsel:
|
case e_rdsel:
|
/* RD: Set bits 0-20 to one. */
|
/* RD: Set bits 0-20 to one. */
|
value = value | -0x800;
|
value = value | -0x800;
|
break;
|
break;
|
|
|
case e_lrsel:
|
case e_lrsel:
|
case e_nlrsel:
|
case e_nlrsel:
|
/* LR: L with rounding of the addend to nearest 8k. */
|
/* LR: L with rounding of the addend to nearest 8k. */
|
value = sym_val + ((addend + 0x1000) & -0x2000);
|
value = sym_val + ((addend + 0x1000) & -0x2000);
|
value = value >> 11;
|
value = value >> 11;
|
break;
|
break;
|
|
|
case e_rrsel:
|
case e_rrsel:
|
/* RR: R with rounding of the addend to nearest 8k.
|
/* RR: R with rounding of the addend to nearest 8k.
|
We need to return a value such that 2048 * LR'x + RR'x == x
|
We need to return a value such that 2048 * LR'x + RR'x == x
|
ie. RR'x = s+a - (s + (((a + 0x1000) & -0x2000) & -0x800))
|
ie. RR'x = s+a - (s + (((a + 0x1000) & -0x2000) & -0x800))
|
. = s+a - ((s & -0x800) + ((a + 0x1000) & -0x2000))
|
. = s+a - ((s & -0x800) + ((a + 0x1000) & -0x2000))
|
. = (s & 0x7ff) + a - ((a + 0x1000) & -0x2000) */
|
. = (s & 0x7ff) + a - ((a + 0x1000) & -0x2000) */
|
value = (sym_val & 0x7ff) + (((addend & 0x1fff) ^ 0x1000) - 0x1000);
|
value = (sym_val & 0x7ff) + (((addend & 0x1fff) ^ 0x1000) - 0x1000);
|
break;
|
break;
|
|
|
default:
|
default:
|
abort ();
|
abort ();
|
}
|
}
|
return value;
|
return value;
|
}
|
}
|
|
|
/* PA-RISC OPCODES */
|
/* PA-RISC OPCODES */
|
#define get_opcode(insn) (((insn) >> 26) & 0x3f)
|
#define get_opcode(insn) (((insn) >> 26) & 0x3f)
|
|
|
enum hppa_opcode_type
|
enum hppa_opcode_type
|
{
|
{
|
/* None of the opcodes in the first group generate relocs, so we
|
/* None of the opcodes in the first group generate relocs, so we
|
aren't too concerned about them. */
|
aren't too concerned about them. */
|
OP_SYSOP = 0x00,
|
OP_SYSOP = 0x00,
|
OP_MEMMNG = 0x01,
|
OP_MEMMNG = 0x01,
|
OP_ALU = 0x02,
|
OP_ALU = 0x02,
|
OP_NDXMEM = 0x03,
|
OP_NDXMEM = 0x03,
|
OP_SPOP = 0x04,
|
OP_SPOP = 0x04,
|
OP_DIAG = 0x05,
|
OP_DIAG = 0x05,
|
OP_FMPYADD = 0x06,
|
OP_FMPYADD = 0x06,
|
OP_UNDEF07 = 0x07,
|
OP_UNDEF07 = 0x07,
|
OP_COPRW = 0x09,
|
OP_COPRW = 0x09,
|
OP_COPRDW = 0x0b,
|
OP_COPRDW = 0x0b,
|
OP_COPR = 0x0c,
|
OP_COPR = 0x0c,
|
OP_FLOAT = 0x0e,
|
OP_FLOAT = 0x0e,
|
OP_PRDSPEC = 0x0f,
|
OP_PRDSPEC = 0x0f,
|
OP_UNDEF15 = 0x15,
|
OP_UNDEF15 = 0x15,
|
OP_UNDEF1d = 0x1d,
|
OP_UNDEF1d = 0x1d,
|
OP_FMPYSUB = 0x26,
|
OP_FMPYSUB = 0x26,
|
OP_FPFUSED = 0x2e,
|
OP_FPFUSED = 0x2e,
|
OP_SHEXDP0 = 0x34,
|
OP_SHEXDP0 = 0x34,
|
OP_SHEXDP1 = 0x35,
|
OP_SHEXDP1 = 0x35,
|
OP_SHEXDP2 = 0x36,
|
OP_SHEXDP2 = 0x36,
|
OP_UNDEF37 = 0x37,
|
OP_UNDEF37 = 0x37,
|
OP_SHEXDP3 = 0x3c,
|
OP_SHEXDP3 = 0x3c,
|
OP_SHEXDP4 = 0x3d,
|
OP_SHEXDP4 = 0x3d,
|
OP_MULTMED = 0x3e,
|
OP_MULTMED = 0x3e,
|
OP_UNDEF3f = 0x3f,
|
OP_UNDEF3f = 0x3f,
|
|
|
OP_LDIL = 0x08,
|
OP_LDIL = 0x08,
|
OP_ADDIL = 0x0a,
|
OP_ADDIL = 0x0a,
|
|
|
OP_LDO = 0x0d,
|
OP_LDO = 0x0d,
|
OP_LDB = 0x10,
|
OP_LDB = 0x10,
|
OP_LDH = 0x11,
|
OP_LDH = 0x11,
|
OP_LDW = 0x12,
|
OP_LDW = 0x12,
|
OP_LDWM = 0x13,
|
OP_LDWM = 0x13,
|
OP_STB = 0x18,
|
OP_STB = 0x18,
|
OP_STH = 0x19,
|
OP_STH = 0x19,
|
OP_STW = 0x1a,
|
OP_STW = 0x1a,
|
OP_STWM = 0x1b,
|
OP_STWM = 0x1b,
|
|
|
OP_LDD = 0x14,
|
OP_LDD = 0x14,
|
OP_STD = 0x1c,
|
OP_STD = 0x1c,
|
|
|
OP_FLDW = 0x16,
|
OP_FLDW = 0x16,
|
OP_LDWL = 0x17,
|
OP_LDWL = 0x17,
|
OP_FSTW = 0x1e,
|
OP_FSTW = 0x1e,
|
OP_STWL = 0x1f,
|
OP_STWL = 0x1f,
|
|
|
OP_COMBT = 0x20,
|
OP_COMBT = 0x20,
|
OP_COMIBT = 0x21,
|
OP_COMIBT = 0x21,
|
OP_COMBF = 0x22,
|
OP_COMBF = 0x22,
|
OP_COMIBF = 0x23,
|
OP_COMIBF = 0x23,
|
OP_CMPBDT = 0x27,
|
OP_CMPBDT = 0x27,
|
OP_ADDBT = 0x28,
|
OP_ADDBT = 0x28,
|
OP_ADDIBT = 0x29,
|
OP_ADDIBT = 0x29,
|
OP_ADDBF = 0x2a,
|
OP_ADDBF = 0x2a,
|
OP_ADDIBF = 0x2b,
|
OP_ADDIBF = 0x2b,
|
OP_CMPBDF = 0x2f,
|
OP_CMPBDF = 0x2f,
|
OP_BVB = 0x30,
|
OP_BVB = 0x30,
|
OP_BB = 0x31,
|
OP_BB = 0x31,
|
OP_MOVB = 0x32,
|
OP_MOVB = 0x32,
|
OP_MOVIB = 0x33,
|
OP_MOVIB = 0x33,
|
OP_CMPIBD = 0x3b,
|
OP_CMPIBD = 0x3b,
|
|
|
OP_COMICLR = 0x24,
|
OP_COMICLR = 0x24,
|
OP_SUBI = 0x25,
|
OP_SUBI = 0x25,
|
OP_ADDIT = 0x2c,
|
OP_ADDIT = 0x2c,
|
OP_ADDI = 0x2d,
|
OP_ADDI = 0x2d,
|
|
|
OP_BE = 0x38,
|
OP_BE = 0x38,
|
OP_BLE = 0x39,
|
OP_BLE = 0x39,
|
OP_BL = 0x3a
|
OP_BL = 0x3a
|
};
|
};
|
|
|
|
|
/* Given a machine instruction, return its format. */
|
/* Given a machine instruction, return its format. */
|
|
|
static inline int
|
static inline int
|
bfd_hppa_insn2fmt (bfd *abfd, int insn)
|
bfd_hppa_insn2fmt (bfd *abfd, int insn)
|
{
|
{
|
enum hppa_opcode_type op = get_opcode (insn);
|
enum hppa_opcode_type op = get_opcode (insn);
|
|
|
switch (op)
|
switch (op)
|
{
|
{
|
case OP_COMICLR:
|
case OP_COMICLR:
|
case OP_SUBI:
|
case OP_SUBI:
|
case OP_ADDIT:
|
case OP_ADDIT:
|
case OP_ADDI:
|
case OP_ADDI:
|
return 11;
|
return 11;
|
|
|
case OP_COMBT:
|
case OP_COMBT:
|
case OP_COMIBT:
|
case OP_COMIBT:
|
case OP_COMBF:
|
case OP_COMBF:
|
case OP_COMIBF:
|
case OP_COMIBF:
|
case OP_CMPBDT:
|
case OP_CMPBDT:
|
case OP_ADDBT:
|
case OP_ADDBT:
|
case OP_ADDIBT:
|
case OP_ADDIBT:
|
case OP_ADDBF:
|
case OP_ADDBF:
|
case OP_ADDIBF:
|
case OP_ADDIBF:
|
case OP_CMPBDF:
|
case OP_CMPBDF:
|
case OP_BVB:
|
case OP_BVB:
|
case OP_BB:
|
case OP_BB:
|
case OP_MOVB:
|
case OP_MOVB:
|
case OP_MOVIB:
|
case OP_MOVIB:
|
case OP_CMPIBD:
|
case OP_CMPIBD:
|
return 12;
|
return 12;
|
|
|
case OP_LDO:
|
case OP_LDO:
|
case OP_LDB:
|
case OP_LDB:
|
case OP_LDH:
|
case OP_LDH:
|
case OP_LDW:
|
case OP_LDW:
|
case OP_LDWM:
|
case OP_LDWM:
|
case OP_STB:
|
case OP_STB:
|
case OP_STH:
|
case OP_STH:
|
case OP_STW:
|
case OP_STW:
|
case OP_STWM:
|
case OP_STWM:
|
if (abfd->arch_info->mach >= 25)
|
if (abfd->arch_info->mach >= 25)
|
return 16; /* Wide mode, format 16. */
|
return 16; /* Wide mode, format 16. */
|
return 14;
|
return 14;
|
|
|
case OP_FLDW:
|
case OP_FLDW:
|
case OP_LDWL:
|
case OP_LDWL:
|
case OP_FSTW:
|
case OP_FSTW:
|
case OP_STWL:
|
case OP_STWL:
|
/* This is a hack. Unfortunately, format 11 is already taken
|
/* This is a hack. Unfortunately, format 11 is already taken
|
and we're using integers rather than an enum, so it's hard
|
and we're using integers rather than an enum, so it's hard
|
to describe the 11a format. */
|
to describe the 11a format. */
|
if (abfd->arch_info->mach >= 25)
|
if (abfd->arch_info->mach >= 25)
|
return -16; /* Wide mode, format 16a. */
|
return -16; /* Wide mode, format 16a. */
|
return -11;
|
return -11;
|
|
|
case OP_LDD:
|
case OP_LDD:
|
case OP_STD:
|
case OP_STD:
|
if (abfd->arch_info->mach >= 25)
|
if (abfd->arch_info->mach >= 25)
|
return -10; /* Wide mode, format 10a. */
|
return -10; /* Wide mode, format 10a. */
|
return 10;
|
return 10;
|
|
|
case OP_BL:
|
case OP_BL:
|
if ((insn & 0x8000) != 0)
|
if ((insn & 0x8000) != 0)
|
return 22;
|
return 22;
|
/* fall thru */
|
/* fall thru */
|
case OP_BE:
|
case OP_BE:
|
case OP_BLE:
|
case OP_BLE:
|
return 17;
|
return 17;
|
|
|
case OP_LDIL:
|
case OP_LDIL:
|
case OP_ADDIL:
|
case OP_ADDIL:
|
return 21;
|
return 21;
|
|
|
default:
|
default:
|
break;
|
break;
|
}
|
}
|
return 32;
|
return 32;
|
}
|
}
|
|
|
|
|
/* Insert VALUE into INSN using R_FORMAT to determine exactly what
|
/* Insert VALUE into INSN using R_FORMAT to determine exactly what
|
bits to change. */
|
bits to change. */
|
|
|
static inline int
|
static inline int
|
hppa_rebuild_insn (int insn, int value, int r_format)
|
hppa_rebuild_insn (int insn, int value, int r_format)
|
{
|
{
|
switch (r_format)
|
switch (r_format)
|
{
|
{
|
case 11:
|
case 11:
|
return (insn & ~ 0x7ff) | low_sign_unext (value, 11);
|
return (insn & ~ 0x7ff) | low_sign_unext (value, 11);
|
|
|
case 12:
|
case 12:
|
return (insn & ~ 0x1ffd) | re_assemble_12 (value);
|
return (insn & ~ 0x1ffd) | re_assemble_12 (value);
|
|
|
|
|
case 10:
|
case 10:
|
return (insn & ~ 0x3ff1) | re_assemble_14 (value & -8);
|
return (insn & ~ 0x3ff1) | re_assemble_14 (value & -8);
|
|
|
case -11:
|
case -11:
|
return (insn & ~ 0x3ff9) | re_assemble_14 (value & -4);
|
return (insn & ~ 0x3ff9) | re_assemble_14 (value & -4);
|
|
|
case 14:
|
case 14:
|
return (insn & ~ 0x3fff) | re_assemble_14 (value);
|
return (insn & ~ 0x3fff) | re_assemble_14 (value);
|
|
|
|
|
case -10:
|
case -10:
|
return (insn & ~ 0xfff1) | re_assemble_16 (value & -8);
|
return (insn & ~ 0xfff1) | re_assemble_16 (value & -8);
|
|
|
case -16:
|
case -16:
|
return (insn & ~ 0xfff9) | re_assemble_16 (value & -4);
|
return (insn & ~ 0xfff9) | re_assemble_16 (value & -4);
|
|
|
case 16:
|
case 16:
|
return (insn & ~ 0xffff) | re_assemble_16 (value);
|
return (insn & ~ 0xffff) | re_assemble_16 (value);
|
|
|
|
|
case 17:
|
case 17:
|
return (insn & ~ 0x1f1ffd) | re_assemble_17 (value);
|
return (insn & ~ 0x1f1ffd) | re_assemble_17 (value);
|
|
|
case 21:
|
case 21:
|
return (insn & ~ 0x1fffff) | re_assemble_21 (value);
|
return (insn & ~ 0x1fffff) | re_assemble_21 (value);
|
|
|
case 22:
|
case 22:
|
return (insn & ~ 0x3ff1ffd) | re_assemble_22 (value);
|
return (insn & ~ 0x3ff1ffd) | re_assemble_22 (value);
|
|
|
case 32:
|
case 32:
|
return value;
|
return value;
|
|
|
default:
|
default:
|
abort ();
|
abort ();
|
}
|
}
|
return insn;
|
return insn;
|
}
|
}
|
|
|
#endif /* _LIBHPPA_H */
|
#endif /* _LIBHPPA_H */
|
|
|
