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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [opcodes/] [mcore-dis.c] - Diff between revs 827 and 840

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/* Disassemble Motorola M*Core instructions.
/* Disassemble Motorola M*Core instructions.
   Copyright 1993, 1999, 2000, 2001, 2002, 2005, 2007
   Copyright 1993, 1999, 2000, 2001, 2002, 2005, 2007
   Free Software Foundation, Inc.
   Free Software Foundation, Inc.
 
 
   This file is part of the GNU opcodes library.
   This file is part of the GNU opcodes library.
 
 
   This library is free software; you can redistribute it and/or modify
   This library is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   the Free Software Foundation; either version 3, or (at your option)
   any later version.
   any later version.
 
 
   It is distributed in the hope that it will be useful, but WITHOUT
   It is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.
   License for more details.
 
 
   You should have received a copy of the GNU General Public License
   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   along with this program; if not, write to the Free Software
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
   MA 02110-1301, USA.  */
   MA 02110-1301, USA.  */
 
 
#include "sysdep.h"
#include "sysdep.h"
#include <stdio.h>
#include <stdio.h>
#define STATIC_TABLE
#define STATIC_TABLE
#define DEFINE_TABLE
#define DEFINE_TABLE
 
 
#include "mcore-opc.h"
#include "mcore-opc.h"
#include "dis-asm.h"
#include "dis-asm.h"
 
 
/* Mask for each mcore_opclass: */
/* Mask for each mcore_opclass: */
static const unsigned short imsk[] = {
static const unsigned short imsk[] = {
    /* O0  */ 0xFFFF,
    /* O0  */ 0xFFFF,
    /* OT  */ 0xFFFC,
    /* OT  */ 0xFFFC,
    /* O1  */ 0xFFF0,
    /* O1  */ 0xFFF0,
    /* OC  */ 0xFE00,
    /* OC  */ 0xFE00,
    /* O2  */ 0xFF00,
    /* O2  */ 0xFF00,
    /* X1  */ 0xFFF0,
    /* X1  */ 0xFFF0,
    /* OI  */ 0xFE00,
    /* OI  */ 0xFE00,
    /* OB  */ 0xFE00,
    /* OB  */ 0xFE00,
 
 
    /* OMa */ 0xFFF0,
    /* OMa */ 0xFFF0,
    /* SI  */ 0xFE00,
    /* SI  */ 0xFE00,
    /* I7  */ 0xF800,
    /* I7  */ 0xF800,
    /* LS  */ 0xF000,
    /* LS  */ 0xF000,
    /* BR  */ 0xF800,
    /* BR  */ 0xF800,
    /* BL  */ 0xFF00,
    /* BL  */ 0xFF00,
    /* LR  */ 0xF000,
    /* LR  */ 0xF000,
    /* LJ  */ 0xFF00,
    /* LJ  */ 0xFF00,
 
 
    /* RM  */ 0xFFF0,
    /* RM  */ 0xFFF0,
    /* RQ  */ 0xFFF0,
    /* RQ  */ 0xFFF0,
    /* JSR */ 0xFFF0,
    /* JSR */ 0xFFF0,
    /* JMP */ 0xFFF0,
    /* JMP */ 0xFFF0,
    /* OBRa*/ 0xFFF0,
    /* OBRa*/ 0xFFF0,
    /* OBRb*/ 0xFF80,
    /* OBRb*/ 0xFF80,
    /* OBRc*/ 0xFF00,
    /* OBRc*/ 0xFF00,
    /* OBR2*/ 0xFE00,
    /* OBR2*/ 0xFE00,
 
 
    /* O1R1*/ 0xFFF0,
    /* O1R1*/ 0xFFF0,
    /* OMb */ 0xFF80,
    /* OMb */ 0xFF80,
    /* OMc */ 0xFF00,
    /* OMc */ 0xFF00,
    /* SIa */ 0xFE00,
    /* SIa */ 0xFE00,
 
 
  /* MULSH */ 0xFF00,
  /* MULSH */ 0xFF00,
  /* OPSR  */ 0xFFF8,   /* psrset/psrclr */
  /* OPSR  */ 0xFFF8,   /* psrset/psrclr */
 
 
    /* JC  */ 0,         /* JC,JU,JL don't appear in object */
    /* JC  */ 0,         /* JC,JU,JL don't appear in object */
    /* JU  */ 0,
    /* JU  */ 0,
    /* JL  */ 0,
    /* JL  */ 0,
    /* RSI */ 0,
    /* RSI */ 0,
    /* DO21*/ 0,
    /* DO21*/ 0,
    /* OB2 */ 0          /* OB2 won't appear in object.  */
    /* OB2 */ 0          /* OB2 won't appear in object.  */
};
};
 
 
static const char *grname[] = {
static const char *grname[] = {
 "r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",
 "r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",
 "r8",  "r9", "r10", "r11", "r12", "r13", "r14", "r15"
 "r8",  "r9", "r10", "r11", "r12", "r13", "r14", "r15"
};
};
 
 
static const char X[] = "??";
static const char X[] = "??";
 
 
static const char *crname[] = {
static const char *crname[] = {
  "psr",  "vbr", "epsr", "fpsr", "epc",  "fpc",  "ss0",  "ss1",
  "psr",  "vbr", "epsr", "fpsr", "epc",  "fpc",  "ss0",  "ss1",
  "ss2",  "ss3", "ss4",  "gcr",  "gsr",     X,      X,      X,
  "ss2",  "ss3", "ss4",  "gcr",  "gsr",     X,      X,      X,
     X,      X,      X,      X,      X,     X,      X,      X,
     X,      X,      X,      X,      X,     X,      X,      X,
     X,      X,      X,      X,      X,     X,      X,      X
     X,      X,      X,      X,      X,     X,      X,      X
};
};
 
 
static const unsigned isiz[] = { 2, 0, 1, 0 };
static const unsigned isiz[] = { 2, 0, 1, 0 };
 
 
int
int
print_insn_mcore (memaddr, info)
print_insn_mcore (memaddr, info)
     bfd_vma memaddr;
     bfd_vma memaddr;
     struct disassemble_info *info;
     struct disassemble_info *info;
{
{
  unsigned char ibytes[4];
  unsigned char ibytes[4];
  fprintf_ftype fprintf = info->fprintf_func;
  fprintf_ftype fprintf = info->fprintf_func;
  void *stream = info->stream;
  void *stream = info->stream;
  unsigned short inst;
  unsigned short inst;
  const mcore_opcode_info *op;
  const mcore_opcode_info *op;
  int status;
  int status;
 
 
  info->bytes_per_chunk = 2;
  info->bytes_per_chunk = 2;
 
 
  status = info->read_memory_func (memaddr, ibytes, 2, info);
  status = info->read_memory_func (memaddr, ibytes, 2, info);
 
 
  if (status != 0)
  if (status != 0)
    {
    {
      info->memory_error_func (status, memaddr, info);
      info->memory_error_func (status, memaddr, info);
      return -1;
      return -1;
    }
    }
 
 
  if (info->endian == BFD_ENDIAN_BIG)
  if (info->endian == BFD_ENDIAN_BIG)
    inst = (ibytes[0] << 8) | ibytes[1];
    inst = (ibytes[0] << 8) | ibytes[1];
  else if (info->endian == BFD_ENDIAN_LITTLE)
  else if (info->endian == BFD_ENDIAN_LITTLE)
    inst = (ibytes[1] << 8) | ibytes[0];
    inst = (ibytes[1] << 8) | ibytes[0];
  else
  else
    abort ();
    abort ();
 
 
  /* Just a linear search of the table.  */
  /* Just a linear search of the table.  */
  for (op = mcore_table; op->name != 0; op++)
  for (op = mcore_table; op->name != 0; op++)
    if (op->inst == (inst & imsk[op->opclass]))
    if (op->inst == (inst & imsk[op->opclass]))
      break;
      break;
 
 
  if (op->name == 0)
  if (op->name == 0)
    (*fprintf) (stream, ".short 0x%04x", inst);
    (*fprintf) (stream, ".short 0x%04x", inst);
  else
  else
    {
    {
      const char *name = grname[inst & 0x0F];
      const char *name = grname[inst & 0x0F];
 
 
      (*fprintf) (stream, "%s", op->name);
      (*fprintf) (stream, "%s", op->name);
 
 
      switch (op->opclass)
      switch (op->opclass)
        {
        {
        case O0:
        case O0:
          break;
          break;
 
 
        case OT:
        case OT:
          (*fprintf) (stream, "\t%d", inst & 0x3);
          (*fprintf) (stream, "\t%d", inst & 0x3);
          break;
          break;
 
 
        case O1:
        case O1:
        case JMP:
        case JMP:
        case JSR:
        case JSR:
          (*fprintf) (stream, "\t%s", name);
          (*fprintf) (stream, "\t%s", name);
          break;
          break;
 
 
        case OC:
        case OC:
          (*fprintf) (stream, "\t%s, %s", name, crname[(inst >> 4) & 0x1F]);
          (*fprintf) (stream, "\t%s, %s", name, crname[(inst >> 4) & 0x1F]);
          break;
          break;
 
 
        case O1R1:
        case O1R1:
          (*fprintf) (stream, "\t%s, r1", name);
          (*fprintf) (stream, "\t%s, r1", name);
          break;
          break;
 
 
        case MULSH:
        case MULSH:
        case O2:
        case O2:
          (*fprintf) (stream, "\t%s, %s", name, grname[(inst >> 4) & 0xF]);
          (*fprintf) (stream, "\t%s, %s", name, grname[(inst >> 4) & 0xF]);
          break;
          break;
 
 
        case X1:
        case X1:
          (*fprintf) (stream, "\tr1, %s", name);
          (*fprintf) (stream, "\tr1, %s", name);
          break;
          break;
 
 
        case OI:
        case OI:
          (*fprintf) (stream, "\t%s, %d", name, ((inst >> 4) & 0x1F) + 1);
          (*fprintf) (stream, "\t%s, %d", name, ((inst >> 4) & 0x1F) + 1);
          break;
          break;
 
 
        case RM:
        case RM:
          (*fprintf) (stream, "\t%s-r15, (r0)", name);
          (*fprintf) (stream, "\t%s-r15, (r0)", name);
          break;
          break;
 
 
        case RQ:
        case RQ:
          (*fprintf) (stream, "\tr4-r7, (%s)", name);
          (*fprintf) (stream, "\tr4-r7, (%s)", name);
          break;
          break;
 
 
        case OB:
        case OB:
        case OBRa:
        case OBRa:
        case OBRb:
        case OBRb:
        case OBRc:
        case OBRc:
        case SI:
        case SI:
        case SIa:
        case SIa:
        case OMa:
        case OMa:
        case OMb:
        case OMb:
        case OMc:
        case OMc:
          (*fprintf) (stream, "\t%s, %d", name, (inst >> 4) & 0x1F);
          (*fprintf) (stream, "\t%s, %d", name, (inst >> 4) & 0x1F);
          break;
          break;
 
 
        case I7:
        case I7:
          (*fprintf) (stream, "\t%s, %d", name, (inst >> 4) & 0x7F);
          (*fprintf) (stream, "\t%s, %d", name, (inst >> 4) & 0x7F);
          break;
          break;
 
 
        case LS:
        case LS:
          (*fprintf) (stream, "\t%s, (%s, %d)", grname[(inst >> 8) & 0xF],
          (*fprintf) (stream, "\t%s, (%s, %d)", grname[(inst >> 8) & 0xF],
                      name, ((inst >> 4) & 0xF) << isiz[(inst >> 13) & 3]);
                      name, ((inst >> 4) & 0xF) << isiz[(inst >> 13) & 3]);
          break;
          break;
 
 
        case BR:
        case BR:
          {
          {
            long val = inst & 0x3FF;
            long val = inst & 0x3FF;
 
 
            if (inst & 0x400)
            if (inst & 0x400)
              val |= 0xFFFFFC00;
              val |= 0xFFFFFC00;
 
 
            (*fprintf) (stream, "\t0x%lx", (long)(memaddr + 2 + (val << 1)));
            (*fprintf) (stream, "\t0x%lx", (long)(memaddr + 2 + (val << 1)));
 
 
            if (strcmp (op->name, "bsr") == 0)
            if (strcmp (op->name, "bsr") == 0)
              {
              {
                /* For bsr, we'll try to get a symbol for the target.  */
                /* For bsr, we'll try to get a symbol for the target.  */
                val = memaddr + 2 + (val << 1);
                val = memaddr + 2 + (val << 1);
 
 
                if (info->print_address_func && val != 0)
                if (info->print_address_func && val != 0)
                  {
                  {
                    (*fprintf) (stream, "\t// ");
                    (*fprintf) (stream, "\t// ");
                    info->print_address_func (val, info);
                    info->print_address_func (val, info);
                  }
                  }
              }
              }
          }
          }
          break;
          break;
 
 
        case BL:
        case BL:
          {
          {
            long val;
            long val;
            val = (inst & 0x000F);
            val = (inst & 0x000F);
            (*fprintf) (stream, "\t%s, 0x%lx",
            (*fprintf) (stream, "\t%s, 0x%lx",
                        grname[(inst >> 4) & 0xF],
                        grname[(inst >> 4) & 0xF],
                        (long) (memaddr - (val << 1)));
                        (long) (memaddr - (val << 1)));
          }
          }
          break;
          break;
 
 
        case LR:
        case LR:
          {
          {
            unsigned long val;
            unsigned long val;
 
 
            val = (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC;
            val = (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC;
 
 
            status = info->read_memory_func (val, ibytes, 4, info);
            status = info->read_memory_func (val, ibytes, 4, info);
            if (status != 0)
            if (status != 0)
              {
              {
                info->memory_error_func (status, memaddr, info);
                info->memory_error_func (status, memaddr, info);
                break;
                break;
              }
              }
 
 
            if (info->endian == BFD_ENDIAN_LITTLE)
            if (info->endian == BFD_ENDIAN_LITTLE)
              val = (ibytes[3] << 24) | (ibytes[2] << 16)
              val = (ibytes[3] << 24) | (ibytes[2] << 16)
                | (ibytes[1] << 8) | (ibytes[0]);
                | (ibytes[1] << 8) | (ibytes[0]);
            else
            else
              val = (ibytes[0] << 24) | (ibytes[1] << 16)
              val = (ibytes[0] << 24) | (ibytes[1] << 16)
                | (ibytes[2] << 8) | (ibytes[3]);
                | (ibytes[2] << 8) | (ibytes[3]);
 
 
            /* Removed [] around literal value to match ABI syntax 12/95.  */
            /* Removed [] around literal value to match ABI syntax 12/95.  */
            (*fprintf) (stream, "\t%s, 0x%lX", grname[(inst >> 8) & 0xF], val);
            (*fprintf) (stream, "\t%s, 0x%lX", grname[(inst >> 8) & 0xF], val);
 
 
            if (val == 0)
            if (val == 0)
              (*fprintf) (stream, "\t// from address pool at 0x%lx",
              (*fprintf) (stream, "\t// from address pool at 0x%lx",
                          (long) (memaddr + 2
                          (long) (memaddr + 2
                                  + ((inst & 0xFF) << 2)) & 0xFFFFFFFC);
                                  + ((inst & 0xFF) << 2)) & 0xFFFFFFFC);
          }
          }
          break;
          break;
 
 
        case LJ:
        case LJ:
          {
          {
            unsigned long val;
            unsigned long val;
 
 
            val = (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC;
            val = (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC;
 
 
            status = info->read_memory_func (val, ibytes, 4, info);
            status = info->read_memory_func (val, ibytes, 4, info);
            if (status != 0)
            if (status != 0)
              {
              {
                info->memory_error_func (status, memaddr, info);
                info->memory_error_func (status, memaddr, info);
                break;
                break;
              }
              }
 
 
            if (info->endian == BFD_ENDIAN_LITTLE)
            if (info->endian == BFD_ENDIAN_LITTLE)
              val = (ibytes[3] << 24) | (ibytes[2] << 16)
              val = (ibytes[3] << 24) | (ibytes[2] << 16)
                | (ibytes[1] << 8) | (ibytes[0]);
                | (ibytes[1] << 8) | (ibytes[0]);
            else
            else
              val = (ibytes[0] << 24) | (ibytes[1] << 16)
              val = (ibytes[0] << 24) | (ibytes[1] << 16)
                | (ibytes[2] << 8) | (ibytes[3]);
                | (ibytes[2] << 8) | (ibytes[3]);
 
 
            /* Removed [] around literal value to match ABI syntax 12/95.  */
            /* Removed [] around literal value to match ABI syntax 12/95.  */
            (*fprintf) (stream, "\t0x%lX", val);
            (*fprintf) (stream, "\t0x%lX", val);
            /* For jmpi/jsri, we'll try to get a symbol for the target.  */
            /* For jmpi/jsri, we'll try to get a symbol for the target.  */
            if (info->print_address_func && val != 0)
            if (info->print_address_func && val != 0)
              {
              {
                (*fprintf) (stream, "\t// ");
                (*fprintf) (stream, "\t// ");
                info->print_address_func (val, info);
                info->print_address_func (val, info);
              }
              }
            else
            else
              {
              {
                (*fprintf) (stream, "\t// from address pool at 0x%lx",
                (*fprintf) (stream, "\t// from address pool at 0x%lx",
                            (long) (memaddr + 2
                            (long) (memaddr + 2
                                    + ((inst & 0xFF) << 2)) & 0xFFFFFFFC);
                                    + ((inst & 0xFF) << 2)) & 0xFFFFFFFC);
              }
              }
          }
          }
          break;
          break;
 
 
        case OPSR:
        case OPSR:
          {
          {
            static char *fields[] = {
            static char *fields[] = {
              "af", "ie",    "fe",    "fe,ie",
              "af", "ie",    "fe",    "fe,ie",
              "ee", "ee,ie", "ee,fe", "ee,fe,ie"
              "ee", "ee,ie", "ee,fe", "ee,fe,ie"
            };
            };
 
 
            (*fprintf) (stream, "\t%s", fields[inst & 0x7]);
            (*fprintf) (stream, "\t%s", fields[inst & 0x7]);
          }
          }
          break;
          break;
 
 
        default:
        default:
          /* If the disassembler lags the instruction set.  */
          /* If the disassembler lags the instruction set.  */
          (*fprintf) (stream, "\tundecoded operands, inst is 0x%04x", inst);
          (*fprintf) (stream, "\tundecoded operands, inst is 0x%04x", inst);
          break;
          break;
        }
        }
    }
    }
 
 
  /* Say how many bytes we consumed.  */
  /* Say how many bytes we consumed.  */
  return 2;
  return 2;
}
}
 
 

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