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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [mips/] [ChangeLog] - Diff between revs 827 and 840

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Rev 827 Rev 840
2007-10-22  Richard Sandiford  
2007-10-22  Richard Sandiford  
        * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
        * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
        that unconditionally allows fmt_ps.
        that unconditionally allows fmt_ps.
        (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
        (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
        (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
        (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
        (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
        (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
        filter from 64,f to 32,f.
        filter from 64,f to 32,f.
        (PREFX): Change filter from 64 to 32.
        (PREFX): Change filter from 64 to 32.
        (LDXC1, LUXC1): Provide separate mips32r2 implementations
        (LDXC1, LUXC1): Provide separate mips32r2 implementations
        that use do_load_double instead of do_load.  Make both LUXC1
        that use do_load_double instead of do_load.  Make both LUXC1
        versions unpredictable if SizeFGR () != 64.
        versions unpredictable if SizeFGR () != 64.
        (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
        (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
        instead of do_store.  Remove unused variable.  Make both SUXC1
        instead of do_store.  Remove unused variable.  Make both SUXC1
        versions unpredictable if SizeFGR () != 64.
        versions unpredictable if SizeFGR () != 64.
2007-10-07  Richard Sandiford  
2007-10-07  Richard Sandiford  
        * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
        * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
        (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
        (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
        shifts for that case.
        shifts for that case.
2007-09-04  Nick Clifton  
2007-09-04  Nick Clifton  
        * interp.c (options enum): Add OPTION_INFO_MEMORY.
        * interp.c (options enum): Add OPTION_INFO_MEMORY.
        (display_mem_info): New static variable.
        (display_mem_info): New static variable.
        (mips_option_handler): Handle OPTION_INFO_MEMORY.
        (mips_option_handler): Handle OPTION_INFO_MEMORY.
        (mips_options): Add info-memory and memory-info.
        (mips_options): Add info-memory and memory-info.
        (sim_open): After processing the command line and board
        (sim_open): After processing the command line and board
        specification, check display_mem_info.  If it is set then
        specification, check display_mem_info.  If it is set then
        call the real handler for the --memory-info command line
        call the real handler for the --memory-info command line
        switch.
        switch.
2007-08-24  Joel Brobecker  
2007-08-24  Joel Brobecker  
        * configure.ac: Change license of multi-run.c to GPL version 3.
        * configure.ac: Change license of multi-run.c to GPL version 3.
        * configure: Regenerate.
        * configure: Regenerate.
2007-06-28  Richard Sandiford  
2007-06-28  Richard Sandiford  
        * configure.ac, configure: Revert last patch.
        * configure.ac, configure: Revert last patch.
2007-06-26  Richard Sandiford  
2007-06-26  Richard Sandiford  
        * configure.ac (sim_mipsisa3264_configs): New variable.
        * configure.ac (sim_mipsisa3264_configs): New variable.
        (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
        (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
        every configuration support all four targets, using the triplet to
        every configuration support all four targets, using the triplet to
        determine the default.
        determine the default.
        * configure: Regenerate.
        * configure: Regenerate.
2007-06-25  Richard Sandiford  
2007-06-25  Richard Sandiford  
        * Makefile.in (m16run.o): New rule.
        * Makefile.in (m16run.o): New rule.
2007-05-15  Thiemo Seufer  
2007-05-15  Thiemo Seufer  
        * mips3264r2.igen (DSHD): Fix compile warning.
        * mips3264r2.igen (DSHD): Fix compile warning.
2007-05-14  Thiemo Seufer  
2007-05-14  Thiemo Seufer  
        * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
        * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
        CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
        CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
        NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
        NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
        RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
        RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
        for mips32r2.
        for mips32r2.
2007-03-01  Thiemo Seufer  
2007-03-01  Thiemo Seufer  
        * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
        * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
        and mips64.
        and mips64.
2007-02-20  Thiemo Seufer  
2007-02-20  Thiemo Seufer  
        * dsp.igen: Update copyright notice.
        * dsp.igen: Update copyright notice.
        * dsp2.igen: Fix copyright notice.
        * dsp2.igen: Fix copyright notice.
2007-02-20  Thiemo Seufer  
2007-02-20  Thiemo Seufer  
            Chao-Ying Fu  
            Chao-Ying Fu  
        * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
        * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
        * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
        * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
        Add dsp2 to sim_igen_machine.
        Add dsp2 to sim_igen_machine.
        * configure: Regenerate.
        * configure: Regenerate.
        * dsp.igen (do_ph_op): Add MUL support when op = 2.
        * dsp.igen (do_ph_op): Add MUL support when op = 2.
        (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
        (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
        (mulq_rs.ph): Use do_ph_mulq.
        (mulq_rs.ph): Use do_ph_mulq.
        (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
        (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
        * mips.igen: Add dsp2 model and include dsp2.igen.
        * mips.igen: Add dsp2 model and include dsp2.igen.
        (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
        (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
        for *mips32r2, *mips64r2, *dsp.
        for *mips32r2, *mips64r2, *dsp.
        (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
        (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
        for *mips32r2, *mips64r2, *dsp2.
        for *mips32r2, *mips64r2, *dsp2.
        * dsp2.igen: New file for MIPS DSP REV 2 ASE.
        * dsp2.igen: New file for MIPS DSP REV 2 ASE.
2007-02-19  Thiemo Seufer  
2007-02-19  Thiemo Seufer  
            Nigel Stephens  
            Nigel Stephens  
        * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
        * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
        jumps with hazard barrier.
        jumps with hazard barrier.
2007-02-19  Thiemo Seufer  
2007-02-19  Thiemo Seufer  
            Nigel Stephens  
            Nigel Stephens  
        * interp.c (sim_monitor): Flush stdout and stderr file descriptors
        * interp.c (sim_monitor): Flush stdout and stderr file descriptors
        after each call to sim_io_write.
        after each call to sim_io_write.
2007-02-19  Thiemo Seufer  
2007-02-19  Thiemo Seufer  
            Nigel Stephens  
            Nigel Stephens  
        * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
        * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
        supported by this simulator.
        supported by this simulator.
        (decode_coproc): Recognise additional CP0 Config registers
        (decode_coproc): Recognise additional CP0 Config registers
        correctly.
        correctly.
2007-02-19  Thiemo Seufer  
2007-02-19  Thiemo Seufer  
            Nigel Stephens  
            Nigel Stephens  
            David Ung  
            David Ung  
        * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
        * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
        uninterpreted formats. If fmt is one of the uninterpreted types
        uninterpreted formats. If fmt is one of the uninterpreted types
        don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
        don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
        fmt_word, and fmt_uninterpreted_64 like fmt_long.
        fmt_word, and fmt_uninterpreted_64 like fmt_long.
        (store_fpr): When writing an invalid odd register, set the
        (store_fpr): When writing an invalid odd register, set the
        matching even register to fmt_unknown, not the following register.
        matching even register to fmt_unknown, not the following register.
        * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
        * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
        the the memory window at offset 0 set by --memory-size command
        the the memory window at offset 0 set by --memory-size command
        line option.
        line option.
        (sim_store_register): Handle storing 4 bytes to an 8 byte floating
        (sim_store_register): Handle storing 4 bytes to an 8 byte floating
        point register.
        point register.
        (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
        (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
        register.
        register.
        (sim_monitor): When returning the memory size to the MIPS
        (sim_monitor): When returning the memory size to the MIPS
        application, use the value in STATE_MEM_SIZE, not an arbitrary
        application, use the value in STATE_MEM_SIZE, not an arbitrary
        hardcoded value.
        hardcoded value.
        (cop_lw): Don' mess around with FPR_STATE, just pass
        (cop_lw): Don' mess around with FPR_STATE, just pass
        fmt_uninterpreted_32 to StoreFPR.
        fmt_uninterpreted_32 to StoreFPR.
        (cop_sw): Similarly.
        (cop_sw): Similarly.
        (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
        (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
        (cop_sd): Similarly.
        (cop_sd): Similarly.
        * mips.igen (not_word_value): Single version for mips32, mips64
        * mips.igen (not_word_value): Single version for mips32, mips64
        and mips16.
        and mips16.
2007-02-19  Thiemo Seufer 
2007-02-19  Thiemo Seufer 
            Nigel Stephens  
            Nigel Stephens  
        * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
        * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
        MBytes.
        MBytes.
2007-02-17  Thiemo Seufer  
2007-02-17  Thiemo Seufer  
        * configure.ac (mips*-sde-elf*): Move in front of generic machine
        * configure.ac (mips*-sde-elf*): Move in front of generic machine
        configuration.
        configuration.
        * configure: Regenerate.
        * configure: Regenerate.
2007-02-17  Thiemo Seufer  
2007-02-17  Thiemo Seufer  
        * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
        * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
        Add mdmx to sim_igen_machine.
        Add mdmx to sim_igen_machine.
        (mipsisa64*-*-*): Likewise. Remove dsp.
        (mipsisa64*-*-*): Likewise. Remove dsp.
        (mipsisa32*-*-*): Remove dsp.
        (mipsisa32*-*-*): Remove dsp.
        * configure: Regenerate.
        * configure: Regenerate.
2007-02-13  Thiemo Seufer  
2007-02-13  Thiemo Seufer  
        * configure.ac: Add mips*-sde-elf* target.
        * configure.ac: Add mips*-sde-elf* target.
        * configure: Regenerate.
        * configure: Regenerate.
2006-12-21  Hans-Peter Nilsson  
2006-12-21  Hans-Peter Nilsson  
        * acconfig.h: Remove.
        * acconfig.h: Remove.
        * config.in, configure: Regenerate.
        * config.in, configure: Regenerate.
2006-11-07  Thiemo Seufer  
2006-11-07  Thiemo Seufer  
        * dsp.igen (do_w_op): Fix compiler warning.
        * dsp.igen (do_w_op): Fix compiler warning.
2006-08-29  Thiemo Seufer  
2006-08-29  Thiemo Seufer  
            David Ung  
            David Ung  
        * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
        * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
        sim_igen_machine.
        sim_igen_machine.
        * configure: Regenerate.
        * configure: Regenerate.
        * mips.igen (model): Add smartmips.
        * mips.igen (model): Add smartmips.
        (MADDU): Increment ACX if carry.
        (MADDU): Increment ACX if carry.
        (do_mult): Clear ACX.
        (do_mult): Clear ACX.
        (ROR,RORV): Add smartmips.
        (ROR,RORV): Add smartmips.
        (include): Include smartmips.igen.
        (include): Include smartmips.igen.
        * sim-main.h (ACX): Set to REGISTERS[89].
        * sim-main.h (ACX): Set to REGISTERS[89].
        * smartmips.igen: New file.
        * smartmips.igen: New file.
2006-08-29  Thiemo Seufer  
2006-08-29  Thiemo Seufer  
            David Ung  
            David Ung  
        * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
        * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
        mips3264r2.igen. Add missing dependency rules.
        mips3264r2.igen. Add missing dependency rules.
        * m16e.igen: Support for mips16e save/restore instructions.
        * m16e.igen: Support for mips16e save/restore instructions.
2006-06-13  Richard Earnshaw  
2006-06-13  Richard Earnshaw  
        * configure: Regenerated.
        * configure: Regenerated.
2006-06-05  Daniel Jacobowitz  
2006-06-05  Daniel Jacobowitz  
        * configure: Regenerated.
        * configure: Regenerated.
2006-05-31  Daniel Jacobowitz  
2006-05-31  Daniel Jacobowitz  
        * configure: Regenerated.
        * configure: Regenerated.
2006-05-15 Chao-ying Fu  
2006-05-15 Chao-ying Fu  
        * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
        * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
2006-04-18  Nick Clifton  
2006-04-18  Nick Clifton  
        * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
        * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
        statement.
        statement.
2006-03-29  Hans-Peter Nilsson  
2006-03-29  Hans-Peter Nilsson  
        * configure: Regenerate.
        * configure: Regenerate.
2005-12-14  Chao-ying Fu  
2005-12-14  Chao-ying Fu  
        * Makefile.in (SIM_OBJS): Add dsp.o.
        * Makefile.in (SIM_OBJS): Add dsp.o.
        (dsp.o): New dependency.
        (dsp.o): New dependency.
        (IGEN_INCLUDE): Add dsp.igen.
        (IGEN_INCLUDE): Add dsp.igen.
        * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
        * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
        mipsisa64*-*-*): Add dsp to sim_igen_machine.
        mipsisa64*-*-*): Add dsp to sim_igen_machine.
        * configure: Regenerate.
        * configure: Regenerate.
        * mips.igen: Add dsp model and include dsp.igen.
        * mips.igen: Add dsp model and include dsp.igen.
        (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
        (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
        because these instructions are extended in DSP ASE.
        because these instructions are extended in DSP ASE.
        * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
        * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
        adding 6 DSP accumulator registers and 1 DSP control register.
        adding 6 DSP accumulator registers and 1 DSP control register.
        (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
        (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
        AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
        AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
        DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
        DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
        DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
        DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
        DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
        DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
        DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
        DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
        DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
        DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
        DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
        DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
        DSPCR_CCOND_SMASK): New define.
        DSPCR_CCOND_SMASK): New define.
        (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
        (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
        * dsp.c, dsp.igen: New files for MIPS DSP ASE.
        * dsp.c, dsp.igen: New files for MIPS DSP ASE.
2005-07-08  Ian Lance Taylor  
2005-07-08  Ian Lance Taylor  
        * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
        * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
2005-06-16  David Ung  
2005-06-16  David Ung  
            Nigel Stephens  
            Nigel Stephens  
        * mips.igen: New mips16e model and include m16e.igen.
        * mips.igen: New mips16e model and include m16e.igen.
        (check_u64): Add mips16e tag.
        (check_u64): Add mips16e tag.
        * m16e.igen: New file for MIPS16e instructions.
        * m16e.igen: New file for MIPS16e instructions.
        * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
        * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
        mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
        mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
        models.
        models.
        * configure: Regenerate.
        * configure: Regenerate.
2005-05-26  David Ung  
2005-05-26  David Ung  
        * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
        * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
        tags to all instructions which are applicable to the new ISAs.
        tags to all instructions which are applicable to the new ISAs.
        (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
        (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
        vr.igen.
        vr.igen.
        * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
        * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
        instructions.
        instructions.
        * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
        * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
        to mips.igen.
        to mips.igen.
        * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
        * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
        * configure: Regenerate.
        * configure: Regenerate.
2005-03-23  Mark Kettenis  
2005-03-23  Mark Kettenis  
        * configure: Regenerate.
        * configure: Regenerate.
2005-01-14  Andrew Cagney  
2005-01-14  Andrew Cagney  
        * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
        * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
        explicit call to AC_CONFIG_HEADER.
        explicit call to AC_CONFIG_HEADER.
        * configure: Regenerate.
        * configure: Regenerate.
2005-01-12  Andrew Cagney  
2005-01-12  Andrew Cagney  
        * configure.ac: Update to use ../common/common.m4.
        * configure.ac: Update to use ../common/common.m4.
        * configure: Re-generate.
        * configure: Re-generate.
2005-01-11  Andrew Cagney  
2005-01-11  Andrew Cagney  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
2005-01-07  Andrew Cagney  
2005-01-07  Andrew Cagney  
        * configure.ac: Rename configure.in, require autoconf 2.59.
        * configure.ac: Rename configure.in, require autoconf 2.59.
        * configure: Re-generate.
        * configure: Re-generate.
2004-12-08  Hans-Peter Nilsson  
2004-12-08  Hans-Peter Nilsson  
        * configure: Regenerate for ../common/aclocal.m4 update.
        * configure: Regenerate for ../common/aclocal.m4 update.
2004-09-24  Monika Chaddha  
2004-09-24  Monika Chaddha  
        Committed by Andrew Cagney.
        Committed by Andrew Cagney.
        * m16.igen (CMP, CMPI): Fix assembler.
        * m16.igen (CMP, CMPI): Fix assembler.
2004-08-18  Chris Demetriou  
2004-08-18  Chris Demetriou  
        * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
        * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
        * configure: Regenerate.
        * configure: Regenerate.
2004-06-25  Chris Demetriou  
2004-06-25  Chris Demetriou  
        * configure.in (sim_m16_machine): Include mipsIII.
        * configure.in (sim_m16_machine): Include mipsIII.
        * configure: Regenerate.
        * configure: Regenerate.
2004-05-11  Maciej W. Rozycki  
2004-05-11  Maciej W. Rozycki  
        * mips/interp.c (decode_coproc): Sign-extend the address retrieved
        * mips/interp.c (decode_coproc): Sign-extend the address retrieved
        from COP0_BADVADDR.
        from COP0_BADVADDR.
        * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
        * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
2004-04-10  Chris Demetriou  
2004-04-10  Chris Demetriou  
        * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
        * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
2004-04-09  Chris Demetriou  
2004-04-09  Chris Demetriou  
        * mips.igen (check_fmt): Remove.
        * mips.igen (check_fmt): Remove.
        (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
        (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
        (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
        (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
        (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
        (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
        (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
        (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
        (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
        (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
        (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
        (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
        (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
        (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
        (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
        (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
        (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
        (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
        (C.cnd.fmta): Remove incorrect call to check_fmt_p.
        (C.cnd.fmta): Remove incorrect call to check_fmt_p.
2004-04-09  Chris Demetriou  
2004-04-09  Chris Demetriou  
        * sb1.igen (check_sbx): New function.
        * sb1.igen (check_sbx): New function.
        (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
        (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
2004-03-29  Chris Demetriou  
2004-03-29  Chris Demetriou  
            Richard Sandiford  
            Richard Sandiford  
        * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
        * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
        (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
        (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
        * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
        * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
        separate implementations for mipsIV and mipsV.  Use new macros to
        separate implementations for mipsIV and mipsV.  Use new macros to
        determine whether the restrictions apply.
        determine whether the restrictions apply.
2004-01-19  Chris Demetriou  
2004-01-19  Chris Demetriou  
        * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
        * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
        (check_mult_hilo): Improve comments.
        (check_mult_hilo): Improve comments.
        (check_div_hilo): Likewise.  Also, fork off a new version
        (check_div_hilo): Likewise.  Also, fork off a new version
        to handle mips32/mips64 (since there are no hazards to check
        to handle mips32/mips64 (since there are no hazards to check
        in MIPS32/MIPS64).
        in MIPS32/MIPS64).
2003-06-17  Richard Sandiford  
2003-06-17  Richard Sandiford  
        * mips.igen (do_dmultx): Fix check for negative operands.
        * mips.igen (do_dmultx): Fix check for negative operands.
2003-05-16  Ian Lance Taylor  
2003-05-16  Ian Lance Taylor  
        * Makefile.in (SHELL): Make sure this is defined.
        * Makefile.in (SHELL): Make sure this is defined.
        (various): Use $(SHELL) whenever we invoke move-if-change.
        (various): Use $(SHELL) whenever we invoke move-if-change.
2003-05-03  Chris Demetriou  
2003-05-03  Chris Demetriou  
        * cp1.c: Tweak attribution slightly.
        * cp1.c: Tweak attribution slightly.
        * cp1.h: Likewise.
        * cp1.h: Likewise.
        * mdmx.c: Likewise.
        * mdmx.c: Likewise.
        * mdmx.igen: Likewise.
        * mdmx.igen: Likewise.
        * mips3d.igen: Likewise.
        * mips3d.igen: Likewise.
        * sb1.igen: Likewise.
        * sb1.igen: Likewise.
2003-04-15  Richard Sandiford  
2003-04-15  Richard Sandiford  
        * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
        * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
        unsigned operands.
        unsigned operands.
2003-02-27  Andrew Cagney  
2003-02-27  Andrew Cagney  
        * interp.c (sim_open): Rename _bfd to bfd.
        * interp.c (sim_open): Rename _bfd to bfd.
        (sim_create_inferior): Ditto.
        (sim_create_inferior): Ditto.
2003-01-14  Chris Demetriou  
2003-01-14  Chris Demetriou  
        * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
        * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
2003-01-14  Chris Demetriou  
2003-01-14  Chris Demetriou  
        * mips.igen (EI, DI): Remove.
        * mips.igen (EI, DI): Remove.
2003-01-05  Richard Sandiford  
2003-01-05  Richard Sandiford  
        * Makefile.in (tmp-run-multi): Fix mips16 filter.
        * Makefile.in (tmp-run-multi): Fix mips16 filter.
2003-01-04  Richard Sandiford  
2003-01-04  Richard Sandiford  
            Andrew Cagney  
            Andrew Cagney  
            Gavin Romig-Koch  
            Gavin Romig-Koch  
            Graydon Hoare  
            Graydon Hoare  
            Aldy Hernandez  
            Aldy Hernandez  
            Dave Brolley  
            Dave Brolley  
            Chris Demetriou  
            Chris Demetriou  
        * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
        * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
        (sim_mach_default): New variable.
        (sim_mach_default): New variable.
        (mips64vr-*-*, mips64vrel-*-*): New configurations.
        (mips64vr-*-*, mips64vrel-*-*): New configurations.
        Add a new simulator generator, MULTI.
        Add a new simulator generator, MULTI.
        * configure: Regenerate.
        * configure: Regenerate.
        * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
        * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
        (multi-run.o): New dependency.
        (multi-run.o): New dependency.
        (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
        (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
        (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
        (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
        (tmp-multi): Combine them.
        (tmp-multi): Combine them.
        (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
        (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
        (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
        (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
        (distclean-extra): New rule.
        (distclean-extra): New rule.
        * sim-main.h: Include bfd.h.
        * sim-main.h: Include bfd.h.
        (MIPS_MACH): New macro.
        (MIPS_MACH): New macro.
        * mips.igen (vr4120, vr5400, vr5500): New models.
        * mips.igen (vr4120, vr5400, vr5500): New models.
        (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
        (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
        * vr.igen: Replace with new version.
        * vr.igen: Replace with new version.
2003-01-04  Chris Demetriou  
2003-01-04  Chris Demetriou  
        * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
        * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
        * configure: Regenerate.
        * configure: Regenerate.
2002-12-31  Chris Demetriou  
2002-12-31  Chris Demetriou  
        * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
        * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
        * mips.igen: Remove all invocations of check_branch_bug and
        * mips.igen: Remove all invocations of check_branch_bug and
        mark_branch_bug.
        mark_branch_bug.
2002-12-16  Chris Demetriou  
2002-12-16  Chris Demetriou  
        * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
        * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
2002-07-30  Chris Demetriou  
2002-07-30  Chris Demetriou  
        * mips.igen (do_load_double, do_store_double): New functions.
        * mips.igen (do_load_double, do_store_double): New functions.
        (LDC1, SDC1): Rename to...
        (LDC1, SDC1): Rename to...
        (LDC1b, SDC1b): respectively.
        (LDC1b, SDC1b): respectively.
        (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
        (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
2002-07-29  Michael Snyder  
2002-07-29  Michael Snyder  
        * cp1.c (fp_recip2): Modify initialization expression so that
        * cp1.c (fp_recip2): Modify initialization expression so that
        GCC will recognize it as constant.
        GCC will recognize it as constant.
2002-06-18  Chris Demetriou  
2002-06-18  Chris Demetriou  
        * mdmx.c (SD_): Delete.
        * mdmx.c (SD_): Delete.
        (Unpredictable): Re-define, for now, to directly invoke
        (Unpredictable): Re-define, for now, to directly invoke
        unpredictable_action().
        unpredictable_action().
        (mdmx_acc_op): Fix error in .ob immediate handling.
        (mdmx_acc_op): Fix error in .ob immediate handling.
2002-06-18  Andrew Cagney  
2002-06-18  Andrew Cagney  
        * interp.c (sim_firmware_command): Initialize `address'.
        * interp.c (sim_firmware_command): Initialize `address'.
2002-06-16  Andrew Cagney  
2002-06-16  Andrew Cagney  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
2002-06-14  Chris Demetriou  
2002-06-14  Chris Demetriou  
            Ed Satterthwaite  
            Ed Satterthwaite  
        * mips3d.igen: New file which contains MIPS-3D ASE instructions.
        * mips3d.igen: New file which contains MIPS-3D ASE instructions.
        * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
        * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
        * mips.igen: Include mips3d.igen.
        * mips.igen: Include mips3d.igen.
        (mips3d): New model name for MIPS-3D ASE instructions.
        (mips3d): New model name for MIPS-3D ASE instructions.
        (CVT.W.fmt): Don't use this instruction for word (source) format
        (CVT.W.fmt): Don't use this instruction for word (source) format
        instructions.
        instructions.
        * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
        * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
        (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
        (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
        (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
        (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
        (NR_FRAC_GUARD, IMPLICIT_1): New macros.
        (NR_FRAC_GUARD, IMPLICIT_1): New macros.
        * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
        * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
        (RSquareRoot1, RSquareRoot2): New macros.
        (RSquareRoot1, RSquareRoot2): New macros.
        (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
        (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
        (fp_rsqrt2): New functions.
        (fp_rsqrt2): New functions.
        * configure.in: Add MIPS-3D support to mipsisa64 simulator.
        * configure.in: Add MIPS-3D support to mipsisa64 simulator.
        * configure: Regenerate.
        * configure: Regenerate.
2002-06-13  Chris Demetriou  
2002-06-13  Chris Demetriou  
            Ed Satterthwaite  
            Ed Satterthwaite  
        * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
        * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
        (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
        (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
        (fp_inv_sqrt, fpu_format_name): Add paired-single support.
        (fp_inv_sqrt, fpu_format_name): Add paired-single support.
        (convert): Note that this function is not used for paired-single
        (convert): Note that this function is not used for paired-single
        format conversions.
        format conversions.
        (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
        (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
        * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
        * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
        (check_fmt_p): Enable paired-single support.
        (check_fmt_p): Enable paired-single support.
        (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
        (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
        (PUU.PS): New instructions.
        (PUU.PS): New instructions.
        (CVT.S.fmt): Don't use this instruction for paired-single format
        (CVT.S.fmt): Don't use this instruction for paired-single format
        destinations.
        destinations.
        * sim-main.h (FP_formats): New value 'fmt_ps.'
        * sim-main.h (FP_formats): New value 'fmt_ps.'
        (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
        (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
        (PSLower, PSUpper, PackPS, ConvertPS): New macros.
        (PSLower, PSUpper, PackPS, ConvertPS): New macros.
2002-06-12  Chris Demetriou  
2002-06-12  Chris Demetriou  
        * mips.igen: Fix formatting of function calls in
        * mips.igen: Fix formatting of function calls in
        many FP operations.
        many FP operations.
2002-06-12  Chris Demetriou  
2002-06-12  Chris Demetriou  
        * mips.igen (MOVN, MOVZ): Trace result.
        * mips.igen (MOVN, MOVZ): Trace result.
        (TNEI): Print "tnei" as the opcode name in traces.
        (TNEI): Print "tnei" as the opcode name in traces.
        (CEIL.W): Add disassembly string for traces.
        (CEIL.W): Add disassembly string for traces.
        (RSQRT.fmt): Make location of disassembly string consistent
        (RSQRT.fmt): Make location of disassembly string consistent
        with other instructions.
        with other instructions.
2002-06-12  Chris Demetriou  
2002-06-12  Chris Demetriou  
        * mips.igen (X): Delete unused function.
        * mips.igen (X): Delete unused function.
2002-06-08  Andrew Cagney  
2002-06-08  Andrew Cagney  
        * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
        * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
2002-06-07  Chris Demetriou  
2002-06-07  Chris Demetriou  
            Ed Satterthwaite  
            Ed Satterthwaite  
        * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
        * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
        (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
        (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
        * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
        * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
        (fp_nmsub): New prototypes.
        (fp_nmsub): New prototypes.
        (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
        (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
        (NegMultiplySub): New defines.
        (NegMultiplySub): New defines.
        * mips.igen (RSQRT.fmt): Use RSquareRoot().
        * mips.igen (RSQRT.fmt): Use RSquareRoot().
        (MADD.D, MADD.S): Replace with...
        (MADD.D, MADD.S): Replace with...
        (MADD.fmt): New instruction.
        (MADD.fmt): New instruction.
        (MSUB.D, MSUB.S): Replace with...
        (MSUB.D, MSUB.S): Replace with...
        (MSUB.fmt): New instruction.
        (MSUB.fmt): New instruction.
        (NMADD.D, NMADD.S): Replace with...
        (NMADD.D, NMADD.S): Replace with...
        (NMADD.fmt): New instruction.
        (NMADD.fmt): New instruction.
        (NMSUB.D, MSUB.S): Replace with...
        (NMSUB.D, MSUB.S): Replace with...
        (NMSUB.fmt): New instruction.
        (NMSUB.fmt): New instruction.
2002-06-07  Chris Demetriou  
2002-06-07  Chris Demetriou  
            Ed Satterthwaite  
            Ed Satterthwaite  
        * cp1.c: Fix more comment spelling and formatting.
        * cp1.c: Fix more comment spelling and formatting.
        (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
        (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
        (denorm_mode): New function.
        (denorm_mode): New function.
        (fpu_unary, fpu_binary): Round results after operation, collect
        (fpu_unary, fpu_binary): Round results after operation, collect
        status from rounding operations, and update the FCSR.
        status from rounding operations, and update the FCSR.
        (convert): Collect status from integer conversions and rounding
        (convert): Collect status from integer conversions and rounding
        operations, and update the FCSR.  Adjust NaN values that result
        operations, and update the FCSR.  Adjust NaN values that result
        from conversions.  Convert to use sim_io_eprintf rather than
        from conversions.  Convert to use sim_io_eprintf rather than
        fprintf, and remove some debugging code.
        fprintf, and remove some debugging code.
        * cp1.h (fenr_FS): New define.
        * cp1.h (fenr_FS): New define.
2002-06-07  Chris Demetriou  
2002-06-07  Chris Demetriou  
        * cp1.c (convert): Remove unusable debugging code, and move MIPS
        * cp1.c (convert): Remove unusable debugging code, and move MIPS
        rounding mode to sim FP rounding mode flag conversion code into...
        rounding mode to sim FP rounding mode flag conversion code into...
        (rounding_mode): New function.
        (rounding_mode): New function.
2002-06-07  Chris Demetriou  
2002-06-07  Chris Demetriou  
        * cp1.c: Clean up formatting of a few comments.
        * cp1.c: Clean up formatting of a few comments.
        (value_fpr): Reformat switch statement.
        (value_fpr): Reformat switch statement.
2002-06-06  Chris Demetriou  
2002-06-06  Chris Demetriou  
            Ed Satterthwaite  
            Ed Satterthwaite  
        * cp1.h: New file.
        * cp1.h: New file.
        * sim-main.h: Include cp1.h.
        * sim-main.h: Include cp1.h.
        (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
        (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
        (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
        (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
        (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
        (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
        (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
        (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
        (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
        (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
        (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
        (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
        * cp1.c: Don't include sim-fpu.h; already included by
        * cp1.c: Don't include sim-fpu.h; already included by
        sim-main.h.  Clean up formatting of some comments.
        sim-main.h.  Clean up formatting of some comments.
        (NaN, Equal, Less): Remove.
        (NaN, Equal, Less): Remove.
        (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
        (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
        (fp_cmp): New functions.
        (fp_cmp): New functions.
        * mips.igen (do_c_cond_fmt): Remove.
        * mips.igen (do_c_cond_fmt): Remove.
        (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
        (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
        Compare.  Add result tracing.
        Compare.  Add result tracing.
        (CxC1): Remove, replace with...
        (CxC1): Remove, replace with...
        (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
        (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
        (DMxC1): Remove, replace with...
        (DMxC1): Remove, replace with...
        (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
        (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
        (MxC1): Remove, replace with...
        (MxC1): Remove, replace with...
        (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
        (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
2002-06-04  Chris Demetriou  
2002-06-04  Chris Demetriou  
        * sim-main.h (FGRIDX): Remove, replace all uses with...
        * sim-main.h (FGRIDX): Remove, replace all uses with...
        (FGR_BASE): New macro.
        (FGR_BASE): New macro.
        (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
        (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
        (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
        (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
        (NR_FGR, FGR): Likewise.
        (NR_FGR, FGR): Likewise.
        * interp.c: Replace all uses of FGRIDX with FGR_BASE.
        * interp.c: Replace all uses of FGRIDX with FGR_BASE.
        * mips.igen: Likewise.
        * mips.igen: Likewise.
2002-06-04  Chris Demetriou  
2002-06-04  Chris Demetriou  
        * cp1.c: Add an FSF Copyright notice to this file.
        * cp1.c: Add an FSF Copyright notice to this file.
2002-06-04  Chris Demetriou  
2002-06-04  Chris Demetriou  
            Ed Satterthwaite  
            Ed Satterthwaite  
        * cp1.c (Infinity): Remove.
        * cp1.c (Infinity): Remove.
        * sim-main.h (Infinity): Likewise.
        * sim-main.h (Infinity): Likewise.
        * cp1.c (fp_unary, fp_binary): New functions.
        * cp1.c (fp_unary, fp_binary): New functions.
        (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
        (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
        (fp_sqrt): New functions, implemented in terms of the above.
        (fp_sqrt): New functions, implemented in terms of the above.
        (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
        (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
        (Recip, SquareRoot): Remove (replaced by functions above).
        (Recip, SquareRoot): Remove (replaced by functions above).
        * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
        * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
        (fp_recip, fp_sqrt): New prototypes.
        (fp_recip, fp_sqrt): New prototypes.
        (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
        (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
        (Recip, SquareRoot): Replace prototypes with #defines which
        (Recip, SquareRoot): Replace prototypes with #defines which
        invoke the functions above.
        invoke the functions above.
2002-06-03  Chris Demetriou  
2002-06-03  Chris Demetriou  
        * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
        * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
        (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
        (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
        file, remove PARAMS from prototypes.
        file, remove PARAMS from prototypes.
        (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
        (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
        simulator state arguments.
        simulator state arguments.
        (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
        (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
        pass simulator state arguments.
        pass simulator state arguments.
        * cp1.c (SD): Redefine as CPU_STATE(cpu).
        * cp1.c (SD): Redefine as CPU_STATE(cpu).
        (store_fpr, convert): Remove 'sd' argument.
        (store_fpr, convert): Remove 'sd' argument.
        (value_fpr): Likewise.  Convert to use 'SD' instead.
        (value_fpr): Likewise.  Convert to use 'SD' instead.
2002-06-03  Chris Demetriou  
2002-06-03  Chris Demetriou  
        * cp1.c (Min, Max): Remove #if 0'd functions.
        * cp1.c (Min, Max): Remove #if 0'd functions.
        * sim-main.h (Min, Max): Remove.
        * sim-main.h (Min, Max): Remove.
2002-06-03  Chris Demetriou  
2002-06-03  Chris Demetriou  
        * cp1.c: fix formatting of switch case and default labels.
        * cp1.c: fix formatting of switch case and default labels.
        * interp.c: Likewise.
        * interp.c: Likewise.
        * sim-main.c: Likewise.
        * sim-main.c: Likewise.
2002-06-03  Chris Demetriou  
2002-06-03  Chris Demetriou  
        * cp1.c: Clean up comments which describe FP formats.
        * cp1.c: Clean up comments which describe FP formats.
         (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
         (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
2002-06-03  Chris Demetriou  
2002-06-03  Chris Demetriou  
            Ed Satterthwaite  
            Ed Satterthwaite  
        * configure.in (mipsisa64sb1*-*-*): New target for supporting
        * configure.in (mipsisa64sb1*-*-*): New target for supporting
        Broadcom SiByte SB-1 processor configurations.
        Broadcom SiByte SB-1 processor configurations.
        * configure: Regenerate.
        * configure: Regenerate.
        * sb1.igen: New file.
        * sb1.igen: New file.
        * mips.igen: Include sb1.igen.
        * mips.igen: Include sb1.igen.
        (sb1): New model.
        (sb1): New model.
        * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
        * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
        * mdmx.igen: Add "sb1" model to all appropriate functions and
        * mdmx.igen: Add "sb1" model to all appropriate functions and
        instructions.
        instructions.
        * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
        * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
        (ob_func, ob_acc): Reference the above.
        (ob_func, ob_acc): Reference the above.
        (qh_acc): Adjust to keep the same size as ob_acc.
        (qh_acc): Adjust to keep the same size as ob_acc.
        * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
        * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
        (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
        (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
2002-06-03  Chris Demetriou  
2002-06-03  Chris Demetriou  
        * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
        * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
2002-06-02  Chris Demetriou  
2002-06-02  Chris Demetriou  
            Ed Satterthwaite  
            Ed Satterthwaite  
        * mips.igen (mdmx): New (pseudo-)model.
        * mips.igen (mdmx): New (pseudo-)model.
        * mdmx.c, mdmx.igen: New files.
        * mdmx.c, mdmx.igen: New files.
        * Makefile.in (SIM_OBJS): Add mdmx.o.
        * Makefile.in (SIM_OBJS): Add mdmx.o.
        * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
        * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
        New typedefs.
        New typedefs.
        (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
        (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
        (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
        (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
        (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
        (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
        (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
        (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
        (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
        (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
        (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
        (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
        (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
        (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
        (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
        (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
        (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
        (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
        (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
        (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
        (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
        (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
        (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
        (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
        (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
        (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
        (qh_fmtsel): New macros.
        (qh_fmtsel): New macros.
        (_sim_cpu): New member "acc".
        (_sim_cpu): New member "acc".
        (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
        (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
        (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
        (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
2002-05-01  Chris Demetriou  
2002-05-01  Chris Demetriou  
        * interp.c: Use 'deprecated' rather than 'depreciated.'
        * interp.c: Use 'deprecated' rather than 'depreciated.'
        * sim-main.h: Likewise.
        * sim-main.h: Likewise.
2002-05-01  Chris Demetriou  
2002-05-01  Chris Demetriou  
        * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
        * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
        which wouldn't compile anyway.
        which wouldn't compile anyway.
        * sim-main.h (unpredictable_action): New function prototype.
        * sim-main.h (unpredictable_action): New function prototype.
        (Unpredictable): Define to call igen function unpredictable().
        (Unpredictable): Define to call igen function unpredictable().
        (NotWordValue): New macro to call igen function not_word_value().
        (NotWordValue): New macro to call igen function not_word_value().
        (UndefinedResult): Remove.
        (UndefinedResult): Remove.
        * interp.c (undefined_result): Remove.
        * interp.c (undefined_result): Remove.
        (unpredictable_action): New function.
        (unpredictable_action): New function.
        * mips.igen (not_word_value, unpredictable): New functions.
        * mips.igen (not_word_value, unpredictable): New functions.
        (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
        (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
        (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
        (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
        (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
        (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
        NotWordValue() to check for unpredictable inputs, then
        NotWordValue() to check for unpredictable inputs, then
        Unpredictable() to handle them.
        Unpredictable() to handle them.
2002-02-24  Chris Demetriou  
2002-02-24  Chris Demetriou  
        * mips.igen: Fix formatting of calls to Unpredictable().
        * mips.igen: Fix formatting of calls to Unpredictable().
2002-04-20  Andrew Cagney  
2002-04-20  Andrew Cagney  
        * interp.c (sim_open): Revert previous change.
        * interp.c (sim_open): Revert previous change.
2002-04-18  Alexandre Oliva  
2002-04-18  Alexandre Oliva  
        * interp.c (sim_open): Disable chunk of code that wrote code in
        * interp.c (sim_open): Disable chunk of code that wrote code in
        vector table entries.
        vector table entries.
2002-03-19  Chris Demetriou  
2002-03-19  Chris Demetriou  
        * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
        * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
        (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
        (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
        unused definitions.
        unused definitions.
2002-03-19  Chris Demetriou  
2002-03-19  Chris Demetriou  
        * cp1.c: Fix many formatting issues.
        * cp1.c: Fix many formatting issues.
2002-03-19  Chris G. Demetriou  
2002-03-19  Chris G. Demetriou  
        * cp1.c (fpu_format_name): New function to replace...
        * cp1.c (fpu_format_name): New function to replace...
        (DOFMT): This.  Delete, and update all callers.
        (DOFMT): This.  Delete, and update all callers.
        (fpu_rounding_mode_name): New function to replace...
        (fpu_rounding_mode_name): New function to replace...
        (RMMODE): This.  Delete, and update all callers.
        (RMMODE): This.  Delete, and update all callers.
2002-03-19  Chris G. Demetriou  
2002-03-19  Chris G. Demetriou  
        * interp.c: Move FPU support routines from here to...
        * interp.c: Move FPU support routines from here to...
        * cp1.c: Here.  New file.
        * cp1.c: Here.  New file.
        * Makefile.in (SIM_OBJS): Add cp1.o to object list.
        * Makefile.in (SIM_OBJS): Add cp1.o to object list.
        (cp1.o): New target.
        (cp1.o): New target.
2002-03-12  Chris Demetriou  
2002-03-12  Chris Demetriou  
        * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
        * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
        * mips.igen (mips32, mips64): New models, add to all instructions
        * mips.igen (mips32, mips64): New models, add to all instructions
        and functions as appropriate.
        and functions as appropriate.
        (loadstore_ea, check_u64): New variant for model mips64.
        (loadstore_ea, check_u64): New variant for model mips64.
        (check_fmt_p): New variant for models mipsV and mips64, remove
        (check_fmt_p): New variant for models mipsV and mips64, remove
        mipsV model marking fro other variant.
        mipsV model marking fro other variant.
        (SLL) Rename to...
        (SLL) Rename to...
        (SLLa) this.
        (SLLa) this.
        (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
        (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
        for mips32 and mips64.
        for mips32 and mips64.
        (DCLO, DCLZ): New instructions for mips64.
        (DCLO, DCLZ): New instructions for mips64.
2002-03-07  Chris Demetriou  
2002-03-07  Chris Demetriou  
        * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
        * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
        immediate or code as a hex value with the "%#lx" format.
        immediate or code as a hex value with the "%#lx" format.
        (ANDI): Likewise, and fix printed instruction name.
        (ANDI): Likewise, and fix printed instruction name.
2002-03-05  Chris Demetriou  
2002-03-05  Chris Demetriou  
        * sim-main.h (UndefinedResult, Unpredictable): New macros
        * sim-main.h (UndefinedResult, Unpredictable): New macros
        which currently do nothing.
        which currently do nothing.
2002-03-05  Chris Demetriou  
2002-03-05  Chris Demetriou  
        * sim-main.h (status_UX, status_SX, status_KX, status_TS)
        * sim-main.h (status_UX, status_SX, status_KX, status_TS)
        (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
        (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
        (status_CU3): New definitions.
        (status_CU3): New definitions.
        * sim-main.h (ExceptionCause): Add new values for MIPS32
        * sim-main.h (ExceptionCause): Add new values for MIPS32
        and MIPS64: MDMX, MCheck, CacheErr.  Update comments
        and MIPS64: MDMX, MCheck, CacheErr.  Update comments
        for DebugBreakPoint and NMIReset to note their status in
        for DebugBreakPoint and NMIReset to note their status in
        MIPS32 and MIPS64.
        MIPS32 and MIPS64.
        (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
        (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
        (SignalExceptionCacheErr): New exception macros.
        (SignalExceptionCacheErr): New exception macros.
2002-03-05  Chris Demetriou  
2002-03-05  Chris Demetriou  
        * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
        * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
        * sim-main.h (COP_Usable): Define, but for now coprocessor 1
        * sim-main.h (COP_Usable): Define, but for now coprocessor 1
        is always enabled.
        is always enabled.
        (SignalExceptionCoProcessorUnusable): Take as argument the
        (SignalExceptionCoProcessorUnusable): Take as argument the
        unusable coprocessor number.
        unusable coprocessor number.
2002-03-05  Chris Demetriou  
2002-03-05  Chris Demetriou  
        * mips.igen: Fix formatting of all SignalException calls.
        * mips.igen: Fix formatting of all SignalException calls.
2002-03-05  Chris Demetriou  
2002-03-05  Chris Demetriou  
        * sim-main.h (SIGNEXTEND): Remove.
        * sim-main.h (SIGNEXTEND): Remove.
2002-03-04  Chris Demetriou  
2002-03-04  Chris Demetriou  
        * mips.igen: Remove gencode comment from top of file, fix
        * mips.igen: Remove gencode comment from top of file, fix
        spelling in another comment.
        spelling in another comment.
2002-03-04  Chris Demetriou  
2002-03-04  Chris Demetriou  
        * mips.igen (check_fmt, check_fmt_p): New functions to check
        * mips.igen (check_fmt, check_fmt_p): New functions to check
        whether specific floating point formats are usable.
        whether specific floating point formats are usable.
        (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
        (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
        (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
        (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
        (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
        (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
        Use the new functions.
        Use the new functions.
        (do_c_cond_fmt): Remove format checks...
        (do_c_cond_fmt): Remove format checks...
        (C.cond.fmta, C.cond.fmtb): And move them into all callers.
        (C.cond.fmta, C.cond.fmtb): And move them into all callers.
2002-03-03  Chris Demetriou  
2002-03-03  Chris Demetriou  
        * mips.igen: Fix formatting of check_fpu calls.
        * mips.igen: Fix formatting of check_fpu calls.
2002-03-03  Chris Demetriou  
2002-03-03  Chris Demetriou  
        * mips.igen (FLOOR.L.fmt): Store correct destination register.
        * mips.igen (FLOOR.L.fmt): Store correct destination register.
2002-03-03  Chris Demetriou  
2002-03-03  Chris Demetriou  
        * mips.igen: Remove whitespace at end of lines.
        * mips.igen: Remove whitespace at end of lines.
2002-03-02  Chris Demetriou  
2002-03-02  Chris Demetriou  
        * mips.igen (loadstore_ea): New function to do effective
        * mips.igen (loadstore_ea): New function to do effective
        address calculations.
        address calculations.
        (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
        (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
        do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
        do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
        CACHE): Use loadstore_ea to do effective address computations.
        CACHE): Use loadstore_ea to do effective address computations.
2002-03-02  Chris Demetriou  
2002-03-02  Chris Demetriou  
        * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
        * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
        * mips.igen (LL, CxC1, MxC1): Likewise.
        * mips.igen (LL, CxC1, MxC1): Likewise.
2002-03-02  Chris Demetriou  
2002-03-02  Chris Demetriou  
        * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
        * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
        CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
        CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
        FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
        FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
        MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
        MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
        NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
        NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
        SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
        SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
        Don't split opcode fields by hand, use the opcode field values
        Don't split opcode fields by hand, use the opcode field values
        provided by igen.
        provided by igen.
2002-03-01  Chris Demetriou  
2002-03-01  Chris Demetriou  
        * mips.igen (do_divu): Fix spacing.
        * mips.igen (do_divu): Fix spacing.
        * mips.igen (do_dsllv): Move to be right before DSLLV,
        * mips.igen (do_dsllv): Move to be right before DSLLV,
        to match the rest of the do_ functions.
        to match the rest of the do_ functions.
2002-03-01  Chris Demetriou  
2002-03-01  Chris Demetriou  
        * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
        * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
        DSRL32, do_dsrlv): Trace inputs and results.
        DSRL32, do_dsrlv): Trace inputs and results.
2002-03-01  Chris Demetriou  
2002-03-01  Chris Demetriou  
        * mips.igen (CACHE): Provide instruction-printing string.
        * mips.igen (CACHE): Provide instruction-printing string.
        * interp.c (signal_exception): Comment tokens after #endif.
        * interp.c (signal_exception): Comment tokens after #endif.
2002-02-28  Chris Demetriou  
2002-02-28  Chris Demetriou  
        * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
        * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
        (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
        (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
        NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
        NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
        ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
        ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
        CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
        CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
        C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
        C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
        SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
        SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
        LWC1, SWC1): Add "f" to filter, since these are FP instructions.
        LWC1, SWC1): Add "f" to filter, since these are FP instructions.
2002-02-28  Chris Demetriou  
2002-02-28  Chris Demetriou  
        * mips.igen (DSRA32, DSRAV): Fix order of arguments in
        * mips.igen (DSRA32, DSRAV): Fix order of arguments in
        instruction-printing string.
        instruction-printing string.
        (LWU): Use '64' as the filter flag.
        (LWU): Use '64' as the filter flag.
2002-02-28  Chris Demetriou  
2002-02-28  Chris Demetriou  
        * mips.igen (SDXC1): Fix instruction-printing string.
        * mips.igen (SDXC1): Fix instruction-printing string.
2002-02-28  Chris Demetriou  
2002-02-28  Chris Demetriou  
        * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
        * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
        filter flags "32,f".
        filter flags "32,f".
2002-02-27  Chris Demetriou  
2002-02-27  Chris Demetriou  
        * mips.igen (PREFX): This is a 64-bit instruction, use '64'
        * mips.igen (PREFX): This is a 64-bit instruction, use '64'
        as the filter flag.
        as the filter flag.
2002-02-27  Chris Demetriou  
2002-02-27  Chris Demetriou  
        * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
        * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
        add a comma) so that it more closely match the MIPS ISA
        add a comma) so that it more closely match the MIPS ISA
        documentation opcode partitioning.
        documentation opcode partitioning.
        (PREF): Put useful names on opcode fields, and include
        (PREF): Put useful names on opcode fields, and include
        instruction-printing string.
        instruction-printing string.
2002-02-27  Chris Demetriou  
2002-02-27  Chris Demetriou  
        * mips.igen (check_u64): New function which in the future will
        * mips.igen (check_u64): New function which in the future will
        check whether 64-bit instructions are usable and signal an
        check whether 64-bit instructions are usable and signal an
        exception if not.  Currently a no-op.
        exception if not.  Currently a no-op.
        (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
        (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
        DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
        DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
        DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
        DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
        LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
        LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
        * mips.igen (check_fpu): New function which in the future will
        * mips.igen (check_fpu): New function which in the future will
        check whether FPU instructions are usable and signal an exception
        check whether FPU instructions are usable and signal an exception
        if not.  Currently a no-op.
        if not.  Currently a no-op.
        (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
        (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
        CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
        CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
        CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
        CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
        LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
        LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
        MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
        MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
        NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
        NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
        ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
        ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
        SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
        SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
2002-02-27  Chris Demetriou  
2002-02-27  Chris Demetriou  
        * mips.igen (do_load_left, do_load_right): Move to be immediately
        * mips.igen (do_load_left, do_load_right): Move to be immediately
        following do_load.
        following do_load.
        (do_store_left, do_store_right): Move to be immediately following
        (do_store_left, do_store_right): Move to be immediately following
        do_store.
        do_store.
2002-02-27  Chris Demetriou  
2002-02-27  Chris Demetriou  
        * mips.igen (mipsV): New model name.  Also, add it to
        * mips.igen (mipsV): New model name.  Also, add it to
        all instructions and functions where it is appropriate.
        all instructions and functions where it is appropriate.
2002-02-18  Chris Demetriou  
2002-02-18  Chris Demetriou  
        * mips.igen: For all functions and instructions, list model
        * mips.igen: For all functions and instructions, list model
        names that support that instruction one per line.
        names that support that instruction one per line.
2002-02-11  Chris Demetriou  
2002-02-11  Chris Demetriou  
        * mips.igen: Add some additional comments about supported
        * mips.igen: Add some additional comments about supported
        models, and about which instructions go where.
        models, and about which instructions go where.
        (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
        (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
        order as is used in the rest of the file.
        order as is used in the rest of the file.
2002-02-11  Chris Demetriou  
2002-02-11  Chris Demetriou  
        * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
        * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
        indicating that ALU32_END or ALU64_END are there to check
        indicating that ALU32_END or ALU64_END are there to check
        for overflow.
        for overflow.
        (DADD): Likewise, but also remove previous comment about
        (DADD): Likewise, but also remove previous comment about
        overflow checking.
        overflow checking.
2002-02-10  Chris Demetriou  
2002-02-10  Chris Demetriou  
        * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
        * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
        DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
        DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
        JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
        JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
        SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
        SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
        ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
        ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
        fields (i.e., add and move commas) so that they more closely
        fields (i.e., add and move commas) so that they more closely
        match the MIPS ISA documentation opcode partitioning.
        match the MIPS ISA documentation opcode partitioning.
2002-02-10  Chris Demetriou  
2002-02-10  Chris Demetriou  
        * mips.igen (ADDI): Print immediate value.
        * mips.igen (ADDI): Print immediate value.
        (BREAK): Print code.
        (BREAK): Print code.
        (DADDIU, DSRAV, DSRLV): Print correct instruction name.
        (DADDIU, DSRAV, DSRLV): Print correct instruction name.
        (SLL): Print "nop" specially, and don't run the code
        (SLL): Print "nop" specially, and don't run the code
        that does the shift for the "nop" case.
        that does the shift for the "nop" case.
2001-11-17  Fred Fish  
2001-11-17  Fred Fish  
        * sim-main.h (float_operation): Move enum declaration outside
        * sim-main.h (float_operation): Move enum declaration outside
        of _sim_cpu struct declaration.
        of _sim_cpu struct declaration.
2001-04-12  Jim Blandy  
2001-04-12  Jim Blandy  
        * mips.igen (CFC1, CTC1): Pass the correct register numbers to
        * mips.igen (CFC1, CTC1): Pass the correct register numbers to
        PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
        PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
        set of the FCSR.
        set of the FCSR.
        * sim-main.h (COCIDX): Remove definition; this isn't supported by
        * sim-main.h (COCIDX): Remove definition; this isn't supported by
        PENDING_FILL, and you can get the intended effect gracefully by
        PENDING_FILL, and you can get the intended effect gracefully by
        calling PENDING_SCHED directly.
        calling PENDING_SCHED directly.
2001-02-23  Ben Elliston  
2001-02-23  Ben Elliston  
        * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
        * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
        already defined elsewhere.
        already defined elsewhere.
2001-02-19  Ben Elliston  
2001-02-19  Ben Elliston  
        * sim-main.h (sim_monitor): Return an int.
        * sim-main.h (sim_monitor): Return an int.
        * interp.c (sim_monitor): Add return values.
        * interp.c (sim_monitor): Add return values.
        (signal_exception): Handle error conditions from sim_monitor.
        (signal_exception): Handle error conditions from sim_monitor.
2001-02-08  Ben Elliston  
2001-02-08  Ben Elliston  
        * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
        * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
        (store_memory): Likewise, pass cia to sim_core_write*.
        (store_memory): Likewise, pass cia to sim_core_write*.
2000-10-19  Frank Ch. Eigler  
2000-10-19  Frank Ch. Eigler  
        On advice from Chris G. Demetriou :
        On advice from Chris G. Demetriou :
        * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
        * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
Thu Jul 27 22:02:05 2000  Andrew Cagney  
Thu Jul 27 22:02:05 2000  Andrew Cagney  
        From Maciej W. Rozycki :
        From Maciej W. Rozycki :
        * Makefile.in: Don't delete *.igen when cleaning directory.
        * Makefile.in: Don't delete *.igen when cleaning directory.
Wed Jul 19 18:50:51 2000  Andrew Cagney  
Wed Jul 19 18:50:51 2000  Andrew Cagney  
        * m16.igen (break): Call SignalException not sim_engine_halt.
        * m16.igen (break): Call SignalException not sim_engine_halt.
Mon Jul  3 11:13:20 2000  Andrew Cagney  
Mon Jul  3 11:13:20 2000  Andrew Cagney  
        From Jason Eckhardt:
        From Jason Eckhardt:
        * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
        * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
Tue Jun 13 20:52:07 2000  Andrew Cagney  
Tue Jun 13 20:52:07 2000  Andrew Cagney  
        * mips.igen (MxC1, DMxC1): Fix printf formatting.
        * mips.igen (MxC1, DMxC1): Fix printf formatting.
2000-05-24  Michael Hayes  
2000-05-24  Michael Hayes  
        * mips.igen (do_dmultx): Fix typo.
        * mips.igen (do_dmultx): Fix typo.
Tue May 23 21:39:23 2000  Andrew Cagney  
Tue May 23 21:39:23 2000  Andrew Cagney  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Fri Apr 28 20:48:36 2000  Andrew Cagney  
Fri Apr 28 20:48:36 2000  Andrew Cagney  
        * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
        * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
2000-04-12  Frank Ch. Eigler  
2000-04-12  Frank Ch. Eigler  
        * sim-main.h (GPR_CLEAR): Define macro.
        * sim-main.h (GPR_CLEAR): Define macro.
Mon Apr 10 00:07:09 2000  Andrew Cagney  
Mon Apr 10 00:07:09 2000  Andrew Cagney  
        * interp.c (decode_coproc): Output long using %lx and not %s.
        * interp.c (decode_coproc): Output long using %lx and not %s.
2000-03-21  Frank Ch. Eigler  
2000-03-21  Frank Ch. Eigler  
        * interp.c (sim_open): Sort & extend dummy memory regions for
        * interp.c (sim_open): Sort & extend dummy memory regions for
        --board=jmr3904 for eCos.
        --board=jmr3904 for eCos.
2000-03-02  Frank Ch. Eigler  
2000-03-02  Frank Ch. Eigler  
        * configure: Regenerated.
        * configure: Regenerated.
Tue Feb  8 18:35:01 2000  Donald Lindsay  
Tue Feb  8 18:35:01 2000  Donald Lindsay  
        * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
        * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
        calls, conditional on the simulator being in verbose mode.
        calls, conditional on the simulator being in verbose mode.
Fri Feb  4 09:45:15 2000  Donald Lindsay  
Fri Feb  4 09:45:15 2000  Donald Lindsay  
        * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
        * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
        cache don't get ReservedInstruction traps.
        cache don't get ReservedInstruction traps.
1999-11-29  Mark Salter  
1999-11-29  Mark Salter  
        * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
        * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
        to clear status bits in sdisr register. This is how the hardware works.
        to clear status bits in sdisr register. This is how the hardware works.
        * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
        * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
        being used by cygmon.
        being used by cygmon.
1999-11-11  Andrew Haley  
1999-11-11  Andrew Haley  
        * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
        * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
        instructions.
        instructions.
Thu Sep  9 15:12:08 1999  Geoffrey Keating  
Thu Sep  9 15:12:08 1999  Geoffrey Keating  
        * mips.igen (MULT): Correct previous mis-applied patch.
        * mips.igen (MULT): Correct previous mis-applied patch.
Tue Sep  7 13:34:54 1999  Geoffrey Keating  
Tue Sep  7 13:34:54 1999  Geoffrey Keating  
        * mips.igen (delayslot32): Handle sequence like
        * mips.igen (delayslot32): Handle sequence like
        mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
        mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
        correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
        correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
        (MULT): Actually pass the third register...
        (MULT): Actually pass the third register...
1999-09-03  Mark Salter  
1999-09-03  Mark Salter  
        * interp.c (sim_open): Added more memory aliases for additional
        * interp.c (sim_open): Added more memory aliases for additional
        hardware being touched by cygmon on jmr3904 board.
        hardware being touched by cygmon on jmr3904 board.
Thu Sep  2 18:15:53 1999  Andrew Cagney  
Thu Sep  2 18:15:53 1999  Andrew Cagney  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Tue Jul 27 16:36:51 1999  Andrew Cagney  
Tue Jul 27 16:36:51 1999  Andrew Cagney  
        * interp.c (sim_store_register): Handle case where client - GDB -
        * interp.c (sim_store_register): Handle case where client - GDB -
        specifies that a 4 byte register is 8 bytes in size.
        specifies that a 4 byte register is 8 bytes in size.
        (sim_fetch_register): Ditto.
        (sim_fetch_register): Ditto.
1999-07-14  Frank Ch. Eigler  
1999-07-14  Frank Ch. Eigler  
        Implement "sim firmware" option, inspired by jimb's version of 1998-01.
        Implement "sim firmware" option, inspired by jimb's version of 1998-01.
        * interp.c (firmware_option_p): New global flag: "sim firmware" given.
        * interp.c (firmware_option_p): New global flag: "sim firmware" given.
        (idt_monitor_base): Base address for IDT monitor traps.
        (idt_monitor_base): Base address for IDT monitor traps.
        (pmon_monitor_base): Ditto for PMON.
        (pmon_monitor_base): Ditto for PMON.
        (lsipmon_monitor_base): Ditto for LSI PMON.
        (lsipmon_monitor_base): Ditto for LSI PMON.
        (MONITOR_BASE, MONITOR_SIZE): Removed macros.
        (MONITOR_BASE, MONITOR_SIZE): Removed macros.
        (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
        (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
        (sim_firmware_command): New function.
        (sim_firmware_command): New function.
        (mips_option_handler): Call it for OPTION_FIRMWARE.
        (mips_option_handler): Call it for OPTION_FIRMWARE.
        (sim_open): Allocate memory for idt_monitor region.  If "--board"
        (sim_open): Allocate memory for idt_monitor region.  If "--board"
        option was given, add no monitor by default.  Add BREAK hooks only if
        option was given, add no monitor by default.  Add BREAK hooks only if
        monitors are also there.
        monitors are also there.
Mon Jul 12 00:02:27 1999  Andrew Cagney  
Mon Jul 12 00:02:27 1999  Andrew Cagney  
        * interp.c (sim_monitor): Flush output before reading input.
        * interp.c (sim_monitor): Flush output before reading input.
Sun Jul 11 19:28:11 1999  Andrew Cagney  
Sun Jul 11 19:28:11 1999  Andrew Cagney  
        * tconfig.in (SIM_HANDLES_LMA): Always define.
        * tconfig.in (SIM_HANDLES_LMA): Always define.
Thu Jul  8 16:06:59 1999  Andrew Cagney  
Thu Jul  8 16:06:59 1999  Andrew Cagney  
        From Mark Salter :
        From Mark Salter :
        * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
        * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
        (sim_open): Add setup for BSP board.
        (sim_open): Add setup for BSP board.
Wed Jul  7 12:45:58 1999  Andrew Cagney  
Wed Jul  7 12:45:58 1999  Andrew Cagney  
        * mips.igen (MULT, MULTU): Add syntax for two operand version.
        * mips.igen (MULT, MULTU): Add syntax for two operand version.
        (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
        (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
        them as unimplemented.
        them as unimplemented.
1999-05-08  Felix Lee  
1999-05-08  Felix Lee  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
1999-04-21  Frank Ch. Eigler  
1999-04-21  Frank Ch. Eigler  
        * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
        * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
Thu Apr 15 14:15:17 1999  Andrew Cagney  
Thu Apr 15 14:15:17 1999  Andrew Cagney  
        * configure.in: Any mips64vr5*-*-* target should have
        * configure.in: Any mips64vr5*-*-* target should have
        -DTARGET_ENABLE_FR=1.
        -DTARGET_ENABLE_FR=1.
        (default_endian): Any mips64vr*el-*-* target should default to
        (default_endian): Any mips64vr*el-*-* target should default to
        LITTLE_ENDIAN.
        LITTLE_ENDIAN.
        * configure: Re-generate.
        * configure: Re-generate.
1999-02-19  Gavin Romig-Koch  
1999-02-19  Gavin Romig-Koch  
        * mips.igen (ldl): Extend from _16_, not 32.
        * mips.igen (ldl): Extend from _16_, not 32.
Wed Jan 27 18:51:38 1999  Andrew Cagney  
Wed Jan 27 18:51:38 1999  Andrew Cagney  
        * interp.c (sim_store_register): Force registers written to by GDB
        * interp.c (sim_store_register): Force registers written to by GDB
        into an un-interpreted state.
        into an un-interpreted state.
1999-02-05  Frank Ch. Eigler  
1999-02-05  Frank Ch. Eigler  
        * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
        * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
        CPU, start periodic background I/O polls.
        CPU, start periodic background I/O polls.
        (tx3904sio_poll): New function: periodic I/O poller.
        (tx3904sio_poll): New function: periodic I/O poller.
1998-12-30  Frank Ch. Eigler  
1998-12-30  Frank Ch. Eigler  
        * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
        * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
Tue Dec 29 16:03:53 1998  Rainer Orth  
Tue Dec 29 16:03:53 1998  Rainer Orth  
        * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
        * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
        case statement.
        case statement.
1998-12-29  Frank Ch. Eigler  
1998-12-29  Frank Ch. Eigler  
        * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
        * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
        (load_word): Call SIM_CORE_SIGNAL hook on error.
        (load_word): Call SIM_CORE_SIGNAL hook on error.
        (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
        (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
        starting.  For exception dispatching, pass PC instead of NULL_CIA.
        starting.  For exception dispatching, pass PC instead of NULL_CIA.
        (decode_coproc): Use COP0_BADVADDR to store faulting address.
        (decode_coproc): Use COP0_BADVADDR to store faulting address.
        * sim-main.h (COP0_BADVADDR): Define.
        * sim-main.h (COP0_BADVADDR): Define.
        (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
        (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
        (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
        (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
        (_sim_cpu): Add exc_* fields to store register value snapshots.
        (_sim_cpu): Add exc_* fields to store register value snapshots.
        * mips.igen (*): Replace memory-related SignalException* calls
        * mips.igen (*): Replace memory-related SignalException* calls
        with references to SIM_CORE_SIGNAL hook.
        with references to SIM_CORE_SIGNAL hook.
        * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
        * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
        fix.
        fix.
        * sim-main.c (*): Minor warning cleanups.
        * sim-main.c (*): Minor warning cleanups.
1998-12-24  Gavin Romig-Koch  
1998-12-24  Gavin Romig-Koch  
        * m16.igen (DADDIU5): Correct type-o.
        * m16.igen (DADDIU5): Correct type-o.
Mon Dec 21 10:34:48 1998  Andrew Cagney  
Mon Dec 21 10:34:48 1998  Andrew Cagney  
        * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
        * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
        variables.
        variables.
Wed Dec 16 18:20:28 1998  Andrew Cagney  
Wed Dec 16 18:20:28 1998  Andrew Cagney  
        * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
        * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
        to include path.
        to include path.
        (interp.o): Add dependency on itable.h
        (interp.o): Add dependency on itable.h
        (oengine.c, gencode): Delete remaining references.
        (oengine.c, gencode): Delete remaining references.
        (BUILT_SRC_FROM_GEN): Clean up.
        (BUILT_SRC_FROM_GEN): Clean up.
1998-12-16  Gavin Romig-Koch  
1998-12-16  Gavin Romig-Koch  
        * vr4run.c: New.
        * vr4run.c: New.
        * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
        * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
        tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
        tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
        tmp-run-hack) : New.
        tmp-run-hack) : New.
        * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
        * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
        DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
        DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
        Drop the "64" qualifier to get the HACK generator working.
        Drop the "64" qualifier to get the HACK generator working.
        Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
        Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
        * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
        * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
        qualifier to get the hack generator working.
        qualifier to get the hack generator working.
        (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
        (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
        (DSLL): Use do_dsll.
        (DSLL): Use do_dsll.
        (DSLLV): Use do_dsllv.
        (DSLLV): Use do_dsllv.
        (DSRA): Use do_dsra.
        (DSRA): Use do_dsra.
        (DSRL): Use do_dsrl.
        (DSRL): Use do_dsrl.
        (DSRLV): Use do_dsrlv.
        (DSRLV): Use do_dsrlv.
        (BC1): Move *vr4100 to get the HACK generator working.
        (BC1): Move *vr4100 to get the HACK generator working.
        (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
        (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
        get the HACK generator working.
        get the HACK generator working.
        (MACC) Rename to get the HACK generator working.
        (MACC) Rename to get the HACK generator working.
        (DMACC,MACCS,DMACCS): Add the 64.
        (DMACC,MACCS,DMACCS): Add the 64.
1998-12-12  Gavin Romig-Koch  
1998-12-12  Gavin Romig-Koch  
        * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
        * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
        * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
        * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1998-12-11  Gavin Romig-Koch  
1998-12-11  Gavin Romig-Koch  
    * mips/interp.c (DEBUG): Cleanups.
    * mips/interp.c (DEBUG): Cleanups.
1998-12-10  Frank Ch. Eigler  
1998-12-10  Frank Ch. Eigler  
        * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
        * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
        (tx3904sio_tickle): fflush after a stdout character output.
        (tx3904sio_tickle): fflush after a stdout character output.
1998-12-03  Frank Ch. Eigler  
1998-12-03  Frank Ch. Eigler  
        * interp.c (sim_close): Uninstall modules.
        * interp.c (sim_close): Uninstall modules.
Wed Nov 25 13:41:03 1998  Andrew Cagney  
Wed Nov 25 13:41:03 1998  Andrew Cagney  
        * sim-main.h, interp.c (sim_monitor): Change to global
        * sim-main.h, interp.c (sim_monitor): Change to global
        function.
        function.
Wed Nov 25 17:33:24 1998  Andrew Cagney  
Wed Nov 25 17:33:24 1998  Andrew Cagney  
        * configure.in (vr4100): Only include vr4100 instructions in
        * configure.in (vr4100): Only include vr4100 instructions in
        simulator.
        simulator.
        * configure: Re-generate.
        * configure: Re-generate.
        * m16.igen (*): Tag all mips16 instructions as also being vr4100.
        * m16.igen (*): Tag all mips16 instructions as also being vr4100.
Mon Nov 23 18:20:36 1998  Andrew Cagney  
Mon Nov 23 18:20:36 1998  Andrew Cagney  
        * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
        * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
        * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
        * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
        true alternative.
        true alternative.
        * configure.in (sim_default_gen, sim_use_gen): Replace with
        * configure.in (sim_default_gen, sim_use_gen): Replace with
        sim_gen.
        sim_gen.
        (--enable-sim-igen): Delete config option. Always using IGEN.
        (--enable-sim-igen): Delete config option. Always using IGEN.
        * configure: Re-generate.
        * configure: Re-generate.
        * Makefile.in (gencode): Kill, kill, kill.
        * Makefile.in (gencode): Kill, kill, kill.
        * gencode.c: Ditto.
        * gencode.c: Ditto.
Mon Nov 23 18:07:36 1998  Andrew Cagney  
Mon Nov 23 18:07:36 1998  Andrew Cagney  
        * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
        * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
        bit mips16 igen simulator.
        bit mips16 igen simulator.
        * configure: Re-generate.
        * configure: Re-generate.
        * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
        * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
        as part of vr4100 ISA.
        as part of vr4100 ISA.
        * vr.igen: Mark all instructions as 64 bit only.
        * vr.igen: Mark all instructions as 64 bit only.
Mon Nov 23 17:07:37 1998  Andrew Cagney  
Mon Nov 23 17:07:37 1998  Andrew Cagney  
        * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
        * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
        Pacify GCC.
        Pacify GCC.
Mon Nov 23 13:23:40 1998  Andrew Cagney  
Mon Nov 23 13:23:40 1998  Andrew Cagney  
        * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
        * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
        mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
        mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
        * configure: Re-generate.
        * configure: Re-generate.
        * m16.igen (BREAK): Define breakpoint instruction.
        * m16.igen (BREAK): Define breakpoint instruction.
        (JALX32): Mark instruction as mips16 and not r3900.
        (JALX32): Mark instruction as mips16 and not r3900.
        * mips.igen (C.cond.fmt): Fix typo in instruction format.
        * mips.igen (C.cond.fmt): Fix typo in instruction format.
        * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
        * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
Sat Nov  7 09:54:38 1998  Andrew Cagney  
Sat Nov  7 09:54:38 1998  Andrew Cagney  
        * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
        * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
        insn as a debug breakpoint.
        insn as a debug breakpoint.
        * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
        * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
        pending.slot_size.
        pending.slot_size.
        (PENDING_SCHED): Clean up trace statement.
        (PENDING_SCHED): Clean up trace statement.
        (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
        (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
        (PENDING_FILL): Delay write by only one cycle.
        (PENDING_FILL): Delay write by only one cycle.
        (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
        (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
        * sim-main.c (pending_tick): Clean up trace statements. Add trace
        * sim-main.c (pending_tick): Clean up trace statements. Add trace
        of pending writes.
        of pending writes.
        (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
        (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
        32 & 64.
        32 & 64.
        (pending_tick): Move incrementing of index to FOR statement.
        (pending_tick): Move incrementing of index to FOR statement.
        (pending_tick): Only update PENDING_OUT after a write has occured.
        (pending_tick): Only update PENDING_OUT after a write has occured.
        * configure.in: Add explicit mips-lsi-* target.  Use gencode to
        * configure.in: Add explicit mips-lsi-* target.  Use gencode to
        build simulator.
        build simulator.
        * configure: Re-generate.
        * configure: Re-generate.
        * interp.c (sim_engine_run OLD): Delete explicit call to
        * interp.c (sim_engine_run OLD): Delete explicit call to
        PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
        PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  
Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  
        * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
        * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
        interrupt level number to match changed SignalExceptionInterrupt
        interrupt level number to match changed SignalExceptionInterrupt
        macro.
        macro.
Fri Oct  9 18:02:25 1998  Doug Evans  
Fri Oct  9 18:02:25 1998  Doug Evans  
        * interp.c: #include "itable.h" if WITH_IGEN.
        * interp.c: #include "itable.h" if WITH_IGEN.
        (get_insn_name): New function.
        (get_insn_name): New function.
        (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
        (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
        * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
        * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  
Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  
        * configure: Rebuilt to inhale new common/aclocal.m4.
        * configure: Rebuilt to inhale new common/aclocal.m4.
Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  
Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  
        * dv-tx3904sio.c: Include sim-assert.h.
        * dv-tx3904sio.c: Include sim-assert.h.
Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  
Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  
        * dv-tx3904sio.c: New file: tx3904 serial I/O module.
        * dv-tx3904sio.c: New file: tx3904 serial I/O module.
        * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
        * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
        Reorganize target-specific sim-hardware checks.
        Reorganize target-specific sim-hardware checks.
        * configure: rebuilt.
        * configure: rebuilt.
        * interp.c (sim_open): For tx39 target boards, set
        * interp.c (sim_open): For tx39 target boards, set
        OPERATING_ENVIRONMENT, add tx3904sio devices.
        OPERATING_ENVIRONMENT, add tx3904sio devices.
        * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
        * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
        ROM executables.  Install dv-sockser into sim-modules list.
        ROM executables.  Install dv-sockser into sim-modules list.
        * dv-tx3904irc.c: Compiler warning clean-up.
        * dv-tx3904irc.c: Compiler warning clean-up.
        * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
        * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
        frequent hw-trace messages.
        frequent hw-trace messages.
Fri Jul 31 18:14:16 1998  Andrew Cagney  
Fri Jul 31 18:14:16 1998  Andrew Cagney  
        * vr.igen (MulAcc): Identify as a vr4100 specific function.
        * vr.igen (MulAcc): Identify as a vr4100 specific function.
Sat Jul 25 16:03:14 1998  Andrew Cagney  
Sat Jul 25 16:03:14 1998  Andrew Cagney  
        * Makefile.in (IGEN_INCLUDE): Add vr.igen.
        * Makefile.in (IGEN_INCLUDE): Add vr.igen.
        * vr.igen: New file.
        * vr.igen: New file.
        (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
        (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
        * mips.igen: Define vr4100 model. Include vr.igen.
        * mips.igen: Define vr4100 model. Include vr.igen.
Mon Jun 29 09:21:07 1998  Gavin Koch  
Mon Jun 29 09:21:07 1998  Gavin Koch  
        * mips.igen (check_mf_hilo): Correct check.
        * mips.igen (check_mf_hilo): Correct check.
Wed Jun 17 12:20:49 1998  Andrew Cagney  
Wed Jun 17 12:20:49 1998  Andrew Cagney  
        * sim-main.h (interrupt_event): Add prototype.
        * sim-main.h (interrupt_event): Add prototype.
        * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
        * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
        register_ptr, register_value.
        register_ptr, register_value.
        (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
        (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
        * sim-main.h (tracefh): Make extern.
        * sim-main.h (tracefh): Make extern.
Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  
Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  
        * dv-tx3904tmr.c: Deschedule timer event after dispatching.
        * dv-tx3904tmr.c: Deschedule timer event after dispatching.
        Reduce unnecessarily high timer event frequency.
        Reduce unnecessarily high timer event frequency.
        * dv-tx3904cpu.c: Ditto for interrupt event.
        * dv-tx3904cpu.c: Ditto for interrupt event.
Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  
Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  
        * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
        * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
        to allay warnings.
        to allay warnings.
        (interrupt_event): Made non-static.
        (interrupt_event): Made non-static.
        * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
        * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
        interchange of configuration values for external vs. internal
        interchange of configuration values for external vs. internal
        clock dividers.
        clock dividers.
Tue Jun  9 12:46:24 1998  Ian Carmichael  
Tue Jun  9 12:46:24 1998  Ian Carmichael  
        * mips.igen (BREAK): Moved code to here for
        * mips.igen (BREAK): Moved code to here for
        simulator-reserved break instructions.
        simulator-reserved break instructions.
        * gencode.c (build_instruction): Ditto.
        * gencode.c (build_instruction): Ditto.
        * interp.c (signal_exception): Code moved from here.  Non-
        * interp.c (signal_exception): Code moved from here.  Non-
        reserved instructions now use exception vector, rather
        reserved instructions now use exception vector, rather
        than halting sim.
        than halting sim.
        * sim-main.h: Moved magic constants to here.
        * sim-main.h: Moved magic constants to here.
Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  
Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  
        * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
        * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
        register upon non-zero interrupt event level, clear upon zero
        register upon non-zero interrupt event level, clear upon zero
        event value.
        event value.
        * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
        * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
        by passing zero event value.
        by passing zero event value.
        (*_io_{read,write}_buffer): Endianness fixes.
        (*_io_{read,write}_buffer): Endianness fixes.
        * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
        * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
        (deliver_*_tick): Reduce sim event interval to 75% of count interval.
        (deliver_*_tick): Reduce sim event interval to 75% of count interval.
        * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
        * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
        serial I/O and timer module at base address 0xFFFF0000.
        serial I/O and timer module at base address 0xFFFF0000.
Tue Jun  9 11:52:29 1998  Gavin Koch  
Tue Jun  9 11:52:29 1998  Gavin Koch  
        * mips.igen (SWC1) : Correct the handling of ReverseEndian
        * mips.igen (SWC1) : Correct the handling of ReverseEndian
        and BigEndianCPU.
        and BigEndianCPU.
Tue Jun  9 11:40:57 1998  Gavin Koch  
Tue Jun  9 11:40:57 1998  Gavin Koch  
        * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
        * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
        parts.
        parts.
        * configure: Update.
        * configure: Update.
Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  
Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  
        * dv-tx3904tmr.c: New file - implements tx3904 timer.
        * dv-tx3904tmr.c: New file - implements tx3904 timer.
        * dv-tx3904{irc,cpu}.c: Mild reformatting.
        * dv-tx3904{irc,cpu}.c: Mild reformatting.
        * configure.in: Include tx3904tmr in hw_device list.
        * configure.in: Include tx3904tmr in hw_device list.
        * configure: Rebuilt.
        * configure: Rebuilt.
        * interp.c (sim_open): Instantiate three timer instances.
        * interp.c (sim_open): Instantiate three timer instances.
        Fix address typo of tx3904irc instance.
        Fix address typo of tx3904irc instance.
Tue Jun  2 15:48:02 1998  Ian Carmichael  
Tue Jun  2 15:48:02 1998  Ian Carmichael  
        * interp.c (signal_exception): SystemCall exception now uses
        * interp.c (signal_exception): SystemCall exception now uses
        the exception vector.
        the exception vector.
Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  
Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  
        * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
        * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
        to allay warnings.
        to allay warnings.
Fri May 29 11:40:39 1998  Andrew Cagney  
Fri May 29 11:40:39 1998  Andrew Cagney  
        * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
        * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
Mon May 25 20:47:45 1998  Andrew Cagney  
Mon May 25 20:47:45 1998  Andrew Cagney  
        * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
        * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
        * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
        * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
        sim-main.h. Declare a struct hw_descriptor instead of struct
        sim-main.h. Declare a struct hw_descriptor instead of struct
        hw_device_descriptor.
        hw_device_descriptor.
Mon May 25 12:41:38 1998  Andrew Cagney  
Mon May 25 12:41:38 1998  Andrew Cagney  
        * mips.igen (do_store_left, do_load_left): Compute nr of left and
        * mips.igen (do_store_left, do_load_left): Compute nr of left and
        right bits and then re-align left hand bytes to correct byte
        right bits and then re-align left hand bytes to correct byte
        lanes.  Fix incorrect computation in do_store_left when loading
        lanes.  Fix incorrect computation in do_store_left when loading
        bytes from second word.
        bytes from second word.
Fri May 22 13:34:20 1998  Andrew Cagney  
Fri May 22 13:34:20 1998  Andrew Cagney  
        * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
        * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
        * interp.c (sim_open): Only create a device tree when HW is
        * interp.c (sim_open): Only create a device tree when HW is
        enabled.
        enabled.
        * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
        * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
        * interp.c (signal_exception): Ditto.
        * interp.c (signal_exception): Ditto.
Thu May 21 14:24:11 1998  Gavin Koch  
Thu May 21 14:24:11 1998  Gavin Koch  
        * gencode.c: Mark BEGEZALL as LIKELY.
        * gencode.c: Mark BEGEZALL as LIKELY.
Thu May 21 18:57:19 1998  Andrew Cagney  
Thu May 21 18:57:19 1998  Andrew Cagney  
        * sim-main.h (ALU32_END): Sign extend 32 bit results.
        * sim-main.h (ALU32_END): Sign extend 32 bit results.
        * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
        * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
Mon May 18 18:22:42 1998  Frank Ch. Eigler  
Mon May 18 18:22:42 1998  Frank Ch. Eigler  
        * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
        * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
        modules.  Recognize TX39 target with "mips*tx39" pattern.
        modules.  Recognize TX39 target with "mips*tx39" pattern.
        * configure: Rebuilt.
        * configure: Rebuilt.
        * sim-main.h (*): Added many macros defining bits in
        * sim-main.h (*): Added many macros defining bits in
        TX39 control registers.
        TX39 control registers.
        (SignalInterrupt): Send actual PC instead of NULL.
        (SignalInterrupt): Send actual PC instead of NULL.
        (SignalNMIReset): New exception type.
        (SignalNMIReset): New exception type.
        * interp.c (board): New variable for future use to identify
        * interp.c (board): New variable for future use to identify
        a particular board being simulated.
        a particular board being simulated.
        (mips_option_handler,mips_options): Added "--board" option.
        (mips_option_handler,mips_options): Added "--board" option.
        (interrupt_event): Send actual PC.
        (interrupt_event): Send actual PC.
        (sim_open): Make memory layout conditional on board setting.
        (sim_open): Make memory layout conditional on board setting.
        (signal_exception): Initial implementation of hardware interrupt
        (signal_exception): Initial implementation of hardware interrupt
        handling.  Accept another break instruction variant for simulator
        handling.  Accept another break instruction variant for simulator
        exit.
        exit.
        (decode_coproc): Implement RFE instruction for TX39.
        (decode_coproc): Implement RFE instruction for TX39.
        (mips.igen): Decode RFE instruction as such.
        (mips.igen): Decode RFE instruction as such.
        * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
        * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
        * interp.c: Define "jmr3904" and "jmr3904debug" board types and
        * interp.c: Define "jmr3904" and "jmr3904debug" board types and
        bbegin to implement memory map.
        bbegin to implement memory map.
        * dv-tx3904cpu.c: New file.
        * dv-tx3904cpu.c: New file.
        * dv-tx3904irc.c: New file.
        * dv-tx3904irc.c: New file.
Wed May 13 14:40:11 1998  Gavin Koch  
Wed May 13 14:40:11 1998  Gavin Koch  
        * mips.igen (check_mt_hilo): Create a separate r3900 version.
        * mips.igen (check_mt_hilo): Create a separate r3900 version.
Wed May 13 14:11:46 1998  Gavin Koch  
Wed May 13 14:11:46 1998  Gavin Koch  
        * tx.igen (madd,maddu):  Replace calls to check_op_hilo
        * tx.igen (madd,maddu):  Replace calls to check_op_hilo
        with calls to check_div_hilo.
        with calls to check_div_hilo.
Wed May 13 09:59:27 1998  Gavin Koch  
Wed May 13 09:59:27 1998  Gavin Koch  
        * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
        * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
        Replace check_op_hilo with check_mult_hilo and check_div_hilo.
        Replace check_op_hilo with check_mult_hilo and check_div_hilo.
        Add special r3900 version of do_mult_hilo.
        Add special r3900 version of do_mult_hilo.
        (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
        (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
        with calls to check_mult_hilo.
        with calls to check_mult_hilo.
        (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
        (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
        with calls to check_div_hilo.
        with calls to check_div_hilo.
Tue May 12 15:22:11 1998  Andrew Cagney  
Tue May 12 15:22:11 1998  Andrew Cagney  
        * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
        * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
        Document a replacement.
        Document a replacement.
Fri May  8 17:48:19 1998  Ian Carmichael  
Fri May  8 17:48:19 1998  Ian Carmichael  
        * interp.c (sim_monitor): Make mon_printf work.
        * interp.c (sim_monitor): Make mon_printf work.
Wed May  6 19:42:19 1998  Doug Evans  
Wed May  6 19:42:19 1998  Doug Evans  
        * sim-main.h (INSN_NAME): New arg `cpu'.
        * sim-main.h (INSN_NAME): New arg `cpu'.
Tue Apr 28 18:33:31 1998  Geoffrey Noer  
Tue Apr 28 18:33:31 1998  Geoffrey Noer  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Sun Apr 26 15:31:55 1998  Tom Tromey  
Sun Apr 26 15:31:55 1998  Tom Tromey  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * config.in: Ditto.
        * config.in: Ditto.
Sun Apr 26 15:20:01 1998  Tom Tromey  
Sun Apr 26 15:20:01 1998  Tom Tromey  
        * acconfig.h: New file.
        * acconfig.h: New file.
        * configure.in: Reverted change of Apr 24; use sinclude again.
        * configure.in: Reverted change of Apr 24; use sinclude again.
Fri Apr 24 14:16:40 1998  Tom Tromey  
Fri Apr 24 14:16:40 1998  Tom Tromey  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * config.in: Ditto.
        * config.in: Ditto.
Fri Apr 24 11:19:20 1998  Tom Tromey  
Fri Apr 24 11:19:20 1998  Tom Tromey  
        * configure.in: Don't call sinclude.
        * configure.in: Don't call sinclude.
Fri Apr 24 11:35:01 1998  Andrew Cagney  
Fri Apr 24 11:35:01 1998  Andrew Cagney  
        * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
        * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
Tue Apr 21 11:59:50 1998  Andrew Cagney  
Tue Apr 21 11:59:50 1998  Andrew Cagney  
        * mips.igen (ERET): Implement.
        * mips.igen (ERET): Implement.
        * interp.c (decode_coproc): Return sign-extended EPC.
        * interp.c (decode_coproc): Return sign-extended EPC.
        * mips.igen (ANDI, LUI, MFC0): Add tracing code.
        * mips.igen (ANDI, LUI, MFC0): Add tracing code.
        * interp.c (signal_exception): Do not ignore Trap.
        * interp.c (signal_exception): Do not ignore Trap.
        (signal_exception): On TRAP, restart at exception address.
        (signal_exception): On TRAP, restart at exception address.
        (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
        (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
        (signal_exception): Update.
        (signal_exception): Update.
        (sim_open): Patch V_COMMON interrupt vector with an abort sequence
        (sim_open): Patch V_COMMON interrupt vector with an abort sequence
        so that TRAP instructions are caught.
        so that TRAP instructions are caught.
Mon Apr 20 11:26:55 1998  Andrew Cagney  
Mon Apr 20 11:26:55 1998  Andrew Cagney  
        * sim-main.h (struct hilo_access, struct hilo_history): Define,
        * sim-main.h (struct hilo_access, struct hilo_history): Define,
        contains HI/LO access history.
        contains HI/LO access history.
        (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
        (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
        (HIACCESS, LOACCESS): Delete, replace with
        (HIACCESS, LOACCESS): Delete, replace with
        (HIHISTORY, LOHISTORY): New macros.
        (HIHISTORY, LOHISTORY): New macros.
        (CHECKHILO): Delete all, moved to mips.igen
        (CHECKHILO): Delete all, moved to mips.igen
        * gencode.c (build_instruction): Do not generate checks for
        * gencode.c (build_instruction): Do not generate checks for
        correct HI/LO register usage.
        correct HI/LO register usage.
        * interp.c (old_engine_run): Delete checks for correct HI/LO
        * interp.c (old_engine_run): Delete checks for correct HI/LO
        register usage.
        register usage.
        * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
        * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
        check_mf_cycles): New functions.
        check_mf_cycles): New functions.
        (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
        (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
        do_divu, domultx, do_mult, do_multu): Use.
        do_divu, domultx, do_mult, do_multu): Use.
        * tx.igen ("madd", "maddu"): Use.
        * tx.igen ("madd", "maddu"): Use.
Wed Apr 15 18:31:54 1998  Andrew Cagney  
Wed Apr 15 18:31:54 1998  Andrew Cagney  
        * mips.igen (DSRAV): Use function do_dsrav.
        * mips.igen (DSRAV): Use function do_dsrav.
        (SRAV): Use new function do_srav.
        (SRAV): Use new function do_srav.
        * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
        * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
        (B): Sign extend 11 bit immediate.
        (B): Sign extend 11 bit immediate.
        (EXT-B*): Shift 16 bit immediate left by 1.
        (EXT-B*): Shift 16 bit immediate left by 1.
        (ADDIU*): Don't sign extend immediate value.
        (ADDIU*): Don't sign extend immediate value.
Wed Apr 15 10:32:15 1998  Andrew Cagney  
Wed Apr 15 10:32:15 1998  Andrew Cagney  
        * m16run.c (sim_engine_run): Restore CIA after handling an event.
        * m16run.c (sim_engine_run): Restore CIA after handling an event.
        * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
        * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
        functions.
        functions.
        * mips.igen (delayslot32, nullify_next_insn): New functions.
        * mips.igen (delayslot32, nullify_next_insn): New functions.
        (m16.igen): Always include.
        (m16.igen): Always include.
        (do_*): Add more tracing.
        (do_*): Add more tracing.
        * m16.igen (delayslot16): Add NIA argument, could be called by a
        * m16.igen (delayslot16): Add NIA argument, could be called by a
        32 bit MIPS16 instruction.
        32 bit MIPS16 instruction.
        * interp.c (ifetch16): Move function from here.
        * interp.c (ifetch16): Move function from here.
        * sim-main.c (ifetch16): To here.
        * sim-main.c (ifetch16): To here.
        * sim-main.c (ifetch16, ifetch32): Update to match current
        * sim-main.c (ifetch16, ifetch32): Update to match current
        implementations of LH, LW.
        implementations of LH, LW.
        (signal_exception): Don't print out incorrect hex value of illegal
        (signal_exception): Don't print out incorrect hex value of illegal
        instruction.
        instruction.
Wed Apr 15 00:17:25 1998  Andrew Cagney  
Wed Apr 15 00:17:25 1998  Andrew Cagney  
        * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
        * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
        instruction.
        instruction.
        * m16.igen: Implement MIPS16 instructions.
        * m16.igen: Implement MIPS16 instructions.
        * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
        * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
        do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
        do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
        do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
        do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
        do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
        do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
        do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
        do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
        bodies of corresponding code from 32 bit insn to these.  Also used
        bodies of corresponding code from 32 bit insn to these.  Also used
        by MIPS16 versions of functions.
        by MIPS16 versions of functions.
        * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
        * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
        (IMEM16): Drop NR argument from macro.
        (IMEM16): Drop NR argument from macro.
Sat Apr  4 22:39:50 1998  Andrew Cagney  
Sat Apr  4 22:39:50 1998  Andrew Cagney  
        * Makefile.in (SIM_OBJS): Add sim-main.o.
        * Makefile.in (SIM_OBJS): Add sim-main.o.
        * sim-main.h (address_translation, load_memory, store_memory,
        * sim-main.h (address_translation, load_memory, store_memory,
        cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
        cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
        as INLINE_SIM_MAIN.
        as INLINE_SIM_MAIN.
        (pr_addr, pr_uword64): Declare.
        (pr_addr, pr_uword64): Declare.
        (sim-main.c): Include when H_REVEALS_MODULE_P.
        (sim-main.c): Include when H_REVEALS_MODULE_P.
        * interp.c (address_translation, load_memory, store_memory,
        * interp.c (address_translation, load_memory, store_memory,
        cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
        cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
        from here.
        from here.
        * sim-main.c: To here. Fix compilation problems.
        * sim-main.c: To here. Fix compilation problems.
        * configure.in: Enable inlining.
        * configure.in: Enable inlining.
        * configure: Re-config.
        * configure: Re-config.
Sat Apr  4 20:36:25 1998  Andrew Cagney  
Sat Apr  4 20:36:25 1998  Andrew Cagney  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Fri Apr  3 04:32:35 1998  Andrew Cagney  
Fri Apr  3 04:32:35 1998  Andrew Cagney  
        * mips.igen: Include tx.igen.
        * mips.igen: Include tx.igen.
        * Makefile.in (IGEN_INCLUDE): Add tx.igen.
        * Makefile.in (IGEN_INCLUDE): Add tx.igen.
        * tx.igen: New file, contains MADD and MADDU.
        * tx.igen: New file, contains MADD and MADDU.
        * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
        * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
        the hardwired constant `7'.
        the hardwired constant `7'.
        (store_memory): Ditto.
        (store_memory): Ditto.
        (LOADDRMASK): Move definition to sim-main.h.
        (LOADDRMASK): Move definition to sim-main.h.
        mips.igen (MTC0): Enable for r3900.
        mips.igen (MTC0): Enable for r3900.
        (ADDU): Add trace.
        (ADDU): Add trace.
        mips.igen (do_load_byte): Delete.
        mips.igen (do_load_byte): Delete.
        (do_load, do_store, do_load_left, do_load_write, do_store_left,
        (do_load, do_store, do_load_left, do_load_write, do_store_left,
        do_store_right): New functions.
        do_store_right): New functions.
        (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
        (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
        configure.in: Let the tx39 use igen again.
        configure.in: Let the tx39 use igen again.
        configure: Update.
        configure: Update.
Thu Apr  2 10:59:39 1998  Andrew Cagney  
Thu Apr  2 10:59:39 1998  Andrew Cagney  
        * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
        * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
        not an address sized quantity.  Return zero for cache sizes.
        not an address sized quantity.  Return zero for cache sizes.
Wed Apr  1 23:47:53 1998  Andrew Cagney  
Wed Apr  1 23:47:53 1998  Andrew Cagney  
        * mips.igen (r3900): r3900 does not support 64 bit integer
        * mips.igen (r3900): r3900 does not support 64 bit integer
        operations.
        operations.
Mon Mar 30 14:46:05 1998  Gavin Koch  
Mon Mar 30 14:46:05 1998  Gavin Koch  
        * configure.in (mipstx39*-*-*): Use gencode simulator rather
        * configure.in (mipstx39*-*-*): Use gencode simulator rather
        than igen one.
        than igen one.
        * configure : Rebuild.
        * configure : Rebuild.
Fri Mar 27 16:15:52 1998  Andrew Cagney  
Fri Mar 27 16:15:52 1998  Andrew Cagney  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Fri Mar 27 15:01:50 1998  Andrew Cagney  
Fri Mar 27 15:01:50 1998  Andrew Cagney  
        * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
        * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
Wed Mar 25 16:44:27 1998  Ian Carmichael  
Wed Mar 25 16:44:27 1998  Ian Carmichael  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * config.in: Regenerated to track ../common/aclocal.m4 changes.
        * config.in: Regenerated to track ../common/aclocal.m4 changes.
Wed Mar 25 12:35:29 1998  Andrew Cagney  
Wed Mar 25 12:35:29 1998  Andrew Cagney  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Mar 25 10:05:46 1998  Andrew Cagney  
Wed Mar 25 10:05:46 1998  Andrew Cagney  
        * interp.c (Max, Min): Comment out functions. Not yet used.
        * interp.c (Max, Min): Comment out functions. Not yet used.
Wed Mar 18 12:38:12 1998  Andrew Cagney  
Wed Mar 18 12:38:12 1998  Andrew Cagney  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  
Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  
        * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
        * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
        configurable settings for stand-alone simulator.
        configurable settings for stand-alone simulator.
        * configure.in: Added X11 search, just in case.
        * configure.in: Added X11 search, just in case.
        * configure: Regenerated.
        * configure: Regenerated.
Wed Mar 11 14:09:10 1998  Andrew Cagney  
Wed Mar 11 14:09:10 1998  Andrew Cagney  
        * interp.c (sim_write, sim_read, load_memory, store_memory):
        * interp.c (sim_write, sim_read, load_memory, store_memory):
        Replace sim_core_*_map with read_map, write_map, exec_map resp.
        Replace sim_core_*_map with read_map, write_map, exec_map resp.
Tue Mar  3 13:58:43 1998  Andrew Cagney  
Tue Mar  3 13:58:43 1998  Andrew Cagney  
        * sim-main.h (GETFCC): Return an unsigned value.
        * sim-main.h (GETFCC): Return an unsigned value.
Tue Mar  3 13:21:37 1998  Andrew Cagney  
Tue Mar  3 13:21:37 1998  Andrew Cagney  
        * mips.igen (DIV): Fix check for -1 / MIN_INT.
        * mips.igen (DIV): Fix check for -1 / MIN_INT.
        (DADD): Result destination is RD not RT.
        (DADD): Result destination is RD not RT.
Fri Feb 27 13:49:49 1998  Andrew Cagney  
Fri Feb 27 13:49:49 1998  Andrew Cagney  
        * sim-main.h (HIACCESS, LOACCESS): Always define.
        * sim-main.h (HIACCESS, LOACCESS): Always define.
        * mdmx.igen (Maxi, Mini): Rename Max, Min.
        * mdmx.igen (Maxi, Mini): Rename Max, Min.
        * interp.c (sim_info): Delete.
        * interp.c (sim_info): Delete.
Fri Feb 27 18:41:01 1998  Doug Evans  
Fri Feb 27 18:41:01 1998  Doug Evans  
        * interp.c (DECLARE_OPTION_HANDLER): Use it.
        * interp.c (DECLARE_OPTION_HANDLER): Use it.
        (mips_option_handler): New argument `cpu'.
        (mips_option_handler): New argument `cpu'.
        (sim_open): Update call to sim_add_option_table.
        (sim_open): Update call to sim_add_option_table.
Wed Feb 25 18:56:22 1998  Andrew Cagney  
Wed Feb 25 18:56:22 1998  Andrew Cagney  
        * mips.igen (CxC1): Add tracing.
        * mips.igen (CxC1): Add tracing.
Fri Feb 20 17:43:21 1998  Andrew Cagney  
Fri Feb 20 17:43:21 1998  Andrew Cagney  
        * sim-main.h (Max, Min): Declare.
        * sim-main.h (Max, Min): Declare.
        * interp.c (Max, Min): New functions.
        * interp.c (Max, Min): New functions.
        * mips.igen (BC1): Add tracing.
        * mips.igen (BC1): Add tracing.
Thu Feb 19 14:50:00 1998  John Metzler  
Thu Feb 19 14:50:00 1998  John Metzler  
        * interp.c Added memory map for stack in vr4100
        * interp.c Added memory map for stack in vr4100
Thu Feb 19 10:21:21 1998  Gavin Koch  
Thu Feb 19 10:21:21 1998  Gavin Koch  
        * interp.c (load_memory): Add missing "break"'s.
        * interp.c (load_memory): Add missing "break"'s.
Tue Feb 17 12:45:35 1998  Andrew Cagney  
Tue Feb 17 12:45:35 1998  Andrew Cagney  
        * interp.c (sim_store_register, sim_fetch_register): Pass in
        * interp.c (sim_store_register, sim_fetch_register): Pass in
        length parameter.  Return -1.
        length parameter.  Return -1.
Tue Feb 10 11:57:40 1998  Ian Carmichael  
Tue Feb 10 11:57:40 1998  Ian Carmichael  
        * interp.c: Added hardware init hook, fixed warnings.
        * interp.c: Added hardware init hook, fixed warnings.
Sat Feb  7 17:16:20 1998  Andrew Cagney  
Sat Feb  7 17:16:20 1998  Andrew Cagney  
        * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
        * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
Tue Feb  3 11:36:02 1998  Andrew Cagney  
Tue Feb  3 11:36:02 1998  Andrew Cagney  
        * interp.c (ifetch16): New function.
        * interp.c (ifetch16): New function.
        * sim-main.h (IMEM32): Rename IMEM.
        * sim-main.h (IMEM32): Rename IMEM.
        (IMEM16_IMMED): Define.
        (IMEM16_IMMED): Define.
        (IMEM16): Define.
        (IMEM16): Define.
        (DELAY_SLOT): Update.
        (DELAY_SLOT): Update.
        * m16run.c (sim_engine_run): New file.
        * m16run.c (sim_engine_run): New file.
        * m16.igen: All instructions except LB.
        * m16.igen: All instructions except LB.
        (LB): Call do_load_byte.
        (LB): Call do_load_byte.
        * mips.igen (do_load_byte): New function.
        * mips.igen (do_load_byte): New function.
        (LB): Call do_load_byte.
        (LB): Call do_load_byte.
        * mips.igen: Move spec for insn bit size and high bit from here.
        * mips.igen: Move spec for insn bit size and high bit from here.
        * Makefile.in (tmp-igen, tmp-m16): To here.
        * Makefile.in (tmp-igen, tmp-m16): To here.
        * m16.dc: New file, decode mips16 instructions.
        * m16.dc: New file, decode mips16 instructions.
        * Makefile.in (SIM_NO_ALL): Define.
        * Makefile.in (SIM_NO_ALL): Define.
        (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
        (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
Tue Feb  3 11:28:00 1998  Andrew Cagney  
Tue Feb  3 11:28:00 1998  Andrew Cagney  
        * configure.in (mips_fpu_bitsize): For tx39, restrict floating
        * configure.in (mips_fpu_bitsize): For tx39, restrict floating
        point unit to 32 bit registers.
        point unit to 32 bit registers.
        * configure: Re-generate.
        * configure: Re-generate.
Sun Feb  1 15:47:14 1998  Andrew Cagney  
Sun Feb  1 15:47:14 1998  Andrew Cagney  
        * configure.in (sim_use_gen): Make IGEN the default simulator
        * configure.in (sim_use_gen): Make IGEN the default simulator
        generator for generic 32 and 64 bit mips targets.
        generator for generic 32 and 64 bit mips targets.
        * configure: Re-generate.
        * configure: Re-generate.
Sun Feb  1 16:52:37 1998  Andrew Cagney  
Sun Feb  1 16:52:37 1998  Andrew Cagney  
        * sim-main.h (SizeFGR): Determine from floating-point and not gpr
        * sim-main.h (SizeFGR): Determine from floating-point and not gpr
        bitsize.
        bitsize.
        * interp.c (sim_fetch_register, sim_store_register): Read/write
        * interp.c (sim_fetch_register, sim_store_register): Read/write
        FGR from correct location.
        FGR from correct location.
        (sim_open): Set size of FGR's according to
        (sim_open): Set size of FGR's according to
        WITH_TARGET_FLOATING_POINT_BITSIZE.
        WITH_TARGET_FLOATING_POINT_BITSIZE.
        * sim-main.h (FGR): Store floating point registers in a separate
        * sim-main.h (FGR): Store floating point registers in a separate
        array.
        array.
Sun Feb  1 16:47:51 1998  Andrew Cagney  
Sun Feb  1 16:47:51 1998  Andrew Cagney  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Tue Feb  3 00:10:50 1998  Andrew Cagney  
Tue Feb  3 00:10:50 1998  Andrew Cagney  
        * interp.c (ColdReset): Call PENDING_INVALIDATE.
        * interp.c (ColdReset): Call PENDING_INVALIDATE.
        * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
        * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
        * interp.c (pending_tick): New function.  Deliver pending writes.
        * interp.c (pending_tick): New function.  Deliver pending writes.
        * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
        * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
        PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
        PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
        it can handle mixed sized quantites and single bits.
        it can handle mixed sized quantites and single bits.
Mon Feb  2 17:43:15 1998  Andrew Cagney  
Mon Feb  2 17:43:15 1998  Andrew Cagney  
        * interp.c (oengine.h): Do not include when building with IGEN.
        * interp.c (oengine.h): Do not include when building with IGEN.
        (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
        (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
        (sim_info): Ditto for PROCESSOR_64BIT.
        (sim_info): Ditto for PROCESSOR_64BIT.
        (sim_monitor): Replace ut_reg with unsigned_word.
        (sim_monitor): Replace ut_reg with unsigned_word.
        (*): Ditto for t_reg.
        (*): Ditto for t_reg.
        (LOADDRMASK): Define.
        (LOADDRMASK): Define.
        (sim_open): Remove defunct check that host FP is IEEE compliant,
        (sim_open): Remove defunct check that host FP is IEEE compliant,
        using software to emulate floating point.
        using software to emulate floating point.
        (value_fpr, ...): Always compile, was conditional on HASFPU.
        (value_fpr, ...): Always compile, was conditional on HASFPU.
Sun Feb  1 11:15:29 1998  Andrew Cagney  
Sun Feb  1 11:15:29 1998  Andrew Cagney  
        * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
        * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
        size.
        size.
        * interp.c (SD, CPU): Define.
        * interp.c (SD, CPU): Define.
        (mips_option_handler): Set flags in each CPU.
        (mips_option_handler): Set flags in each CPU.
        (interrupt_event): Assume CPU 0 is the one being iterrupted.
        (interrupt_event): Assume CPU 0 is the one being iterrupted.
        (sim_close): Do not clear STATE, deleted anyway.
        (sim_close): Do not clear STATE, deleted anyway.
        (sim_write, sim_read): Assume CPU zero's vm should be used for
        (sim_write, sim_read): Assume CPU zero's vm should be used for
        data transfers.
        data transfers.
        (sim_create_inferior): Set the PC for all processors.
        (sim_create_inferior): Set the PC for all processors.
        (sim_monitor, store_word, load_word, mips16_entry): Add cpu
        (sim_monitor, store_word, load_word, mips16_entry): Add cpu
        argument.
        argument.
        (mips16_entry): Pass correct nr of args to store_word, load_word.
        (mips16_entry): Pass correct nr of args to store_word, load_word.
        (ColdReset): Cold reset all cpu's.
        (ColdReset): Cold reset all cpu's.
        (signal_exception): Pass cpu to sim_monitor & mips16_entry.
        (signal_exception): Pass cpu to sim_monitor & mips16_entry.
        (sim_monitor, load_memory, store_memory, signal_exception): Use
        (sim_monitor, load_memory, store_memory, signal_exception): Use
        `CPU' instead of STATE_CPU.
        `CPU' instead of STATE_CPU.
        * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
        * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
        SD or CPU_.
        SD or CPU_.
        * sim-main.h (signal_exception): Add sim_cpu arg.
        * sim-main.h (signal_exception): Add sim_cpu arg.
        (SignalException*): Pass both SD and CPU to signal_exception.
        (SignalException*): Pass both SD and CPU to signal_exception.
        * interp.c (signal_exception): Update.
        * interp.c (signal_exception): Update.
        * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
        * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
        Ditto
        Ditto
        (sync_operation, prefetch, cache_op, store_memory, load_memory,
        (sync_operation, prefetch, cache_op, store_memory, load_memory,
        address_translation): Ditto
        address_translation): Ditto
        (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
        (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
Sat Jan 31 18:15:41 1998  Andrew Cagney  
Sat Jan 31 18:15:41 1998  Andrew Cagney  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Sat Jan 31 14:49:24 1998  Andrew Cagney  
Sat Jan 31 14:49:24 1998  Andrew Cagney  
        * interp.c (sim_engine_run): Add `nr_cpus' argument.
        * interp.c (sim_engine_run): Add `nr_cpus' argument.
        * mips.igen (model): Map processor names onto BFD name.
        * mips.igen (model): Map processor names onto BFD name.
        * sim-main.h (CPU_CIA): Delete.
        * sim-main.h (CPU_CIA): Delete.
        (SET_CIA, GET_CIA): Define
        (SET_CIA, GET_CIA): Define
Wed Jan 21 16:16:27 1998  Andrew Cagney  
Wed Jan 21 16:16:27 1998  Andrew Cagney  
        * sim-main.h (GPR_SET): Define, used by igen when zeroing a
        * sim-main.h (GPR_SET): Define, used by igen when zeroing a
        regiser.
        regiser.
        * configure.in (default_endian): Configure a big-endian simulator
        * configure.in (default_endian): Configure a big-endian simulator
        by default.
        by default.
        * configure: Re-generate.
        * configure: Re-generate.
Mon Jan 19 22:26:29 1998  Doug Evans  
Mon Jan 19 22:26:29 1998  Doug Evans  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Mon Jan  5 20:38:54 1998  Mark Alexander  
Mon Jan  5 20:38:54 1998  Mark Alexander  
        * interp.c (sim_monitor): Handle Densan monitor outbyte
        * interp.c (sim_monitor): Handle Densan monitor outbyte
        and inbyte functions.
        and inbyte functions.
1997-12-29  Felix Lee  
1997-12-29  Felix Lee  
        * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
        * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
        * Makefile.in (tmp-igen): Arrange for $zero to always be
        * Makefile.in (tmp-igen): Arrange for $zero to always be
        reset to zero after every instruction.
        reset to zero after every instruction.
Mon Dec 15 23:17:11 1997  Andrew Cagney  
Mon Dec 15 23:17:11 1997  Andrew Cagney  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * config.in: Ditto.
        * config.in: Ditto.
Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
        * mips.igen (MSUB): Fix to work like MADD.
        * mips.igen (MSUB): Fix to work like MADD.
        * gencode.c (MSUB): Similarly.
        * gencode.c (MSUB): Similarly.
Thu Dec  4 09:21:05 1997  Doug Evans  
Thu Dec  4 09:21:05 1997  Doug Evans  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Nov 26 11:00:23 1997  Andrew Cagney  
Wed Nov 26 11:00:23 1997  Andrew Cagney  
        * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
        * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
Sun Nov 23 01:45:20 1997  Andrew Cagney  
Sun Nov 23 01:45:20 1997  Andrew Cagney  
        * sim-main.h (sim-fpu.h): Include.
        * sim-main.h (sim-fpu.h): Include.
        * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
        * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
        Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
        Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
        using host independant sim_fpu module.
        using host independant sim_fpu module.
Thu Nov 20 19:56:22 1997  Andrew Cagney  
Thu Nov 20 19:56:22 1997  Andrew Cagney  
        * interp.c (signal_exception): Report internal errors with SIGABRT
        * interp.c (signal_exception): Report internal errors with SIGABRT
        not SIGQUIT.
        not SIGQUIT.
        * sim-main.h (C0_CONFIG): New register.
        * sim-main.h (C0_CONFIG): New register.
        (signal.h): No longer include.
        (signal.h): No longer include.
        * interp.c (decode_coproc): Allow access C0_CONFIG to register.
        * interp.c (decode_coproc): Allow access C0_CONFIG to register.
Tue Nov 18 15:33:48 1997  Doug Evans  
Tue Nov 18 15:33:48 1997  Doug Evans  
        * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
        * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
Fri Nov 14 11:56:48 1997  Andrew Cagney  
Fri Nov 14 11:56:48 1997  Andrew Cagney  
        * mips.igen: Tag vr5000 instructions.
        * mips.igen: Tag vr5000 instructions.
        (ANDI): Was missing mipsIV model, fix assembler syntax.
        (ANDI): Was missing mipsIV model, fix assembler syntax.
        (do_c_cond_fmt): New function.
        (do_c_cond_fmt): New function.
        (C.cond.fmt): Handle mips I-III which do not support CC field
        (C.cond.fmt): Handle mips I-III which do not support CC field
        separatly.
        separatly.
        (bc1): Handle mips IV which do not have a delaed FCC separatly.
        (bc1): Handle mips IV which do not have a delaed FCC separatly.
        (SDR): Mask paddr when BigEndianMem, not the converse as specified
        (SDR): Mask paddr when BigEndianMem, not the converse as specified
        in IV3.2 spec.
        in IV3.2 spec.
        (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
        (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
        vr5000 which saves LO in a GPR separatly.
        vr5000 which saves LO in a GPR separatly.
        * configure.in (enable-sim-igen): For vr5000, select vr5000
        * configure.in (enable-sim-igen): For vr5000, select vr5000
        specific instructions.
        specific instructions.
        * configure: Re-generate.
        * configure: Re-generate.
Wed Nov 12 14:42:52 1997  Andrew Cagney  
Wed Nov 12 14:42:52 1997  Andrew Cagney  
        * Makefile.in (SIM_OBJS): Add sim-fpu module.
        * Makefile.in (SIM_OBJS): Add sim-fpu module.
        * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
        * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
        fmt_uninterpreted_64 bit cases to switch.  Convert to
        fmt_uninterpreted_64 bit cases to switch.  Convert to
        fmt_formatted,
        fmt_formatted,
        * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
        * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
        * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
        * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
        as specified in IV3.2 spec.
        as specified in IV3.2 spec.
        (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
        (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
Tue Nov 11 12:38:23 1997  Andrew Cagney  
Tue Nov 11 12:38:23 1997  Andrew Cagney  
        * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
        * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
        (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
        (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
        (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
        (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
        PENDING_FILL versions of instructions.  Simplify.
        PENDING_FILL versions of instructions.  Simplify.
        (X): New function.
        (X): New function.
        (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
        (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
        instructions.
        instructions.
        (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
        (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
        a signed value.
        a signed value.
        (MTHI, MFHI): Disable code checking HI-LO.
        (MTHI, MFHI): Disable code checking HI-LO.
        * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
        * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
        global.
        global.
        (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
        (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
Thu Nov  6 16:36:35 1997  Andrew Cagney  
Thu Nov  6 16:36:35 1997  Andrew Cagney  
        * gencode.c (build_mips16_operands): Replace IPC with cia.
        * gencode.c (build_mips16_operands): Replace IPC with cia.
        * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
        * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
        value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
        value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
        IPC to `cia'.
        IPC to `cia'.
        (UndefinedResult): Replace function with macro/function
        (UndefinedResult): Replace function with macro/function
        combination.
        combination.
        (sim_engine_run): Don't save PC in IPC.
        (sim_engine_run): Don't save PC in IPC.
        * sim-main.h (IPC): Delete.
        * sim-main.h (IPC): Delete.
        * interp.c (signal_exception, store_word, load_word,
        * interp.c (signal_exception, store_word, load_word,
        address_translation, load_memory, store_memory, cache_op,
        address_translation, load_memory, store_memory, cache_op,
        prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
        prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
        cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
        cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
        current instruction address - cia - argument.
        current instruction address - cia - argument.
        (sim_read, sim_write): Call address_translation directly.
        (sim_read, sim_write): Call address_translation directly.
        (sim_engine_run): Rename variable vaddr to cia.
        (sim_engine_run): Rename variable vaddr to cia.
        (signal_exception): Pass cia to sim_monitor
        (signal_exception): Pass cia to sim_monitor
        * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
        * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
        Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
        Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
        COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
        COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
        * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
        * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
        * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
        * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
        SIM_ASSERT.
        SIM_ASSERT.
        * interp.c (signal_exception): Pass restart address to
        * interp.c (signal_exception): Pass restart address to
        sim_engine_restart.
        sim_engine_restart.
        * Makefile.in (semantics.o, engine.o, support.o, itable.o,
        * Makefile.in (semantics.o, engine.o, support.o, itable.o,
        idecode.o): Add dependency.
        idecode.o): Add dependency.
        * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
        * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
        Delete definitions
        Delete definitions
        (DELAY_SLOT): Update NIA not PC with branch address.
        (DELAY_SLOT): Update NIA not PC with branch address.
        (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
        (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
        * mips.igen: Use CIA not PC in branch calculations.
        * mips.igen: Use CIA not PC in branch calculations.
        (illegal): Call SignalException.
        (illegal): Call SignalException.
        (BEQ, ADDIU): Fix assembler.
        (BEQ, ADDIU): Fix assembler.
Wed Nov  5 12:19:56 1997  Andrew Cagney  
Wed Nov  5 12:19:56 1997  Andrew Cagney  
        * m16.igen (JALX): Was missing.
        * m16.igen (JALX): Was missing.
        * configure.in (enable-sim-igen): New configuration option.
        * configure.in (enable-sim-igen): New configuration option.
        * configure: Re-generate.
        * configure: Re-generate.
        * sim-main.h (MAX_INSNS, INSN_NAME): Define.
        * sim-main.h (MAX_INSNS, INSN_NAME): Define.
        * interp.c (load_memory, store_memory): Delete parameter RAW.
        * interp.c (load_memory, store_memory): Delete parameter RAW.
        (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
        (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
        bypassing {load,store}_memory.
        bypassing {load,store}_memory.
        * sim-main.h (ByteSwapMem): Delete definition.
        * sim-main.h (ByteSwapMem): Delete definition.
        * Makefile.in (SIM_OBJS): Add sim-memopt module.
        * Makefile.in (SIM_OBJS): Add sim-memopt module.
        * interp.c (sim_do_command, sim_commands): Delete mips specific
        * interp.c (sim_do_command, sim_commands): Delete mips specific
        commands.  Handled by module sim-options.
        commands.  Handled by module sim-options.
        * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
        * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
        (WITH_MODULO_MEMORY): Define.
        (WITH_MODULO_MEMORY): Define.
        * interp.c (sim_info): Delete code printing memory size.
        * interp.c (sim_info): Delete code printing memory size.
        * interp.c (mips_size): Nee sim_size, delete function.
        * interp.c (mips_size): Nee sim_size, delete function.
        (power2): Delete.
        (power2): Delete.
        (monitor, monitor_base, monitor_size): Delete global variables.
        (monitor, monitor_base, monitor_size): Delete global variables.
        (sim_open, sim_close): Delete code creating monitor and other
        (sim_open, sim_close): Delete code creating monitor and other
        memory regions.  Use sim-memopts module, via sim_do_commandf, to
        memory regions.  Use sim-memopts module, via sim_do_commandf, to
        manage memory regions.
        manage memory regions.
        (load_memory, store_memory): Use sim-core for memory model.
        (load_memory, store_memory): Use sim-core for memory model.
        * interp.c (address_translation): Delete all memory map code
        * interp.c (address_translation): Delete all memory map code
        except line forcing 32 bit addresses.
        except line forcing 32 bit addresses.
Wed Nov  5 11:21:11 1997  Andrew Cagney  
Wed Nov  5 11:21:11 1997  Andrew Cagney  
        * sim-main.h (WITH_TRACE): Delete definition.  Enables common
        * sim-main.h (WITH_TRACE): Delete definition.  Enables common
        trace options.
        trace options.
        * interp.c (logfh, logfile): Delete globals.
        * interp.c (logfh, logfile): Delete globals.
        (sim_open, sim_close): Delete code opening & closing log file.
        (sim_open, sim_close): Delete code opening & closing log file.
        (mips_option_handler): Delete -l and -n options.
        (mips_option_handler): Delete -l and -n options.
        (OPTION mips_options): Ditto.
        (OPTION mips_options): Ditto.
        * interp.c (OPTION mips_options): Rename option trace to dinero.
        * interp.c (OPTION mips_options): Rename option trace to dinero.
        (mips_option_handler): Update.
        (mips_option_handler): Update.
Wed Nov  5 09:35:59 1997  Andrew Cagney  
Wed Nov  5 09:35:59 1997  Andrew Cagney  
        * interp.c (fetch_str): New function.
        * interp.c (fetch_str): New function.
        (sim_monitor): Rewrite using sim_read & sim_write.
        (sim_monitor): Rewrite using sim_read & sim_write.
        (sim_open): Check magic number.
        (sim_open): Check magic number.
        (sim_open): Write monitor vectors into memory using sim_write.
        (sim_open): Write monitor vectors into memory using sim_write.
        (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
        (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
        (sim_read, sim_write): Simplify - transfer data one byte at a
        (sim_read, sim_write): Simplify - transfer data one byte at a
        time.
        time.
        (load_memory, store_memory): Clarify meaning of parameter RAW.
        (load_memory, store_memory): Clarify meaning of parameter RAW.
        * sim-main.h (isHOST): Defete definition.
        * sim-main.h (isHOST): Defete definition.
        (isTARGET): Mark as depreciated.
        (isTARGET): Mark as depreciated.
        (address_translation): Delete parameter HOST.
        (address_translation): Delete parameter HOST.
        * interp.c (address_translation): Delete parameter HOST.
        * interp.c (address_translation): Delete parameter HOST.
Wed Oct 29 11:13:56 1997  Andrew Cagney  
Wed Oct 29 11:13:56 1997  Andrew Cagney  
        * mips.igen:
        * mips.igen:
        * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
        * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
        (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
        (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
Tue Oct 28 11:06:47 1997  Andrew Cagney  
Tue Oct 28 11:06:47 1997  Andrew Cagney  
        * mips.igen: Add model filter field to records.
        * mips.igen: Add model filter field to records.
Mon Oct 27 17:53:59 1997  Andrew Cagney  
Mon Oct 27 17:53:59 1997  Andrew Cagney  
        * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
        * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
        interp.c (sim_engine_run): Do not compile function sim_engine_run
        interp.c (sim_engine_run): Do not compile function sim_engine_run
        when WITH_IGEN == 1.
        when WITH_IGEN == 1.
        * configure.in (sim_igen_flags, sim_m16_flags): Set according to
        * configure.in (sim_igen_flags, sim_m16_flags): Set according to
        target architecture.
        target architecture.
        Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
        Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
        igen. Replace with configuration variables sim_igen_flags /
        igen. Replace with configuration variables sim_igen_flags /
        sim_m16_flags.
        sim_m16_flags.
        * m16.igen: New file.  Copy mips16 insns here.
        * m16.igen: New file.  Copy mips16 insns here.
        * mips.igen: From here.
        * mips.igen: From here.
Mon Oct 27 13:53:59 1997  Andrew Cagney  
Mon Oct 27 13:53:59 1997  Andrew Cagney  
        * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
        * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
        to top.
        to top.
        (tmp-igen, tmp-m16): Pass -I srcdir to igen.
        (tmp-igen, tmp-m16): Pass -I srcdir to igen.
Sat Oct 25 16:51:40 1997  Gavin Koch  
Sat Oct 25 16:51:40 1997  Gavin Koch  
        * gencode.c (build_instruction): Follow sim_write's lead in using
        * gencode.c (build_instruction): Follow sim_write's lead in using
        BigEndianMem instead of !ByteSwapMem.
        BigEndianMem instead of !ByteSwapMem.
Fri Oct 24 17:41:49 1997  Andrew Cagney  
Fri Oct 24 17:41:49 1997  Andrew Cagney  
        * configure.in (sim_gen): Dependent on target, select type of
        * configure.in (sim_gen): Dependent on target, select type of
        generator.  Always select old style generator.
        generator.  Always select old style generator.
        configure: Re-generate.
        configure: Re-generate.
        Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
        Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
        targets.
        targets.
        (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
        (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
        SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
        SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
        IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
        IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
        (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
        (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
        SIM_@sim_gen@_*, set by autoconf.
        SIM_@sim_gen@_*, set by autoconf.
Wed Oct 22 12:52:06 1997  Andrew Cagney  
Wed Oct 22 12:52:06 1997  Andrew Cagney  
        * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
        * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
        * interp.c (ColdReset): Remove #ifdef HASFPU, check
        * interp.c (ColdReset): Remove #ifdef HASFPU, check
        CURRENT_FLOATING_POINT instead.
        CURRENT_FLOATING_POINT instead.
        * interp.c (ifetch32): New function. Fetch 32 bit instruction.
        * interp.c (ifetch32): New function. Fetch 32 bit instruction.
        (address_translation): Raise exception InstructionFetch when
        (address_translation): Raise exception InstructionFetch when
        translation fails and isINSTRUCTION.
        translation fails and isINSTRUCTION.
        * interp.c (sim_open, sim_write, sim_monitor, store_word,
        * interp.c (sim_open, sim_write, sim_monitor, store_word,
        sim_engine_run): Change type of of vaddr and paddr to
        sim_engine_run): Change type of of vaddr and paddr to
        address_word.
        address_word.
        (address_translation, prefetch, load_memory, store_memory,
        (address_translation, prefetch, load_memory, store_memory,
        cache_op): Change type of vAddr and pAddr to address_word.
        cache_op): Change type of vAddr and pAddr to address_word.
        * gencode.c (build_instruction): Change type of vaddr and paddr to
        * gencode.c (build_instruction): Change type of vaddr and paddr to
        address_word.
        address_word.
Mon Oct 20 15:29:04 1997  Andrew Cagney  
Mon Oct 20 15:29:04 1997  Andrew Cagney  
        * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
        * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
        macro to obtain result of ALU op.
        macro to obtain result of ALU op.
Tue Oct 21 17:39:14 1997  Andrew Cagney  
Tue Oct 21 17:39:14 1997  Andrew Cagney  
        * interp.c (sim_info): Call profile_print.
        * interp.c (sim_info): Call profile_print.
Mon Oct 20 13:31:20 1997  Andrew Cagney  
Mon Oct 20 13:31:20 1997  Andrew Cagney  
        * Makefile.in (SIM_OBJS): Add sim-profile.o module.
        * Makefile.in (SIM_OBJS): Add sim-profile.o module.
        * sim-main.h (WITH_PROFILE): Do not define, defined in
        * sim-main.h (WITH_PROFILE): Do not define, defined in
        common/sim-config.h.  Use sim-profile module.
        common/sim-config.h.  Use sim-profile module.
        (simPROFILE): Delete defintion.
        (simPROFILE): Delete defintion.
        * interp.c (PROFILE): Delete definition.
        * interp.c (PROFILE): Delete definition.
        (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
        (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
        (sim_close): Delete code writing profile histogram.
        (sim_close): Delete code writing profile histogram.
        (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
        (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
        Delete.
        Delete.
        (sim_engine_run): Delete code profiling the PC.
        (sim_engine_run): Delete code profiling the PC.
Mon Oct 20 13:31:20 1997  Andrew Cagney  
Mon Oct 20 13:31:20 1997  Andrew Cagney  
        * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
        * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
        * interp.c (sim_monitor): Make register pointers of type
        * interp.c (sim_monitor): Make register pointers of type
        unsigned_word*.
        unsigned_word*.
        * sim-main.h: Make registers of type unsigned_word not
        * sim-main.h: Make registers of type unsigned_word not
        signed_word.
        signed_word.
Thu Oct 16 10:31:39 1997  Andrew Cagney  
Thu Oct 16 10:31:39 1997  Andrew Cagney  
        * interp.c (sync_operation): Rename from SyncOperation, make
        * interp.c (sync_operation): Rename from SyncOperation, make
        global, add SD argument.
        global, add SD argument.
        (prefetch): Rename from Prefetch, make global, add SD argument.
        (prefetch): Rename from Prefetch, make global, add SD argument.
        (decode_coproc): Make global.
        (decode_coproc): Make global.
        * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
        * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
        * gencode.c (build_instruction): Generate DecodeCoproc not
        * gencode.c (build_instruction): Generate DecodeCoproc not
        decode_coproc calls.
        decode_coproc calls.
        * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
        * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
        (SizeFGR): Move to sim-main.h
        (SizeFGR): Move to sim-main.h
        (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
        (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
        simSIGINT, simJALDELAYSLOT): Move to sim-main.h
        simSIGINT, simJALDELAYSLOT): Move to sim-main.h
        (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
        (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
        sim-main.h.
        sim-main.h.
        (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
        (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
        FP_RM_TOMINF, GETRM): Move to sim-main.h.
        FP_RM_TOMINF, GETRM): Move to sim-main.h.
        (Uncached, CachedNoncoherent, CachedCoherent, Cached,
        (Uncached, CachedNoncoherent, CachedCoherent, Cached,
        isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
        isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
        (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
        (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
        BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
        BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
        * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
        * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
        exception.
        exception.
        (sim-alu.h): Include.
        (sim-alu.h): Include.
        (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
        (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
        (sim_cia): Typedef to instruction_address.
        (sim_cia): Typedef to instruction_address.
Thu Oct 16 10:31:41 1997  Andrew Cagney  
Thu Oct 16 10:31:41 1997  Andrew Cagney  
        * Makefile.in (interp.o): Rename generated file engine.c to
        * Makefile.in (interp.o): Rename generated file engine.c to
        oengine.c.
        oengine.c.
        * interp.c: Update.
        * interp.c: Update.
Thu Oct 16 10:31:40 1997  Andrew Cagney  
Thu Oct 16 10:31:40 1997  Andrew Cagney  
        * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
        * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
Thu Oct 16 10:31:39 1997  Andrew Cagney  
Thu Oct 16 10:31:39 1997  Andrew Cagney  
        * gencode.c (build_instruction): For "FPSQRT", output correct
        * gencode.c (build_instruction): For "FPSQRT", output correct
        number of arguments to Recip.
        number of arguments to Recip.
Tue Oct 14 17:38:18 1997  Andrew Cagney  
Tue Oct 14 17:38:18 1997  Andrew Cagney  
        * Makefile.in (interp.o): Depends on sim-main.h
        * Makefile.in (interp.o): Depends on sim-main.h
        * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
        * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
        * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
        * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
        ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
        ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
        (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
        (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
        STATE, DSSTATE): Define
        STATE, DSSTATE): Define
        (GPR, FGRIDX, ..): Define.
        (GPR, FGRIDX, ..): Define.
        * interp.c (registers, register_widths, fpr_state, ipc, dspc,
        * interp.c (registers, register_widths, fpr_state, ipc, dspc,
        pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
        pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
        (GPR, FGRIDX, ...): Delete macros.
        (GPR, FGRIDX, ...): Delete macros.
        * interp.c: Update names to match defines from sim-main.h
        * interp.c: Update names to match defines from sim-main.h
Tue Oct 14 15:11:45 1997  Andrew Cagney  
Tue Oct 14 15:11:45 1997  Andrew Cagney  
        * interp.c (sim_monitor): Add SD argument.
        * interp.c (sim_monitor): Add SD argument.
        (sim_warning): Delete.  Replace calls with calls to
        (sim_warning): Delete.  Replace calls with calls to
        sim_io_eprintf.
        sim_io_eprintf.
        (sim_error): Delete. Replace calls with sim_io_error.
        (sim_error): Delete. Replace calls with sim_io_error.
        (open_trace, writeout32, writeout16, getnum): Add SD argument.
        (open_trace, writeout32, writeout16, getnum): Add SD argument.
        (mips_set_profile): Rename from sim_set_profile. Add SD argument.
        (mips_set_profile): Rename from sim_set_profile. Add SD argument.
        (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
        (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
        argument.
        argument.
        (mips_size): Rename from sim_size. Add SD argument.
        (mips_size): Rename from sim_size. Add SD argument.
        * interp.c (simulator): Delete global variable.
        * interp.c (simulator): Delete global variable.
        (callback): Delete global variable.
        (callback): Delete global variable.
        (mips_option_handler, sim_open, sim_write, sim_read,
        (mips_option_handler, sim_open, sim_write, sim_read,
        sim_store_register, sim_fetch_register, sim_info, sim_do_command,
        sim_store_register, sim_fetch_register, sim_info, sim_do_command,
        sim_size,sim_monitor): Use sim_io_* not callback->*.
        sim_size,sim_monitor): Use sim_io_* not callback->*.
        (sim_open): ZALLOC simulator struct.
        (sim_open): ZALLOC simulator struct.
        (PROFILE): Do not define.
        (PROFILE): Do not define.
Tue Oct 14 13:35:48 1997  Andrew Cagney  
Tue Oct 14 13:35:48 1997  Andrew Cagney  
        * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
        * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
        support.h with corresponding code.
        support.h with corresponding code.
        * sim-main.h (word64, uword64), support.h: Move definition to
        * sim-main.h (word64, uword64), support.h: Move definition to
        sim-main.h.
        sim-main.h.
        (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
        (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
        * support.h: Delete
        * support.h: Delete
        * Makefile.in: Update dependencies
        * Makefile.in: Update dependencies
        * interp.c: Do not include.
        * interp.c: Do not include.
Tue Oct 14 13:35:48 1997  Andrew Cagney  
Tue Oct 14 13:35:48 1997  Andrew Cagney  
        * interp.c (address_translation, load_memory, store_memory,
        * interp.c (address_translation, load_memory, store_memory,
        cache_op): Rename to from AddressTranslation et.al., make global,
        cache_op): Rename to from AddressTranslation et.al., make global,
        add SD argument
        add SD argument
        * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
        * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
        CacheOp): Define.
        CacheOp): Define.
        * interp.c (SignalException): Rename to signal_exception, make
        * interp.c (SignalException): Rename to signal_exception, make
        global.
        global.
        * interp.c (Interrupt, ...): Move definitions to sim-main.h.
        * interp.c (Interrupt, ...): Move definitions to sim-main.h.
        * sim-main.h (SignalException, SignalExceptionInterrupt,
        * sim-main.h (SignalException, SignalExceptionInterrupt,
        SignalExceptionInstructionFetch, SignalExceptionAddressStore,
        SignalExceptionInstructionFetch, SignalExceptionAddressStore,
        SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
        SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
        SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
        SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
        Define.
        Define.
        * interp.c, support.h: Use.
        * interp.c, support.h: Use.
Tue Oct 14 13:19:20 1997  Andrew Cagney  
Tue Oct 14 13:19:20 1997  Andrew Cagney  
        * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
        * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
        to value_fpr / store_fpr. Add SD argument.
        to value_fpr / store_fpr. Add SD argument.
        (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
        (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
        Multiply, Divide, Recip, SquareRoot, Convert): Make global.
        Multiply, Divide, Recip, SquareRoot, Convert): Make global.
        * sim-main.h (ValueFPR, StoreFPR): Define.
        * sim-main.h (ValueFPR, StoreFPR): Define.
Tue Oct 14 13:06:55 1997  Andrew Cagney  
Tue Oct 14 13:06:55 1997  Andrew Cagney  
        * interp.c (sim_engine_run): Check consistency between configure
        * interp.c (sim_engine_run): Check consistency between configure
        WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
        WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
        and HASFPU.
        and HASFPU.
        * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
        * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
        (mips_fpu): Configure WITH_FLOATING_POINT.
        (mips_fpu): Configure WITH_FLOATING_POINT.
        (mips_endian): Configure WITH_TARGET_ENDIAN.
        (mips_endian): Configure WITH_TARGET_ENDIAN.
        * configure: Update.
        * configure: Update.
Fri Oct  3 09:28:00 1997  Andrew Cagney  
Fri Oct  3 09:28:00 1997  Andrew Cagney  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Mon Sep 29 14:45:00 1997  Bob Manson  
Mon Sep 29 14:45:00 1997  Bob Manson  
        * configure: Regenerated.
        * configure: Regenerated.
Fri Sep 26 12:48:18 1997  Mark Alexander  
Fri Sep 26 12:48:18 1997  Mark Alexander  
        * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
        * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
Thu Sep 25 11:15:22 1997  Andrew Cagney  
Thu Sep 25 11:15:22 1997  Andrew Cagney  
        * gencode.c (print_igen_insn_models): Assume certain architectures
        * gencode.c (print_igen_insn_models): Assume certain architectures
        include all mips* instructions.
        include all mips* instructions.
        (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
        (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
        instruction.
        instruction.
        * Makefile.in (tmp.igen): Add target. Generate igen input from
        * Makefile.in (tmp.igen): Add target. Generate igen input from
        gencode file.
        gencode file.
        * gencode.c (FEATURE_IGEN): Define.
        * gencode.c (FEATURE_IGEN): Define.
        (main): Add --igen option.  Generate output in igen format.
        (main): Add --igen option.  Generate output in igen format.
        (process_instructions): Format output according to igen option.
        (process_instructions): Format output according to igen option.
        (print_igen_insn_format): New function.
        (print_igen_insn_format): New function.
        (print_igen_insn_models): New function.
        (print_igen_insn_models): New function.
        (process_instructions): Only issue warnings and ignore
        (process_instructions): Only issue warnings and ignore
        instructions when no FEATURE_IGEN.
        instructions when no FEATURE_IGEN.
Wed Sep 24 17:38:57 1997  Andrew Cagney  
Wed Sep 24 17:38:57 1997  Andrew Cagney  
        * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
        * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
        MIPS targets.
        MIPS targets.
Tue Sep 23 11:04:38 1997  Andrew Cagney  
Tue Sep 23 11:04:38 1997  Andrew Cagney  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Tue Sep 23 10:19:51 1997  Andrew Cagney  
Tue Sep 23 10:19:51 1997  Andrew Cagney  
        * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
        * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
        SIM_RESERVED_BITS): Delete, moved to common.
        SIM_RESERVED_BITS): Delete, moved to common.
        (SIM_EXTRA_CFLAGS): Update.
        (SIM_EXTRA_CFLAGS): Update.
Mon Sep 22 11:46:20 1997  Andrew Cagney  
Mon Sep 22 11:46:20 1997  Andrew Cagney  
        * configure.in: Configure non-strict memory alignment.
        * configure.in: Configure non-strict memory alignment.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Fri Sep 19 17:45:25 1997  Andrew Cagney  
Fri Sep 19 17:45:25 1997  Andrew Cagney  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Sat Sep 20 14:07:28 1997  Gavin Koch  
Sat Sep 20 14:07:28 1997  Gavin Koch  
        * gencode.c (SDBBP,DERET): Added (3900) insns.
        * gencode.c (SDBBP,DERET): Added (3900) insns.
        (RFE): Turn on for 3900.
        (RFE): Turn on for 3900.
        * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
        * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
        (dsstate): Made global.
        (dsstate): Made global.
        (SUBTARGET_R3900): Added.
        (SUBTARGET_R3900): Added.
        (CANCELDELAYSLOT): New.
        (CANCELDELAYSLOT): New.
        (SignalException): Ignore SystemCall rather than ignore and
        (SignalException): Ignore SystemCall rather than ignore and
        terminate.  Add DebugBreakPoint handling.
        terminate.  Add DebugBreakPoint handling.
        (decode_coproc): New insns RFE, DERET; and new registers Debug
        (decode_coproc): New insns RFE, DERET; and new registers Debug
        and DEPC protected by SUBTARGET_R3900.
        and DEPC protected by SUBTARGET_R3900.
        (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
        (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
        bits explicitly.
        bits explicitly.
        * Makefile.in,configure.in: Add mips subtarget option.
        * Makefile.in,configure.in: Add mips subtarget option.
        * configure: Update.
        * configure: Update.
Fri Sep 19 09:33:27 1997  Gavin Koch  
Fri Sep 19 09:33:27 1997  Gavin Koch  
        * gencode.c: Add r3900 (tx39).
        * gencode.c: Add r3900 (tx39).
Tue Sep 16 15:52:04 1997  Gavin Koch  
Tue Sep 16 15:52:04 1997  Gavin Koch  
        * gencode.c (build_instruction): Don't need to subtract 4 for
        * gencode.c (build_instruction): Don't need to subtract 4 for
        JALR, just 2.
        JALR, just 2.
Tue Sep 16 11:32:28 1997  Gavin Koch  
Tue Sep 16 11:32:28 1997  Gavin Koch  
        * interp.c: Correct some HASFPU problems.
        * interp.c: Correct some HASFPU problems.
Mon Sep 15 17:36:15 1997  Andrew Cagney  
Mon Sep 15 17:36:15 1997  Andrew Cagney  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Fri Sep 12 12:01:39 1997  Andrew Cagney  
Fri Sep 12 12:01:39 1997  Andrew Cagney  
        * interp.c (mips_options): Fix samples option short form, should
        * interp.c (mips_options): Fix samples option short form, should
        be `x'.
        be `x'.
Thu Sep 11 09:35:29 1997  Andrew Cagney  
Thu Sep 11 09:35:29 1997  Andrew Cagney  
        * interp.c (sim_info): Enable info code.  Was just returning.
        * interp.c (sim_info): Enable info code.  Was just returning.
Tue Sep  9 17:30:57 1997  Andrew Cagney  
Tue Sep  9 17:30:57 1997  Andrew Cagney  
        * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
        * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
        MFC0.
        MFC0.
Tue Sep  9 16:28:28 1997  Andrew Cagney  
Tue Sep  9 16:28:28 1997  Andrew Cagney  
        * gencode.c (build_instruction): Use SIGNED64 for 64 bit
        * gencode.c (build_instruction): Use SIGNED64 for 64 bit
        constants.
        constants.
        (build_instruction): Ditto for LL.
        (build_instruction): Ditto for LL.
Thu Sep  4 17:21:23 1997  Doug Evans  
Thu Sep  4 17:21:23 1997  Doug Evans  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Aug 27 18:13:22 1997  Andrew Cagney  
Wed Aug 27 18:13:22 1997  Andrew Cagney  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * config.in: Ditto.
        * config.in: Ditto.
Wed Aug 27 14:12:27 1997  Andrew Cagney  
Wed Aug 27 14:12:27 1997  Andrew Cagney  
        * interp.c (sim_open): Add call to sim_analyze_program, update
        * interp.c (sim_open): Add call to sim_analyze_program, update
        call to sim_config.
        call to sim_config.
Tue Aug 26 10:40:07 1997  Andrew Cagney  
Tue Aug 26 10:40:07 1997  Andrew Cagney  
        * interp.c (sim_kill): Delete.
        * interp.c (sim_kill): Delete.
        (sim_create_inferior): Add ABFD argument. Set PC from same.
        (sim_create_inferior): Add ABFD argument. Set PC from same.
        (sim_load): Move code initializing trap handlers from here.
        (sim_load): Move code initializing trap handlers from here.
        (sim_open): To here.
        (sim_open): To here.
        (sim_load): Delete, use sim-hload.c.
        (sim_load): Delete, use sim-hload.c.
        * Makefile.in (SIM_OBJS): Add sim-hload.o module.
        * Makefile.in (SIM_OBJS): Add sim-hload.o module.
Mon Aug 25 17:50:22 1997  Andrew Cagney  
Mon Aug 25 17:50:22 1997  Andrew Cagney  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * config.in: Ditto.
        * config.in: Ditto.
Mon Aug 25 15:59:48 1997  Andrew Cagney  
Mon Aug 25 15:59:48 1997  Andrew Cagney  
        * interp.c (sim_open): Add ABFD argument.
        * interp.c (sim_open): Add ABFD argument.
        (sim_load): Move call to sim_config from here.
        (sim_load): Move call to sim_config from here.
        (sim_open): To here.  Check return status.
        (sim_open): To here.  Check return status.
Fri Jul 25 15:00:45 1997  Gavin Koch  
Fri Jul 25 15:00:45 1997  Gavin Koch  
        * gencode.c (build_instruction): Two arg MADD should
        * gencode.c (build_instruction): Two arg MADD should
        not assign result to $0.
        not assign result to $0.
Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
        * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
        * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
        * sim/mips/configure.in: Regenerate.
        * sim/mips/configure.in: Regenerate.
Wed Jul  9 10:29:21 1997  Andrew Cagney  
Wed Jul  9 10:29:21 1997  Andrew Cagney  
        * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
        * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
        signed8, unsigned8 et.al. types.
        signed8, unsigned8 et.al. types.
        * interp.c (SUB_REG_FETCH): Handle both little and big endian
        * interp.c (SUB_REG_FETCH): Handle both little and big endian
        hosts when selecting subreg.
        hosts when selecting subreg.
Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
        * interp.c (sim_engine_run): Reset the ZERO register to zero
        * interp.c (sim_engine_run): Reset the ZERO register to zero
        regardless of FEATURE_WARN_ZERO.
        regardless of FEATURE_WARN_ZERO.
        * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
        * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
Wed Jun  4 10:43:14 1997  Andrew Cagney  
Wed Jun  4 10:43:14 1997  Andrew Cagney  
        * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
        * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
        (SignalException): For BreakPoints ignore any mode bits and just
        (SignalException): For BreakPoints ignore any mode bits and just
        save the PC.
        save the PC.
        (SignalException): Always set the CAUSE register.
        (SignalException): Always set the CAUSE register.
Tue Jun  3 05:00:33 1997  Andrew Cagney  
Tue Jun  3 05:00:33 1997  Andrew Cagney  
        * interp.c (SignalException): Clear the simDELAYSLOT flag when an
        * interp.c (SignalException): Clear the simDELAYSLOT flag when an
        exception has been taken.
        exception has been taken.
        * interp.c: Implement the ERET and mt/f sr instructions.
        * interp.c: Implement the ERET and mt/f sr instructions.
Sat May 31 00:44:16 1997  Andrew Cagney  
Sat May 31 00:44:16 1997  Andrew Cagney  
        * interp.c (SignalException): Don't bother restarting an
        * interp.c (SignalException): Don't bother restarting an
        interrupt.
        interrupt.
Fri May 30 23:41:48 1997  Andrew Cagney  
Fri May 30 23:41:48 1997  Andrew Cagney  
        * interp.c (SignalException): Really take an interrupt.
        * interp.c (SignalException): Really take an interrupt.
        (interrupt_event): Only deliver interrupts when enabled.
        (interrupt_event): Only deliver interrupts when enabled.
Tue May 27 20:08:06 1997  Andrew Cagney  
Tue May 27 20:08:06 1997  Andrew Cagney  
        * interp.c (sim_info): Only print info when verbose.
        * interp.c (sim_info): Only print info when verbose.
        (sim_info) Use sim_io_printf for output.
        (sim_info) Use sim_io_printf for output.
Tue May 27 14:22:23 1997  Andrew Cagney  
Tue May 27 14:22:23 1997  Andrew Cagney  
        * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
        * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
        mips architectures.
        mips architectures.
Tue May 27 14:22:23 1997  Andrew Cagney  
Tue May 27 14:22:23 1997  Andrew Cagney  
        * interp.c (sim_do_command): Check for common commands if a
        * interp.c (sim_do_command): Check for common commands if a
        simulator specific command fails.
        simulator specific command fails.
Thu May 22 09:32:03 1997  Gavin Koch  
Thu May 22 09:32:03 1997  Gavin Koch  
        * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
        * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
        and simBE when DEBUG is defined.
        and simBE when DEBUG is defined.
Wed May 21 09:08:10 1997  Andrew Cagney  
Wed May 21 09:08:10 1997  Andrew Cagney  
        * interp.c (interrupt_event): New function.  Pass exception event
        * interp.c (interrupt_event): New function.  Pass exception event
        onto exception handler.
        onto exception handler.
        * configure.in: Check for stdlib.h.
        * configure.in: Check for stdlib.h.
        * configure: Regenerate.
        * configure: Regenerate.
        * gencode.c (build_instruction): Add UNUSED attribute to tempS
        * gencode.c (build_instruction): Add UNUSED attribute to tempS
        variable declaration.
        variable declaration.
        (build_instruction): Initialize memval1.
        (build_instruction): Initialize memval1.
        (build_instruction): Add UNUSED attribute to byte, bigend,
        (build_instruction): Add UNUSED attribute to byte, bigend,
        reverse.
        reverse.
        (build_operands): Ditto.
        (build_operands): Ditto.
        * interp.c: Fix GCC warnings.
        * interp.c: Fix GCC warnings.
        (sim_get_quit_code): Delete.
        (sim_get_quit_code): Delete.
        * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
        * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
        * Makefile.in: Ditto.
        * Makefile.in: Ditto.
        * configure: Re-generate.
        * configure: Re-generate.
        * Makefile.in (SIM_OBJS): Add sim-watch.o module.
        * Makefile.in (SIM_OBJS): Add sim-watch.o module.
Tue May 20 15:08:56 1997  Andrew Cagney  
Tue May 20 15:08:56 1997  Andrew Cagney  
        * interp.c (mips_option_handler): New function parse argumes using
        * interp.c (mips_option_handler): New function parse argumes using
        sim-options.
        sim-options.
        (myname): Replace with STATE_MY_NAME.
        (myname): Replace with STATE_MY_NAME.
        (sim_open): Delete check for host endianness - performed by
        (sim_open): Delete check for host endianness - performed by
        sim_config.
        sim_config.
        (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
        (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
        (sim_open): Move much of the initialization from here.
        (sim_open): Move much of the initialization from here.
        (sim_load): To here.  After the image has been loaded and
        (sim_load): To here.  After the image has been loaded and
        endianness set.
        endianness set.
        (sim_open): Move ColdReset from here.
        (sim_open): Move ColdReset from here.
        (sim_create_inferior): To here.
        (sim_create_inferior): To here.
        (sim_open): Make FP check less dependant on host endianness.
        (sim_open): Make FP check less dependant on host endianness.
        * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
        * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
        run.
        run.
        * interp.c (sim_set_callbacks): Delete.
        * interp.c (sim_set_callbacks): Delete.
        * interp.c (membank, membank_base, membank_size): Replace with
        * interp.c (membank, membank_base, membank_size): Replace with
        STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
        STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
        (sim_open): Remove call to callback->init. gdb/run do this.
        (sim_open): Remove call to callback->init. gdb/run do this.
        * interp.c: Update
        * interp.c: Update
        * sim-main.h (SIM_HAVE_FLATMEM): Define.
        * sim-main.h (SIM_HAVE_FLATMEM): Define.
        * interp.c (big_endian_p): Delete, replaced by
        * interp.c (big_endian_p): Delete, replaced by
        current_target_byte_order.
        current_target_byte_order.
Tue May 20 13:55:00 1997  Andrew Cagney  
Tue May 20 13:55:00 1997  Andrew Cagney  
        * interp.c (host_read_long, host_read_word, host_swap_word,
        * interp.c (host_read_long, host_read_word, host_swap_word,
        host_swap_long): Delete. Using common sim-endian.
        host_swap_long): Delete. Using common sim-endian.
        (sim_fetch_register, sim_store_register): Use H2T.
        (sim_fetch_register, sim_store_register): Use H2T.
        (pipeline_ticks): Delete.  Handled by sim-events.
        (pipeline_ticks): Delete.  Handled by sim-events.
        (sim_info): Update.
        (sim_info): Update.
        (sim_engine_run): Update.
        (sim_engine_run): Update.
Tue May 20 13:42:03 1997  Andrew Cagney  
Tue May 20 13:42:03 1997  Andrew Cagney  
        * interp.c (sim_stop_reason): Move code determining simEXCEPTION
        * interp.c (sim_stop_reason): Move code determining simEXCEPTION
        reason from here.
        reason from here.
        (SignalException): To here. Signal using sim_engine_halt.
        (SignalException): To here. Signal using sim_engine_halt.
        (sim_stop_reason): Delete, moved to common.
        (sim_stop_reason): Delete, moved to common.
Tue May 20 10:19:48 1997  Andrew Cagney  
Tue May 20 10:19:48 1997  Andrew Cagney  
        * interp.c (sim_open): Add callback argument.
        * interp.c (sim_open): Add callback argument.
        (sim_set_callbacks): Delete SIM_DESC argument.
        (sim_set_callbacks): Delete SIM_DESC argument.
        (sim_size): Ditto.
        (sim_size): Ditto.
Mon May 19 18:20:38 1997  Andrew Cagney  
Mon May 19 18:20:38 1997  Andrew Cagney  
        * Makefile.in (SIM_OBJS): Add common modules.
        * Makefile.in (SIM_OBJS): Add common modules.
        * interp.c (sim_set_callbacks): Also set SD callback.
        * interp.c (sim_set_callbacks): Also set SD callback.
        (set_endianness, xfer_*, swap_*): Delete.
        (set_endianness, xfer_*, swap_*): Delete.
        (host_read_word, host_read_long, host_swap_word, host_swap_long):
        (host_read_word, host_read_long, host_swap_word, host_swap_long):
        Change to functions using sim-endian macros.
        Change to functions using sim-endian macros.
        (control_c, sim_stop): Delete, use common version.
        (control_c, sim_stop): Delete, use common version.
        (simulate): Convert into.
        (simulate): Convert into.
        (sim_engine_run): This function.
        (sim_engine_run): This function.
        (sim_resume): Delete.
        (sim_resume): Delete.
        * interp.c (simulation): New variable - the simulator object.
        * interp.c (simulation): New variable - the simulator object.
        (sim_kind): Delete global - merged into simulation.
        (sim_kind): Delete global - merged into simulation.
        (sim_load): Cleanup.  Move PC assignment from here.
        (sim_load): Cleanup.  Move PC assignment from here.
        (sim_create_inferior): To here.
        (sim_create_inferior): To here.
        * sim-main.h: New file.
        * sim-main.h: New file.
        * interp.c (sim-main.h): Include.
        * interp.c (sim-main.h): Include.
Thu Apr 24 00:39:51 1997  Doug Evans  
Thu Apr 24 00:39:51 1997  Doug Evans  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Apr 23 17:32:19 1997  Doug Evans  
Wed Apr 23 17:32:19 1997  Doug Evans  
        * tconfig.in (SIM_HAVE_BIENDIAN): Define.
        * tconfig.in (SIM_HAVE_BIENDIAN): Define.
Mon Apr 21 17:16:13 1997  Gavin Koch  
Mon Apr 21 17:16:13 1997  Gavin Koch  
        * gencode.c (build_instruction): DIV instructions: check
        * gencode.c (build_instruction): DIV instructions: check
        for division by zero and integer overflow before using
        for division by zero and integer overflow before using
        host's division operation.
        host's division operation.
Thu Apr 17 03:18:14 1997  Doug Evans  
Thu Apr 17 03:18:14 1997  Doug Evans  
        * Makefile.in (SIM_OBJS): Add sim-load.o.
        * Makefile.in (SIM_OBJS): Add sim-load.o.
        * interp.c: #include bfd.h.
        * interp.c: #include bfd.h.
        (target_byte_order): Delete.
        (target_byte_order): Delete.
        (sim_kind, myname, big_endian_p): New static locals.
        (sim_kind, myname, big_endian_p): New static locals.
        (sim_open): Set sim_kind, myname.  Move call to set_endianness to
        (sim_open): Set sim_kind, myname.  Move call to set_endianness to
        after argument parsing.  Recognize -E arg, set endianness accordingly.
        after argument parsing.  Recognize -E arg, set endianness accordingly.
        (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
        (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
        load file into simulator.  Set PC from bfd.
        load file into simulator.  Set PC from bfd.
        (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
        (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
        (set_endianness): Use big_endian_p instead of target_byte_order.
        (set_endianness): Use big_endian_p instead of target_byte_order.
Wed Apr 16 17:55:37 1997  Andrew Cagney  
Wed Apr 16 17:55:37 1997  Andrew Cagney  
        * interp.c (sim_size): Delete prototype - conflicts with
        * interp.c (sim_size): Delete prototype - conflicts with
        definition in remote-sim.h.  Correct definition.
        definition in remote-sim.h.  Correct definition.
Mon Apr  7 15:45:02 1997  Andrew Cagney  
Mon Apr  7 15:45:02 1997  Andrew Cagney  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * config.in: Ditto.
        * config.in: Ditto.
Wed Apr  2 15:06:28 1997  Doug Evans  
Wed Apr  2 15:06:28 1997  Doug Evans  
        * interp.c (sim_open): New arg `kind'.
        * interp.c (sim_open): New arg `kind'.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Apr  2 14:34:19 1997 Andrew Cagney 
Wed Apr  2 14:34:19 1997 Andrew Cagney 
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Tue Mar 25 11:38:22 1997  Doug Evans  
Tue Mar 25 11:38:22 1997  Doug Evans  
        * interp.c (sim_open): Set optind to 0 before calling getopt.
        * interp.c (sim_open): Set optind to 0 before calling getopt.
Wed Mar 19 01:14:00 1997  Andrew Cagney  
Wed Mar 19 01:14:00 1997  Andrew Cagney  
        * configure: Regenerated to track ../common/aclocal.m4 changes.
        * configure: Regenerated to track ../common/aclocal.m4 changes.
Mon Mar 17 10:52:59 1997  Gavin Koch  
Mon Mar 17 10:52:59 1997  Gavin Koch  
        * interp.c : Replace uses of pr_addr with pr_uword64
        * interp.c : Replace uses of pr_addr with pr_uword64
        where the bit length is always 64 independent of SIM_ADDR.
        where the bit length is always 64 independent of SIM_ADDR.
        (pr_uword64) : added.
        (pr_uword64) : added.
Mon Mar 17 15:10:07 1997  Andrew Cagney  
Mon Mar 17 15:10:07 1997  Andrew Cagney  
        * configure: Re-generate.
        * configure: Re-generate.
Fri Mar 14 10:34:11 1997  Michael Meissner  
Fri Mar 14 10:34:11 1997  Michael Meissner  
        * configure: Regenerate to track ../common/aclocal.m4 changes.
        * configure: Regenerate to track ../common/aclocal.m4 changes.
Thu Mar 13 12:51:36 1997  Doug Evans  
Thu Mar 13 12:51:36 1997  Doug Evans  
        * interp.c (sim_open): New SIM_DESC result.  Argument is now
        * interp.c (sim_open): New SIM_DESC result.  Argument is now
        in argv form.
        in argv form.
        (other sim_*): New SIM_DESC argument.
        (other sim_*): New SIM_DESC argument.
Mon Feb 24 22:47:14 1997  Dawn Perchik  
Mon Feb 24 22:47:14 1997  Dawn Perchik  
        * interp.c: Fix printing of addresses for non-64-bit targets.
        * interp.c: Fix printing of addresses for non-64-bit targets.
        (pr_addr): Add function to print address based on size.
        (pr_addr): Add function to print address based on size.
Wed Feb 19 14:42:09 1997  Mark Alexander  
Wed Feb 19 14:42:09 1997  Mark Alexander  
        * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
        * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
Thu Feb 13 14:08:30 1997  Ian Lance Taylor  
Thu Feb 13 14:08:30 1997  Ian Lance Taylor  
        * gencode.c (build_mips16_operands): Correct computation of base
        * gencode.c (build_mips16_operands): Correct computation of base
        address for extended PC relative instruction.
        address for extended PC relative instruction.
Thu Feb  6 17:16:15 1997  Ian Lance Taylor  
Thu Feb  6 17:16:15 1997  Ian Lance Taylor  
        * interp.c (mips16_entry): Add support for floating point cases.
        * interp.c (mips16_entry): Add support for floating point cases.
        (SignalException): Pass floating point cases to mips16_entry.
        (SignalException): Pass floating point cases to mips16_entry.
        (ValueFPR): Don't restrict fmt_single and fmt_word to even
        (ValueFPR): Don't restrict fmt_single and fmt_word to even
        registers.
        registers.
        (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
        (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
        or fmt_word.
        or fmt_word.
        (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
        (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
        and then set the state to fmt_uninterpreted.
        and then set the state to fmt_uninterpreted.
        (COP_SW): Temporarily set the state to fmt_word while calling
        (COP_SW): Temporarily set the state to fmt_word while calling
        ValueFPR.
        ValueFPR.
Tue Feb  4 16:48:25 1997  Ian Lance Taylor  
Tue Feb  4 16:48:25 1997  Ian Lance Taylor  
        * gencode.c (build_instruction): The high order may be set in the
        * gencode.c (build_instruction): The high order may be set in the
        comparison flags at any ISA level, not just ISA 4.
        comparison flags at any ISA level, not just ISA 4.
Tue Feb  4 13:33:30 1997  Doug Evans  
Tue Feb  4 13:33:30 1997  Doug Evans  
        * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
        * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
        COMMON_{PRE,POST}_CONFIG_FRAG instead.
        COMMON_{PRE,POST}_CONFIG_FRAG instead.
        * configure.in: sinclude ../common/aclocal.m4.
        * configure.in: sinclude ../common/aclocal.m4.
        * configure: Regenerated.
        * configure: Regenerated.
Fri Jan 31 11:11:45 1997  Ian Lance Taylor  
Fri Jan 31 11:11:45 1997  Ian Lance Taylor  
        * configure: Rebuild after change to aclocal.m4.
        * configure: Rebuild after change to aclocal.m4.
Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
        * configure configure.in Makefile.in:  Update to new configure
        * configure configure.in Makefile.in:  Update to new configure
        scheme which is more compatible with WinGDB builds.
        scheme which is more compatible with WinGDB builds.
        * configure.in:  Improve comment on how to run autoconf.
        * configure.in:  Improve comment on how to run autoconf.
        * configure:  Re-run autoconf to get new ../common/aclocal.m4.
        * configure:  Re-run autoconf to get new ../common/aclocal.m4.
        * Makefile.in:  Use autoconf substitution to install common
        * Makefile.in:  Use autoconf substitution to install common
        makefile fragment.
        makefile fragment.
Wed Jan  8 12:39:03 1997  Jim Wilson  
Wed Jan  8 12:39:03 1997  Jim Wilson  
        * gencode.c (build_instruction): Use BigEndianCPU instead of
        * gencode.c (build_instruction): Use BigEndianCPU instead of
        ByteSwapMem.
        ByteSwapMem.
Thu Jan 02 22:23:04 1997  Mark Alexander  
Thu Jan 02 22:23:04 1997  Mark Alexander  
        * interp.c (sim_monitor): Make output to stdout visible in
        * interp.c (sim_monitor): Make output to stdout visible in
        wingdb's I/O log window.
        wingdb's I/O log window.
Tue Dec 31 07:04:00 1996  Mark Alexander  
Tue Dec 31 07:04:00 1996  Mark Alexander  
        * support.h: Undo previous change to SIGTRAP
        * support.h: Undo previous change to SIGTRAP
        and SIGQUIT values.
        and SIGQUIT values.
Mon Dec 30 17:36:06 1996  Ian Lance Taylor  
Mon Dec 30 17:36:06 1996  Ian Lance Taylor  
        * interp.c (store_word, load_word): New static functions.
        * interp.c (store_word, load_word): New static functions.
        (mips16_entry): New static function.
        (mips16_entry): New static function.
        (SignalException): Look for mips16 entry and exit instructions.
        (SignalException): Look for mips16 entry and exit instructions.
        (simulate): Use the correct index when setting fpr_state after
        (simulate): Use the correct index when setting fpr_state after
        doing a pending move.
        doing a pending move.
Sun Dec 29 09:37:18 1996  Mark Alexander  
Sun Dec 29 09:37:18 1996  Mark Alexander  
        * interp.c: Fix byte-swapping code throughout to work on
        * interp.c: Fix byte-swapping code throughout to work on
        both little- and big-endian hosts.
        both little- and big-endian hosts.
Sun Dec 29 09:18:32 1996  Mark Alexander  
Sun Dec 29 09:18:32 1996  Mark Alexander  
        * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
        * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
        with gdb/config/i386/xm-windows.h.
        with gdb/config/i386/xm-windows.h.
Fri Dec 27 22:48:51 1996  Mark Alexander  
Fri Dec 27 22:48:51 1996  Mark Alexander  
        * gencode.c (build_instruction): Work around MSVC++ code gen bug
        * gencode.c (build_instruction): Work around MSVC++ code gen bug
        that messes up arithmetic shifts.
        that messes up arithmetic shifts.
Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
        * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
        * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
        SIGTRAP and SIGQUIT for _WIN32.
        SIGTRAP and SIGQUIT for _WIN32.
Thu Dec 19 14:07:27 1996  Ian Lance Taylor  
Thu Dec 19 14:07:27 1996  Ian Lance Taylor  
        * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
        * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
        force a 64 bit multiplication.
        force a 64 bit multiplication.
        (build_instruction) [OR]: In mips16 mode, don't do anything if the
        (build_instruction) [OR]: In mips16 mode, don't do anything if the
        destination register is 0, since that is the default mips16 nop
        destination register is 0, since that is the default mips16 nop
        instruction.
        instruction.
Mon Dec 16 14:59:38 1996  Ian Lance Taylor  
Mon Dec 16 14:59:38 1996  Ian Lance Taylor  
        * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
        * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
        (build_endian_shift): Don't check proc64.
        (build_endian_shift): Don't check proc64.
        (build_instruction): Always set memval to uword64.  Cast op2 to
        (build_instruction): Always set memval to uword64.  Cast op2 to
        uword64 when shifting it left in memory instructions.  Always use
        uword64 when shifting it left in memory instructions.  Always use
        the same code for stores--don't special case proc64.
        the same code for stores--don't special case proc64.
        * gencode.c (build_mips16_operands): Fix base PC value for PC
        * gencode.c (build_mips16_operands): Fix base PC value for PC
        relative operands.
        relative operands.
        (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
        (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
        jal instruction.
        jal instruction.
        * interp.c (simJALDELAYSLOT): Define.
        * interp.c (simJALDELAYSLOT): Define.
        (JALDELAYSLOT): Define.
        (JALDELAYSLOT): Define.
        (INDELAYSLOT, INJALDELAYSLOT): Define.
        (INDELAYSLOT, INJALDELAYSLOT): Define.
        (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
        (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
        * interp.c (sim_open): add flush_cache as a PMON routine
        * interp.c (sim_open): add flush_cache as a PMON routine
        (sim_monitor): handle flush_cache by ignoring it
        (sim_monitor): handle flush_cache by ignoring it
Wed Dec 11 13:53:51 1996  Jim Wilson  
Wed Dec 11 13:53:51 1996  Jim Wilson  
        * gencode.c (build_instruction): Use !ByteSwapMem instead of
        * gencode.c (build_instruction): Use !ByteSwapMem instead of
        BigEndianMem.
        BigEndianMem.
        * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
        * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
        (BigEndianMem): Rename to ByteSwapMem and change sense.
        (BigEndianMem): Rename to ByteSwapMem and change sense.
        (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
        (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
        BigEndianMem references to !ByteSwapMem.
        BigEndianMem references to !ByteSwapMem.
        (set_endianness): New function, with prototype.
        (set_endianness): New function, with prototype.
        (sim_open): Call set_endianness.
        (sim_open): Call set_endianness.
        (sim_info): Use simBE instead of BigEndianMem.
        (sim_info): Use simBE instead of BigEndianMem.
        (xfer_direct_word, xfer_direct_long, swap_direct_word,
        (xfer_direct_word, xfer_direct_long, swap_direct_word,
        swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
        swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
        xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
        xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
        ifdefs, keeping the prototype declaration.
        ifdefs, keeping the prototype declaration.
        (swap_word): Rewrite correctly.
        (swap_word): Rewrite correctly.
        (ColdReset): Delete references to CONFIG.  Delete endianness related
        (ColdReset): Delete references to CONFIG.  Delete endianness related
        code; moved to set_endianness.
        code; moved to set_endianness.
Tue Dec 10 11:32:04 1996  Jim Wilson  
Tue Dec 10 11:32:04 1996  Jim Wilson  
        * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
        * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
        * interp.c (CHECKHILO): Define away.
        * interp.c (CHECKHILO): Define away.
        (simSIGINT): New macro.
        (simSIGINT): New macro.
        (membank_size): Increase from 1MB to 2MB.
        (membank_size): Increase from 1MB to 2MB.
        (control_c): New function.
        (control_c): New function.
        (sim_resume): Rename parameter signal to signal_number.  Add local
        (sim_resume): Rename parameter signal to signal_number.  Add local
        variable prev.  Call signal before and after simulate.
        variable prev.  Call signal before and after simulate.
        (sim_stop_reason): Add simSIGINT support.
        (sim_stop_reason): Add simSIGINT support.
        (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
        (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
        functions always.
        functions always.
        (sim_warning): Delete call to SignalException.  Do call printf_filtered
        (sim_warning): Delete call to SignalException.  Do call printf_filtered
        if logfh is NULL.
        if logfh is NULL.
        (AddressTranslation): Add #ifdef DEBUG around debugging message and
        (AddressTranslation): Add #ifdef DEBUG around debugging message and
        a call to sim_warning.
        a call to sim_warning.
Wed Nov 27 11:53:50 1996  Ian Lance Taylor  
Wed Nov 27 11:53:50 1996  Ian Lance Taylor  
        * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
        * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
        16 bit instructions.
        16 bit instructions.
Tue Nov 26 11:53:12 1996  Ian Lance Taylor  
Tue Nov 26 11:53:12 1996  Ian Lance Taylor  
        Add support for mips16 (16 bit MIPS implementation):
        Add support for mips16 (16 bit MIPS implementation):
        * gencode.c (inst_type): Add mips16 instruction encoding types.
        * gencode.c (inst_type): Add mips16 instruction encoding types.
        (GETDATASIZEINSN): Define.
        (GETDATASIZEINSN): Define.
        (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
        (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
        jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
        jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
        mtlo.
        mtlo.
        (MIPS16_DECODE): New table, for mips16 instructions.
        (MIPS16_DECODE): New table, for mips16 instructions.
        (bitmap_val): New static function.
        (bitmap_val): New static function.
        (struct mips16_op): Define.
        (struct mips16_op): Define.
        (mips16_op_table): New table, for mips16 operands.
        (mips16_op_table): New table, for mips16 operands.
        (build_mips16_operands): New static function.
        (build_mips16_operands): New static function.
        (process_instructions): If PC is odd, decode a mips16
        (process_instructions): If PC is odd, decode a mips16
        instruction.  Break out instruction handling into new
        instruction.  Break out instruction handling into new
        build_instruction function.
        build_instruction function.
        (build_instruction): New static function, broken out of
        (build_instruction): New static function, broken out of
        process_instructions.  Check modifiers rather than flags for SHIFT
        process_instructions.  Check modifiers rather than flags for SHIFT
        bit count and m[ft]{hi,lo} direction.
        bit count and m[ft]{hi,lo} direction.
        (usage): Pass program name to fprintf.
        (usage): Pass program name to fprintf.
        (main): Remove unused variable this_option_optind.  Change
        (main): Remove unused variable this_option_optind.  Change
        ``*loptarg++'' to ``loptarg++''.
        ``*loptarg++'' to ``loptarg++''.
        (my_strtoul): Parenthesize && within ||.
        (my_strtoul): Parenthesize && within ||.
        * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
        * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
        (simulate): If PC is odd, fetch a 16 bit instruction, and
        (simulate): If PC is odd, fetch a 16 bit instruction, and
        increment PC by 2 rather than 4.
        increment PC by 2 rather than 4.
        * configure.in: Add case for mips16*-*-*.
        * configure.in: Add case for mips16*-*-*.
        * configure: Rebuild.
        * configure: Rebuild.
Fri Nov 22 08:49:36 1996  Mark Alexander  
Fri Nov 22 08:49:36 1996  Mark Alexander  
        * interp.c: Allow -t to enable tracing in standalone simulator.
        * interp.c: Allow -t to enable tracing in standalone simulator.
        Fix garbage output in trace file and error messages.
        Fix garbage output in trace file and error messages.
Wed Nov 20 01:54:37 1996  Doug Evans  
Wed Nov 20 01:54:37 1996  Doug Evans  
        * Makefile.in: Delete stuff moved to ../common/Make-common.in.
        * Makefile.in: Delete stuff moved to ../common/Make-common.in.
        (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
        (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
        * configure.in: Simplify using macros in ../common/aclocal.m4.
        * configure.in: Simplify using macros in ../common/aclocal.m4.
        * configure: Regenerated.
        * configure: Regenerated.
        * tconfig.in: New file.
        * tconfig.in: New file.
Tue Nov 12 13:34:00 1996  Dawn Perchik  
Tue Nov 12 13:34:00 1996  Dawn Perchik  
        * interp.c: Fix bugs in 64-bit port.
        * interp.c: Fix bugs in 64-bit port.
        Use ansi function declarations for msvc compiler.
        Use ansi function declarations for msvc compiler.
        Initialize and test file pointer in trace code.
        Initialize and test file pointer in trace code.
        Prevent duplicate definition of LAST_EMED_REGNUM.
        Prevent duplicate definition of LAST_EMED_REGNUM.
Tue Oct 15 11:07:06 1996  Mark Alexander  
Tue Oct 15 11:07:06 1996  Mark Alexander  
        * interp.c (xfer_big_long): Prevent unwanted sign extension.
        * interp.c (xfer_big_long): Prevent unwanted sign extension.
Thu Sep 26 17:35:00 1996  James G. Smith  
Thu Sep 26 17:35:00 1996  James G. Smith  
        * interp.c (SignalException): Check for explicit terminating
        * interp.c (SignalException): Check for explicit terminating
        breakpoint value.
        breakpoint value.
        * gencode.c: Pass instruction value through SignalException()
        * gencode.c: Pass instruction value through SignalException()
        calls for Trap, Breakpoint and Syscall.
        calls for Trap, Breakpoint and Syscall.
Thu Sep 26 11:35:17 1996  James G. Smith  
Thu Sep 26 11:35:17 1996  James G. Smith  
        * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
        * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
        only used on those hosts that provide it.
        only used on those hosts that provide it.
        * configure.in: Add sqrt() to list of functions to be checked for.
        * configure.in: Add sqrt() to list of functions to be checked for.
        * config.in: Re-generated.
        * config.in: Re-generated.
        * configure: Re-generated.
        * configure: Re-generated.
Fri Sep 20 15:47:12 1996  Ian Lance Taylor  
Fri Sep 20 15:47:12 1996  Ian Lance Taylor  
        * gencode.c (process_instructions): Call build_endian_shift when
        * gencode.c (process_instructions): Call build_endian_shift when
        expanding STORE RIGHT, to fix swr.
        expanding STORE RIGHT, to fix swr.
        * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
        * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
        clear the high bits.
        clear the high bits.
        * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
        * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
        Fix float to int conversions to produce signed values.
        Fix float to int conversions to produce signed values.
Thu Sep 19 15:34:17 1996  Ian Lance Taylor  
Thu Sep 19 15:34:17 1996  Ian Lance Taylor  
        * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
        * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
        (process_instructions): Correct handling of nor instruction.
        (process_instructions): Correct handling of nor instruction.
        Correct shift count for 32 bit shift instructions. Correct sign
        Correct shift count for 32 bit shift instructions. Correct sign
        extension for arithmetic shifts to not shift the number of bits in
        extension for arithmetic shifts to not shift the number of bits in
        the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
        the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
        unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
        unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
        Fix madd.
        Fix madd.
        * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
        * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
        It's OK to have a mult follow a mult.  What's not OK is to have a
        It's OK to have a mult follow a mult.  What's not OK is to have a
        mult follow an mfhi.
        mult follow an mfhi.
        (Convert): Comment out incorrect rounding code.
        (Convert): Comment out incorrect rounding code.
Mon Sep 16 11:38:16 1996  James G. Smith  
Mon Sep 16 11:38:16 1996  James G. Smith  
        * interp.c (sim_monitor): Improved monitor printf
        * interp.c (sim_monitor): Improved monitor printf
        simulation. Tidied up simulator warnings, and added "--log" option
        simulation. Tidied up simulator warnings, and added "--log" option
        for directing warning message output.
        for directing warning message output.
        * gencode.c: Use sim_warning() rather than WARNING macro.
        * gencode.c: Use sim_warning() rather than WARNING macro.
Thu Aug 22 15:03:12 1996  Ian Lance Taylor  
Thu Aug 22 15:03:12 1996  Ian Lance Taylor  
        * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
        * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
        getopt1.o, rather than on gencode.c.  Link objects together.
        getopt1.o, rather than on gencode.c.  Link objects together.
        Don't link against -liberty.
        Don't link against -liberty.
        (gencode.o, getopt.o, getopt1.o): New targets.
        (gencode.o, getopt.o, getopt1.o): New targets.
        * gencode.c: Include  and "ansidecl.h".
        * gencode.c: Include  and "ansidecl.h".
        (AND): Undefine after including "ansidecl.h".
        (AND): Undefine after including "ansidecl.h".
        (ULONG_MAX): Define if not defined.
        (ULONG_MAX): Define if not defined.
        (OP_*): Don't define macros; now defined in opcode/mips.h.
        (OP_*): Don't define macros; now defined in opcode/mips.h.
        (main): Call my_strtoul rather than strtoul.
        (main): Call my_strtoul rather than strtoul.
        (my_strtoul): New static function.
        (my_strtoul): New static function.
Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
        * gencode.c (process_instructions):  Generate word64 and uword64
        * gencode.c (process_instructions):  Generate word64 and uword64
        instead of `long long' and `unsigned long long' data types.
        instead of `long long' and `unsigned long long' data types.
        * interp.c:  #include sysdep.h to get signals, and define default
        * interp.c:  #include sysdep.h to get signals, and define default
        for SIGBUS.
        for SIGBUS.
        * (Convert):  Work around for Visual-C++ compiler bug with type
        * (Convert):  Work around for Visual-C++ compiler bug with type
        conversion.
        conversion.
        * support.h:  Make things compile under Visual-C++ by using
        * support.h:  Make things compile under Visual-C++ by using
        __int64 instead of `long long'.  Change many refs to long long
        __int64 instead of `long long'.  Change many refs to long long
        into word64/uword64 typedefs.
        into word64/uword64 typedefs.
Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
        * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
        * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
        INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
        INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
        (docdir): Removed.
        (docdir): Removed.
        * configure.in (AC_PREREQ): autoconf 2.5 or higher.
        * configure.in (AC_PREREQ): autoconf 2.5 or higher.
        (AC_PROG_INSTALL): Added.
        (AC_PROG_INSTALL): Added.
        (AC_PROG_CC): Moved to before configure.host call.
        (AC_PROG_CC): Moved to before configure.host call.
        * configure: Rebuilt.
        * configure: Rebuilt.
Wed Jun  5 08:28:13 1996  James G. Smith  
Wed Jun  5 08:28:13 1996  James G. Smith  
        * configure.in: Define @SIMCONF@ depending on mips target.
        * configure.in: Define @SIMCONF@ depending on mips target.
        * configure: Rebuild.
        * configure: Rebuild.
        * Makefile.in (run): Add @SIMCONF@ to control simulator
        * Makefile.in (run): Add @SIMCONF@ to control simulator
        construction.
        construction.
        * gencode.c: Change LOADDRMASK to 64bit memory model only.
        * gencode.c: Change LOADDRMASK to 64bit memory model only.
        * interp.c: Remove some debugging, provide more detailed error
        * interp.c: Remove some debugging, provide more detailed error
        messages, update memory accesses to use LOADDRMASK.
        messages, update memory accesses to use LOADDRMASK.
Mon Jun  3 11:55:03 1996  Ian Lance Taylor  
Mon Jun  3 11:55:03 1996  Ian Lance Taylor  
        * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
        * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
        AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
        AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
        stamp-h.
        stamp-h.
        * configure: Rebuild.
        * configure: Rebuild.
        * config.in: New file, generated by autoheader.
        * config.in: New file, generated by autoheader.
        * interp.c: Include "config.h".  Include , ,
        * interp.c: Include "config.h".  Include , ,
        and  if they exist.  Replace #ifdef sun with #ifdef
        and  if they exist.  Replace #ifdef sun with #ifdef
        HAVE_ANINT and HAVE_AINT, as appropriate.
        HAVE_ANINT and HAVE_AINT, as appropriate.
        * Makefile.in (run): Use @LIBS@ rather than -lm.
        * Makefile.in (run): Use @LIBS@ rather than -lm.
        (interp.o): Depend upon config.h.
        (interp.o): Depend upon config.h.
        (Makefile): Just rebuild Makefile.
        (Makefile): Just rebuild Makefile.
        (clean): Remove stamp-h.
        (clean): Remove stamp-h.
        (mostlyclean): Make the same as clean, not as distclean.
        (mostlyclean): Make the same as clean, not as distclean.
        (config.h, stamp-h): New targets.
        (config.h, stamp-h): New targets.
Fri May 10 00:41:17 1996  James G. Smith  
Fri May 10 00:41:17 1996  James G. Smith  
        * interp.c (ColdReset): Fix boolean test. Make all simulator
        * interp.c (ColdReset): Fix boolean test. Make all simulator
        globals static.
        globals static.
Wed May  8 15:12:58 1996  James G. Smith  
Wed May  8 15:12:58 1996  James G. Smith  
        * interp.c (xfer_direct_word, xfer_direct_long,
        * interp.c (xfer_direct_word, xfer_direct_long,
        swap_direct_word, swap_direct_long, xfer_big_word,
        swap_direct_word, swap_direct_long, xfer_big_word,
        xfer_big_long, xfer_little_word, xfer_little_long,
        xfer_big_long, xfer_little_word, xfer_little_long,
        swap_word,swap_long): Added.
        swap_word,swap_long): Added.
        * interp.c (ColdReset): Provide function indirection to
        * interp.c (ColdReset): Provide function indirection to
        host<->simulated_target transfer routines.
        host<->simulated_target transfer routines.
        * interp.c (sim_store_register, sim_fetch_register): Updated to
        * interp.c (sim_store_register, sim_fetch_register): Updated to
        make use of indirected transfer routines.
        make use of indirected transfer routines.
Fri Apr 19 15:48:24 1996  James G. Smith  
Fri Apr 19 15:48:24 1996  James G. Smith  
        * gencode.c (process_instructions): Ensure FP ABS instruction
        * gencode.c (process_instructions): Ensure FP ABS instruction
        recognised.
        recognised.
        * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
        * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
        system call support.
        system call support.
Wed Apr 10 09:51:38 1996  James G. Smith  
Wed Apr 10 09:51:38 1996  James G. Smith  
        * interp.c (sim_do_command): Complain if callback structure not
        * interp.c (sim_do_command): Complain if callback structure not
        initialised.
        initialised.
Thu Mar 28 13:50:51 1996  James G. Smith  
Thu Mar 28 13:50:51 1996  James G. Smith  
        * interp.c (Convert): Provide round-to-nearest and round-to-zero
        * interp.c (Convert): Provide round-to-nearest and round-to-zero
        support for Sun hosts.
        support for Sun hosts.
        * Makefile.in (gencode): Ensure the host compiler and libraries
        * Makefile.in (gencode): Ensure the host compiler and libraries
        used for cross-hosted build.
        used for cross-hosted build.
Wed Mar 27 14:42:12 1996  James G. Smith  
Wed Mar 27 14:42:12 1996  James G. Smith  
        * interp.c, gencode.c: Some more (TODO) tidying.
        * interp.c, gencode.c: Some more (TODO) tidying.
Thu Mar  7 11:19:33 1996  James G. Smith  
Thu Mar  7 11:19:33 1996  James G. Smith  
        * gencode.c, interp.c: Replaced explicit long long references with
        * gencode.c, interp.c: Replaced explicit long long references with
        WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
        WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
        * support.h (SET64LO, SET64HI): Macros added.
        * support.h (SET64LO, SET64HI): Macros added.
Wed Feb 21 12:16:21 1996  Ian Lance Taylor  
Wed Feb 21 12:16:21 1996  Ian Lance Taylor  
        * configure: Regenerate with autoconf 2.7.
        * configure: Regenerate with autoconf 2.7.
Tue Jan 30 08:48:18 1996  Fred Fish  
Tue Jan 30 08:48:18 1996  Fred Fish  
        * interp.c (LoadMemory): Enclose text following #endif in /* */.
        * interp.c (LoadMemory): Enclose text following #endif in /* */.
        * support.h: Remove superfluous "1" from #if.
        * support.h: Remove superfluous "1" from #if.
        * support.h (CHECKSIM): Remove stray 'a' at end of line.
        * support.h (CHECKSIM): Remove stray 'a' at end of line.
Mon Dec  4 11:44:40 1995  Jamie Smith  
Mon Dec  4 11:44:40 1995  Jamie Smith  
        * interp.c (StoreFPR): Control UndefinedResult() call on
        * interp.c (StoreFPR): Control UndefinedResult() call on
        WARN_RESULT manifest.
        WARN_RESULT manifest.
Fri Dec  1 16:37:19 1995  James G. Smith  
Fri Dec  1 16:37:19 1995  James G. Smith  
        * gencode.c: Tidied instruction decoding, and added FP instruction
        * gencode.c: Tidied instruction decoding, and added FP instruction
        support.
        support.
        * interp.c: Added dineroIII, and BSD profiling support. Also
        * interp.c: Added dineroIII, and BSD profiling support. Also
        run-time FP handling.
        run-time FP handling.
Sun Oct 22 00:57:18 1995  James G. Smith  
Sun Oct 22 00:57:18 1995  James G. Smith  
        * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
        * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
        gencode.c, interp.c, support.h: created.
        gencode.c, interp.c, support.h: created.
 
 

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