/* Target-dependent code for Xilinx MicroBlaze.
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/* Target-dependent code for Xilinx MicroBlaze.
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Copyright 2009, 2010 Free Software Foundation, Inc.
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Copyright 2009, 2010 Free Software Foundation, Inc.
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This file is part of GDB.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef MICROBLAZE_TDEP_H
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#ifndef MICROBLAZE_TDEP_H
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#define MICROBLAZE_TDEP_H 1
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#define MICROBLAZE_TDEP_H 1
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/* Microblaze architecture-specific information. */
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/* Microblaze architecture-specific information. */
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struct gdbarch_tdep
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struct gdbarch_tdep
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{
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{
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};
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};
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struct microblaze_frame_cache
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struct microblaze_frame_cache
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{
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{
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/* Base address. */
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/* Base address. */
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CORE_ADDR base;
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CORE_ADDR base;
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CORE_ADDR pc;
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CORE_ADDR pc;
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/* Do we have a frame? */
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/* Do we have a frame? */
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int frameless_p;
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int frameless_p;
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/* Frame size. */
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/* Frame size. */
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int framesize;
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int framesize;
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/* Frame register. */
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/* Frame register. */
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int fp_regnum;
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int fp_regnum;
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/* Offsets to saved registers. */
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/* Offsets to saved registers. */
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int register_offsets[57]; /* Must match MICROBLAZE_NUM_REGS. */
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int register_offsets[57]; /* Must match MICROBLAZE_NUM_REGS. */
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/* Table of saved registers. */
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/* Table of saved registers. */
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struct trad_frame_saved_reg *saved_regs;
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struct trad_frame_saved_reg *saved_regs;
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};
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};
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/* Register numbers. */
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/* Register numbers. */
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enum microblaze_regnum
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enum microblaze_regnum
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{
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{
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MICROBLAZE_R0_REGNUM,
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MICROBLAZE_R0_REGNUM,
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MICROBLAZE_R1_REGNUM, MICROBLAZE_SP_REGNUM = MICROBLAZE_R1_REGNUM,
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MICROBLAZE_R1_REGNUM, MICROBLAZE_SP_REGNUM = MICROBLAZE_R1_REGNUM,
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MICROBLAZE_R2_REGNUM,
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MICROBLAZE_R2_REGNUM,
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MICROBLAZE_R3_REGNUM, MICROBLAZE_RETVAL_REGNUM = MICROBLAZE_R3_REGNUM,
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MICROBLAZE_R3_REGNUM, MICROBLAZE_RETVAL_REGNUM = MICROBLAZE_R3_REGNUM,
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MICROBLAZE_R4_REGNUM,
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MICROBLAZE_R4_REGNUM,
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MICROBLAZE_R5_REGNUM, MICROBLAZE_FIRST_ARGREG = MICROBLAZE_R5_REGNUM,
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MICROBLAZE_R5_REGNUM, MICROBLAZE_FIRST_ARGREG = MICROBLAZE_R5_REGNUM,
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MICROBLAZE_R6_REGNUM,
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MICROBLAZE_R6_REGNUM,
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MICROBLAZE_R7_REGNUM,
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MICROBLAZE_R7_REGNUM,
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MICROBLAZE_R8_REGNUM,
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MICROBLAZE_R8_REGNUM,
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MICROBLAZE_R9_REGNUM,
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MICROBLAZE_R9_REGNUM,
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MICROBLAZE_R10_REGNUM, MICROBLAZE_LAST_ARGREG = MICROBLAZE_R10_REGNUM,
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MICROBLAZE_R10_REGNUM, MICROBLAZE_LAST_ARGREG = MICROBLAZE_R10_REGNUM,
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MICROBLAZE_R11_REGNUM,
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MICROBLAZE_R11_REGNUM,
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MICROBLAZE_R12_REGNUM,
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MICROBLAZE_R12_REGNUM,
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MICROBLAZE_R13_REGNUM,
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MICROBLAZE_R13_REGNUM,
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MICROBLAZE_R14_REGNUM,
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MICROBLAZE_R14_REGNUM,
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MICROBLAZE_R15_REGNUM,
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MICROBLAZE_R15_REGNUM,
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MICROBLAZE_R16_REGNUM,
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MICROBLAZE_R16_REGNUM,
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MICROBLAZE_R17_REGNUM,
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MICROBLAZE_R17_REGNUM,
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MICROBLAZE_R18_REGNUM,
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MICROBLAZE_R18_REGNUM,
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MICROBLAZE_R19_REGNUM,
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MICROBLAZE_R19_REGNUM,
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MICROBLAZE_R20_REGNUM,
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MICROBLAZE_R20_REGNUM,
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MICROBLAZE_R21_REGNUM,
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MICROBLAZE_R21_REGNUM,
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MICROBLAZE_R22_REGNUM,
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MICROBLAZE_R22_REGNUM,
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MICROBLAZE_R23_REGNUM,
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MICROBLAZE_R23_REGNUM,
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MICROBLAZE_R24_REGNUM,
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MICROBLAZE_R24_REGNUM,
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MICROBLAZE_R25_REGNUM,
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MICROBLAZE_R25_REGNUM,
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MICROBLAZE_R26_REGNUM,
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MICROBLAZE_R26_REGNUM,
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MICROBLAZE_R27_REGNUM,
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MICROBLAZE_R27_REGNUM,
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MICROBLAZE_R28_REGNUM,
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MICROBLAZE_R28_REGNUM,
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MICROBLAZE_R29_REGNUM,
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MICROBLAZE_R29_REGNUM,
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MICROBLAZE_R30_REGNUM,
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MICROBLAZE_R30_REGNUM,
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MICROBLAZE_R31_REGNUM,
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MICROBLAZE_R31_REGNUM,
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MICROBLAZE_PC_REGNUM,
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MICROBLAZE_PC_REGNUM,
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MICROBLAZE_MSR_REGNUM,
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MICROBLAZE_MSR_REGNUM,
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MICROBLAZE_EAR_REGNUM,
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MICROBLAZE_EAR_REGNUM,
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MICROBLAZE_ESR_REGNUM,
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MICROBLAZE_ESR_REGNUM,
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MICROBLAZE_FSR_REGNUM,
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MICROBLAZE_FSR_REGNUM,
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MICROBLAZE_BTR_REGNUM,
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MICROBLAZE_BTR_REGNUM,
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MICROBLAZE_PVR0_REGNUM,
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MICROBLAZE_PVR0_REGNUM,
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MICROBLAZE_PVR1_REGNUM,
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MICROBLAZE_PVR1_REGNUM,
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MICROBLAZE_PVR2_REGNUM,
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MICROBLAZE_PVR2_REGNUM,
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MICROBLAZE_PVR3_REGNUM,
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MICROBLAZE_PVR3_REGNUM,
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MICROBLAZE_PVR4_REGNUM,
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MICROBLAZE_PVR4_REGNUM,
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MICROBLAZE_PVR5_REGNUM,
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MICROBLAZE_PVR5_REGNUM,
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MICROBLAZE_PVR6_REGNUM,
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MICROBLAZE_PVR6_REGNUM,
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MICROBLAZE_PVR7_REGNUM,
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MICROBLAZE_PVR7_REGNUM,
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MICROBLAZE_PVR8_REGNUM,
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MICROBLAZE_PVR8_REGNUM,
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MICROBLAZE_PVR9_REGNUM,
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MICROBLAZE_PVR9_REGNUM,
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MICROBLAZE_PVR10_REGNUM,
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MICROBLAZE_PVR10_REGNUM,
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MICROBLAZE_PVR11_REGNUM,
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MICROBLAZE_PVR11_REGNUM,
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MICROBLAZE_REDR_REGNUM,
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MICROBLAZE_REDR_REGNUM,
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MICROBLAZE_RPID_REGNUM,
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MICROBLAZE_RPID_REGNUM,
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MICROBLAZE_RZPR_REGNUM,
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MICROBLAZE_RZPR_REGNUM,
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MICROBLAZE_RTLBX_REGNUM,
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MICROBLAZE_RTLBX_REGNUM,
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MICROBLAZE_RTLBSX_REGNUM,
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MICROBLAZE_RTLBSX_REGNUM,
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MICROBLAZE_RTLBLO_REGNUM,
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MICROBLAZE_RTLBLO_REGNUM,
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MICROBLAZE_RTLBHI_REGNUM
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MICROBLAZE_RTLBHI_REGNUM
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};
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};
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/* All registers are 32 bits. */
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/* All registers are 32 bits. */
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#define MICROBLAZE_REGISTER_SIZE 4
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#define MICROBLAZE_REGISTER_SIZE 4
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/* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used.
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/* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used.
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Only used for native debugging. */
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Only used for native debugging. */
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#define MICROBLAZE_BREAKPOINT {0xb9, 0xcc, 0x00, 0x60}
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#define MICROBLAZE_BREAKPOINT {0xb9, 0xcc, 0x00, 0x60}
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#endif /* microblaze-tdep.h */
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#endif /* microblaze-tdep.h */
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