/* ppc.h -- Header file for PowerPC opcode table
|
/* ppc.h -- Header file for PowerPC opcode table
|
Copyright 1994, 1995, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006,
|
Copyright 1994, 1995, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006,
|
2007, 2008, 2009, 2010 Free Software Foundation, Inc.
|
2007, 2008, 2009, 2010 Free Software Foundation, Inc.
|
Written by Ian Lance Taylor, Cygnus Support
|
Written by Ian Lance Taylor, Cygnus Support
|
|
|
This file is part of GDB, GAS, and the GNU binutils.
|
This file is part of GDB, GAS, and the GNU binutils.
|
|
|
GDB, GAS, and the GNU binutils are free software; you can redistribute
|
GDB, GAS, and the GNU binutils are free software; you can redistribute
|
them and/or modify them under the terms of the GNU General Public
|
them and/or modify them under the terms of the GNU General Public
|
License as published by the Free Software Foundation; either version
|
License as published by the Free Software Foundation; either version
|
1, or (at your option) any later version.
|
1, or (at your option) any later version.
|
|
|
GDB, GAS, and the GNU binutils are distributed in the hope that they
|
GDB, GAS, and the GNU binutils are distributed in the hope that they
|
will be useful, but WITHOUT ANY WARRANTY; without even the implied
|
will be useful, but WITHOUT ANY WARRANTY; without even the implied
|
warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
|
warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
|
the GNU General Public License for more details.
|
the GNU General Public License for more details.
|
|
|
You should have received a copy of the GNU General Public License
|
You should have received a copy of the GNU General Public License
|
along with this file; see the file COPYING. If not, write to the Free
|
along with this file; see the file COPYING. If not, write to the Free
|
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
|
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
|
|
|
#ifndef PPC_H
|
#ifndef PPC_H
|
#define PPC_H
|
#define PPC_H
|
|
|
#include "bfd_stdint.h"
|
#include "bfd_stdint.h"
|
|
|
typedef uint64_t ppc_cpu_t;
|
typedef uint64_t ppc_cpu_t;
|
|
|
/* The opcode table is an array of struct powerpc_opcode. */
|
/* The opcode table is an array of struct powerpc_opcode. */
|
|
|
struct powerpc_opcode
|
struct powerpc_opcode
|
{
|
{
|
/* The opcode name. */
|
/* The opcode name. */
|
const char *name;
|
const char *name;
|
|
|
/* The opcode itself. Those bits which will be filled in with
|
/* The opcode itself. Those bits which will be filled in with
|
operands are zeroes. */
|
operands are zeroes. */
|
unsigned long opcode;
|
unsigned long opcode;
|
|
|
/* The opcode mask. This is used by the disassembler. This is a
|
/* The opcode mask. This is used by the disassembler. This is a
|
mask containing ones indicating those bits which must match the
|
mask containing ones indicating those bits which must match the
|
opcode field, and zeroes indicating those bits which need not
|
opcode field, and zeroes indicating those bits which need not
|
match (and are presumably filled in by operands). */
|
match (and are presumably filled in by operands). */
|
unsigned long mask;
|
unsigned long mask;
|
|
|
/* One bit flags for the opcode. These are used to indicate which
|
/* One bit flags for the opcode. These are used to indicate which
|
specific processors support the instructions. The defined values
|
specific processors support the instructions. The defined values
|
are listed below. */
|
are listed below. */
|
ppc_cpu_t flags;
|
ppc_cpu_t flags;
|
|
|
/* One bit flags for the opcode. These are used to indicate which
|
/* One bit flags for the opcode. These are used to indicate which
|
specific processors no longer support the instructions. The defined
|
specific processors no longer support the instructions. The defined
|
values are listed below. */
|
values are listed below. */
|
ppc_cpu_t deprecated;
|
ppc_cpu_t deprecated;
|
|
|
/* An array of operand codes. Each code is an index into the
|
/* An array of operand codes. Each code is an index into the
|
operand table. They appear in the order which the operands must
|
operand table. They appear in the order which the operands must
|
appear in assembly code, and are terminated by a zero. */
|
appear in assembly code, and are terminated by a zero. */
|
unsigned char operands[8];
|
unsigned char operands[8];
|
};
|
};
|
|
|
/* The table itself is sorted by major opcode number, and is otherwise
|
/* The table itself is sorted by major opcode number, and is otherwise
|
in the order in which the disassembler should consider
|
in the order in which the disassembler should consider
|
instructions. */
|
instructions. */
|
extern const struct powerpc_opcode powerpc_opcodes[];
|
extern const struct powerpc_opcode powerpc_opcodes[];
|
extern const int powerpc_num_opcodes;
|
extern const int powerpc_num_opcodes;
|
|
|
/* Values defined for the flags field of a struct powerpc_opcode. */
|
/* Values defined for the flags field of a struct powerpc_opcode. */
|
|
|
/* Opcode is defined for the PowerPC architecture. */
|
/* Opcode is defined for the PowerPC architecture. */
|
#define PPC_OPCODE_PPC 1
|
#define PPC_OPCODE_PPC 1
|
|
|
/* Opcode is defined for the POWER (RS/6000) architecture. */
|
/* Opcode is defined for the POWER (RS/6000) architecture. */
|
#define PPC_OPCODE_POWER 2
|
#define PPC_OPCODE_POWER 2
|
|
|
/* Opcode is defined for the POWER2 (Rios 2) architecture. */
|
/* Opcode is defined for the POWER2 (Rios 2) architecture. */
|
#define PPC_OPCODE_POWER2 4
|
#define PPC_OPCODE_POWER2 4
|
|
|
/* Opcode is only defined on 32 bit architectures. */
|
/* Opcode is only defined on 32 bit architectures. */
|
#define PPC_OPCODE_32 8
|
#define PPC_OPCODE_32 8
|
|
|
/* Opcode is only defined on 64 bit architectures. */
|
/* Opcode is only defined on 64 bit architectures. */
|
#define PPC_OPCODE_64 0x10
|
#define PPC_OPCODE_64 0x10
|
|
|
/* Opcode is supported by the Motorola PowerPC 601 processor. The 601
|
/* Opcode is supported by the Motorola PowerPC 601 processor. The 601
|
is assumed to support all PowerPC (PPC_OPCODE_PPC) instructions,
|
is assumed to support all PowerPC (PPC_OPCODE_PPC) instructions,
|
but it also supports many additional POWER instructions. */
|
but it also supports many additional POWER instructions. */
|
#define PPC_OPCODE_601 0x20
|
#define PPC_OPCODE_601 0x20
|
|
|
/* Opcode is supported in both the Power and PowerPC architectures
|
/* Opcode is supported in both the Power and PowerPC architectures
|
(ie, compiler's -mcpu=common or assembler's -mcom). */
|
(ie, compiler's -mcpu=common or assembler's -mcom). */
|
#define PPC_OPCODE_COMMON 0x40
|
#define PPC_OPCODE_COMMON 0x40
|
|
|
/* Opcode is supported for any Power or PowerPC platform (this is
|
/* Opcode is supported for any Power or PowerPC platform (this is
|
for the assembler's -many option, and it eliminates duplicates). */
|
for the assembler's -many option, and it eliminates duplicates). */
|
#define PPC_OPCODE_ANY 0x80
|
#define PPC_OPCODE_ANY 0x80
|
|
|
/* Opcode is supported as part of the 64-bit bridge. */
|
/* Opcode is supported as part of the 64-bit bridge. */
|
#define PPC_OPCODE_64_BRIDGE 0x100
|
#define PPC_OPCODE_64_BRIDGE 0x100
|
|
|
/* Opcode is supported by Altivec Vector Unit */
|
/* Opcode is supported by Altivec Vector Unit */
|
#define PPC_OPCODE_ALTIVEC 0x200
|
#define PPC_OPCODE_ALTIVEC 0x200
|
|
|
/* Opcode is supported by PowerPC 403 processor. */
|
/* Opcode is supported by PowerPC 403 processor. */
|
#define PPC_OPCODE_403 0x400
|
#define PPC_OPCODE_403 0x400
|
|
|
/* Opcode is supported by PowerPC BookE processor. */
|
/* Opcode is supported by PowerPC BookE processor. */
|
#define PPC_OPCODE_BOOKE 0x800
|
#define PPC_OPCODE_BOOKE 0x800
|
|
|
/* Opcode is only supported by 64-bit PowerPC BookE processor. */
|
/* Opcode is only supported by 64-bit PowerPC BookE processor. */
|
#define PPC_OPCODE_BOOKE64 0x1000
|
#define PPC_OPCODE_BOOKE64 0x1000
|
|
|
/* Opcode is supported by PowerPC 440 processor. */
|
/* Opcode is supported by PowerPC 440 processor. */
|
#define PPC_OPCODE_440 0x2000
|
#define PPC_OPCODE_440 0x2000
|
|
|
/* Opcode is only supported by Power4 architecture. */
|
/* Opcode is only supported by Power4 architecture. */
|
#define PPC_OPCODE_POWER4 0x4000
|
#define PPC_OPCODE_POWER4 0x4000
|
|
|
/* Opcode is only supported by Power7 architecture. */
|
/* Opcode is only supported by Power7 architecture. */
|
#define PPC_OPCODE_POWER7 0x8000
|
#define PPC_OPCODE_POWER7 0x8000
|
|
|
/* Opcode is only supported by POWERPC Classic architecture. */
|
/* Opcode is only supported by POWERPC Classic architecture. */
|
#define PPC_OPCODE_CLASSIC 0x10000
|
#define PPC_OPCODE_CLASSIC 0x10000
|
|
|
/* Opcode is only supported by e500x2 Core. */
|
/* Opcode is only supported by e500x2 Core. */
|
#define PPC_OPCODE_SPE 0x20000
|
#define PPC_OPCODE_SPE 0x20000
|
|
|
/* Opcode is supported by e500x2 Integer select APU. */
|
/* Opcode is supported by e500x2 Integer select APU. */
|
#define PPC_OPCODE_ISEL 0x40000
|
#define PPC_OPCODE_ISEL 0x40000
|
|
|
/* Opcode is an e500 SPE floating point instruction. */
|
/* Opcode is an e500 SPE floating point instruction. */
|
#define PPC_OPCODE_EFS 0x80000
|
#define PPC_OPCODE_EFS 0x80000
|
|
|
/* Opcode is supported by branch locking APU. */
|
/* Opcode is supported by branch locking APU. */
|
#define PPC_OPCODE_BRLOCK 0x100000
|
#define PPC_OPCODE_BRLOCK 0x100000
|
|
|
/* Opcode is supported by performance monitor APU. */
|
/* Opcode is supported by performance monitor APU. */
|
#define PPC_OPCODE_PMR 0x200000
|
#define PPC_OPCODE_PMR 0x200000
|
|
|
/* Opcode is supported by cache locking APU. */
|
/* Opcode is supported by cache locking APU. */
|
#define PPC_OPCODE_CACHELCK 0x400000
|
#define PPC_OPCODE_CACHELCK 0x400000
|
|
|
/* Opcode is supported by machine check APU. */
|
/* Opcode is supported by machine check APU. */
|
#define PPC_OPCODE_RFMCI 0x800000
|
#define PPC_OPCODE_RFMCI 0x800000
|
|
|
/* Opcode is only supported by Power5 architecture. */
|
/* Opcode is only supported by Power5 architecture. */
|
#define PPC_OPCODE_POWER5 0x1000000
|
#define PPC_OPCODE_POWER5 0x1000000
|
|
|
/* Opcode is supported by PowerPC e300 family. */
|
/* Opcode is supported by PowerPC e300 family. */
|
#define PPC_OPCODE_E300 0x2000000
|
#define PPC_OPCODE_E300 0x2000000
|
|
|
/* Opcode is only supported by Power6 architecture. */
|
/* Opcode is only supported by Power6 architecture. */
|
#define PPC_OPCODE_POWER6 0x4000000
|
#define PPC_OPCODE_POWER6 0x4000000
|
|
|
/* Opcode is only supported by PowerPC Cell family. */
|
/* Opcode is only supported by PowerPC Cell family. */
|
#define PPC_OPCODE_CELL 0x8000000
|
#define PPC_OPCODE_CELL 0x8000000
|
|
|
/* Opcode is supported by CPUs with paired singles support. */
|
/* Opcode is supported by CPUs with paired singles support. */
|
#define PPC_OPCODE_PPCPS 0x10000000
|
#define PPC_OPCODE_PPCPS 0x10000000
|
|
|
/* Opcode is supported by Power E500MC */
|
/* Opcode is supported by Power E500MC */
|
#define PPC_OPCODE_E500MC 0x20000000
|
#define PPC_OPCODE_E500MC 0x20000000
|
|
|
/* Opcode is supported by PowerPC 405 processor. */
|
/* Opcode is supported by PowerPC 405 processor. */
|
#define PPC_OPCODE_405 0x40000000
|
#define PPC_OPCODE_405 0x40000000
|
|
|
/* Opcode is supported by Vector-Scalar (VSX) Unit */
|
/* Opcode is supported by Vector-Scalar (VSX) Unit */
|
#define PPC_OPCODE_VSX 0x80000000
|
#define PPC_OPCODE_VSX 0x80000000
|
|
|
/* Opcode is supported by A2. */
|
/* Opcode is supported by A2. */
|
#define PPC_OPCODE_A2 0x100000000ULL
|
#define PPC_OPCODE_A2 0x100000000ULL
|
|
|
/* Opcode is supported by PowerPC 476 processor. */
|
/* Opcode is supported by PowerPC 476 processor. */
|
#define PPC_OPCODE_476 0x200000000ULL
|
#define PPC_OPCODE_476 0x200000000ULL
|
|
|
/* Opcode is supported by AppliedMicro Titan core */
|
/* Opcode is supported by AppliedMicro Titan core */
|
#define PPC_OPCODE_TITAN 0x400000000ULL
|
#define PPC_OPCODE_TITAN 0x400000000ULL
|
|
|
/* A macro to extract the major opcode from an instruction. */
|
/* A macro to extract the major opcode from an instruction. */
|
#define PPC_OP(i) (((i) >> 26) & 0x3f)
|
#define PPC_OP(i) (((i) >> 26) & 0x3f)
|
|
|
/* The operands table is an array of struct powerpc_operand. */
|
/* The operands table is an array of struct powerpc_operand. */
|
|
|
struct powerpc_operand
|
struct powerpc_operand
|
{
|
{
|
/* A bitmask of bits in the operand. */
|
/* A bitmask of bits in the operand. */
|
unsigned int bitm;
|
unsigned int bitm;
|
|
|
/* How far the operand is left shifted in the instruction.
|
/* How far the operand is left shifted in the instruction.
|
-1 to indicate that BITM and SHIFT cannot be used to determine
|
-1 to indicate that BITM and SHIFT cannot be used to determine
|
where the operand goes in the insn. */
|
where the operand goes in the insn. */
|
int shift;
|
int shift;
|
|
|
/* Insertion function. This is used by the assembler. To insert an
|
/* Insertion function. This is used by the assembler. To insert an
|
operand value into an instruction, check this field.
|
operand value into an instruction, check this field.
|
|
|
If it is NULL, execute
|
If it is NULL, execute
|
i |= (op & o->bitm) << o->shift;
|
i |= (op & o->bitm) << o->shift;
|
(i is the instruction which we are filling in, o is a pointer to
|
(i is the instruction which we are filling in, o is a pointer to
|
this structure, and op is the operand value).
|
this structure, and op is the operand value).
|
|
|
If this field is not NULL, then simply call it with the
|
If this field is not NULL, then simply call it with the
|
instruction and the operand value. It will return the new value
|
instruction and the operand value. It will return the new value
|
of the instruction. If the ERRMSG argument is not NULL, then if
|
of the instruction. If the ERRMSG argument is not NULL, then if
|
the operand value is illegal, *ERRMSG will be set to a warning
|
the operand value is illegal, *ERRMSG will be set to a warning
|
string (the operand will be inserted in any case). If the
|
string (the operand will be inserted in any case). If the
|
operand value is legal, *ERRMSG will be unchanged (most operands
|
operand value is legal, *ERRMSG will be unchanged (most operands
|
can accept any value). */
|
can accept any value). */
|
unsigned long (*insert)
|
unsigned long (*insert)
|
(unsigned long instruction, long op, ppc_cpu_t dialect, const char **errmsg);
|
(unsigned long instruction, long op, ppc_cpu_t dialect, const char **errmsg);
|
|
|
/* Extraction function. This is used by the disassembler. To
|
/* Extraction function. This is used by the disassembler. To
|
extract this operand type from an instruction, check this field.
|
extract this operand type from an instruction, check this field.
|
|
|
If it is NULL, compute
|
If it is NULL, compute
|
op = (i >> o->shift) & o->bitm;
|
op = (i >> o->shift) & o->bitm;
|
if ((o->flags & PPC_OPERAND_SIGNED) != 0)
|
if ((o->flags & PPC_OPERAND_SIGNED) != 0)
|
sign_extend (op);
|
sign_extend (op);
|
(i is the instruction, o is a pointer to this structure, and op
|
(i is the instruction, o is a pointer to this structure, and op
|
is the result).
|
is the result).
|
|
|
If this field is not NULL, then simply call it with the
|
If this field is not NULL, then simply call it with the
|
instruction value. It will return the value of the operand. If
|
instruction value. It will return the value of the operand. If
|
the INVALID argument is not NULL, *INVALID will be set to
|
the INVALID argument is not NULL, *INVALID will be set to
|
non-zero if this operand type can not actually be extracted from
|
non-zero if this operand type can not actually be extracted from
|
this operand (i.e., the instruction does not match). If the
|
this operand (i.e., the instruction does not match). If the
|
operand is valid, *INVALID will not be changed. */
|
operand is valid, *INVALID will not be changed. */
|
long (*extract) (unsigned long instruction, ppc_cpu_t dialect, int *invalid);
|
long (*extract) (unsigned long instruction, ppc_cpu_t dialect, int *invalid);
|
|
|
/* One bit syntax flags. */
|
/* One bit syntax flags. */
|
unsigned long flags;
|
unsigned long flags;
|
};
|
};
|
|
|
/* Elements in the table are retrieved by indexing with values from
|
/* Elements in the table are retrieved by indexing with values from
|
the operands field of the powerpc_opcodes table. */
|
the operands field of the powerpc_opcodes table. */
|
|
|
extern const struct powerpc_operand powerpc_operands[];
|
extern const struct powerpc_operand powerpc_operands[];
|
extern const unsigned int num_powerpc_operands;
|
extern const unsigned int num_powerpc_operands;
|
|
|
/* Values defined for the flags field of a struct powerpc_operand. */
|
/* Values defined for the flags field of a struct powerpc_operand. */
|
|
|
/* This operand takes signed values. */
|
/* This operand takes signed values. */
|
#define PPC_OPERAND_SIGNED (0x1)
|
#define PPC_OPERAND_SIGNED (0x1)
|
|
|
/* This operand takes signed values, but also accepts a full positive
|
/* This operand takes signed values, but also accepts a full positive
|
range of values when running in 32 bit mode. That is, if bits is
|
range of values when running in 32 bit mode. That is, if bits is
|
16, it takes any value from -0x8000 to 0xffff. In 64 bit mode,
|
16, it takes any value from -0x8000 to 0xffff. In 64 bit mode,
|
this flag is ignored. */
|
this flag is ignored. */
|
#define PPC_OPERAND_SIGNOPT (0x2)
|
#define PPC_OPERAND_SIGNOPT (0x2)
|
|
|
/* This operand does not actually exist in the assembler input. This
|
/* This operand does not actually exist in the assembler input. This
|
is used to support extended mnemonics such as mr, for which two
|
is used to support extended mnemonics such as mr, for which two
|
operands fields are identical. The assembler should call the
|
operands fields are identical. The assembler should call the
|
insert function with any op value. The disassembler should call
|
insert function with any op value. The disassembler should call
|
the extract function, ignore the return value, and check the value
|
the extract function, ignore the return value, and check the value
|
placed in the valid argument. */
|
placed in the valid argument. */
|
#define PPC_OPERAND_FAKE (0x4)
|
#define PPC_OPERAND_FAKE (0x4)
|
|
|
/* The next operand should be wrapped in parentheses rather than
|
/* The next operand should be wrapped in parentheses rather than
|
separated from this one by a comma. This is used for the load and
|
separated from this one by a comma. This is used for the load and
|
store instructions which want their operands to look like
|
store instructions which want their operands to look like
|
reg,displacement(reg)
|
reg,displacement(reg)
|
*/
|
*/
|
#define PPC_OPERAND_PARENS (0x8)
|
#define PPC_OPERAND_PARENS (0x8)
|
|
|
/* This operand may use the symbolic names for the CR fields, which
|
/* This operand may use the symbolic names for the CR fields, which
|
are
|
are
|
lt 0 gt 1 eq 2 so 3 un 3
|
lt 0 gt 1 eq 2 so 3 un 3
|
cr0 0 cr1 1 cr2 2 cr3 3
|
cr0 0 cr1 1 cr2 2 cr3 3
|
cr4 4 cr5 5 cr6 6 cr7 7
|
cr4 4 cr5 5 cr6 6 cr7 7
|
These may be combined arithmetically, as in cr2*4+gt. These are
|
These may be combined arithmetically, as in cr2*4+gt. These are
|
only supported on the PowerPC, not the POWER. */
|
only supported on the PowerPC, not the POWER. */
|
#define PPC_OPERAND_CR (0x10)
|
#define PPC_OPERAND_CR (0x10)
|
|
|
/* This operand names a register. The disassembler uses this to print
|
/* This operand names a register. The disassembler uses this to print
|
register names with a leading 'r'. */
|
register names with a leading 'r'. */
|
#define PPC_OPERAND_GPR (0x20)
|
#define PPC_OPERAND_GPR (0x20)
|
|
|
/* Like PPC_OPERAND_GPR, but don't print a leading 'r' for r0. */
|
/* Like PPC_OPERAND_GPR, but don't print a leading 'r' for r0. */
|
#define PPC_OPERAND_GPR_0 (0x40)
|
#define PPC_OPERAND_GPR_0 (0x40)
|
|
|
/* This operand names a floating point register. The disassembler
|
/* This operand names a floating point register. The disassembler
|
prints these with a leading 'f'. */
|
prints these with a leading 'f'. */
|
#define PPC_OPERAND_FPR (0x80)
|
#define PPC_OPERAND_FPR (0x80)
|
|
|
/* This operand is a relative branch displacement. The disassembler
|
/* This operand is a relative branch displacement. The disassembler
|
prints these symbolically if possible. */
|
prints these symbolically if possible. */
|
#define PPC_OPERAND_RELATIVE (0x100)
|
#define PPC_OPERAND_RELATIVE (0x100)
|
|
|
/* This operand is an absolute branch address. The disassembler
|
/* This operand is an absolute branch address. The disassembler
|
prints these symbolically if possible. */
|
prints these symbolically if possible. */
|
#define PPC_OPERAND_ABSOLUTE (0x200)
|
#define PPC_OPERAND_ABSOLUTE (0x200)
|
|
|
/* This operand is optional, and is zero if omitted. This is used for
|
/* This operand is optional, and is zero if omitted. This is used for
|
example, in the optional BF field in the comparison instructions. The
|
example, in the optional BF field in the comparison instructions. The
|
assembler must count the number of operands remaining on the line,
|
assembler must count the number of operands remaining on the line,
|
and the number of operands remaining for the opcode, and decide
|
and the number of operands remaining for the opcode, and decide
|
whether this operand is present or not. The disassembler should
|
whether this operand is present or not. The disassembler should
|
print this operand out only if it is not zero. */
|
print this operand out only if it is not zero. */
|
#define PPC_OPERAND_OPTIONAL (0x400)
|
#define PPC_OPERAND_OPTIONAL (0x400)
|
|
|
/* This flag is only used with PPC_OPERAND_OPTIONAL. If this operand
|
/* This flag is only used with PPC_OPERAND_OPTIONAL. If this operand
|
is omitted, then for the next operand use this operand value plus
|
is omitted, then for the next operand use this operand value plus
|
1, ignoring the next operand field for the opcode. This wretched
|
1, ignoring the next operand field for the opcode. This wretched
|
hack is needed because the Power rotate instructions can take
|
hack is needed because the Power rotate instructions can take
|
either 4 or 5 operands. The disassembler should print this operand
|
either 4 or 5 operands. The disassembler should print this operand
|
out regardless of the PPC_OPERAND_OPTIONAL field. */
|
out regardless of the PPC_OPERAND_OPTIONAL field. */
|
#define PPC_OPERAND_NEXT (0x800)
|
#define PPC_OPERAND_NEXT (0x800)
|
|
|
/* This operand should be regarded as a negative number for the
|
/* This operand should be regarded as a negative number for the
|
purposes of overflow checking (i.e., the normal most negative
|
purposes of overflow checking (i.e., the normal most negative
|
number is disallowed and one more than the normal most positive
|
number is disallowed and one more than the normal most positive
|
number is allowed). This flag will only be set for a signed
|
number is allowed). This flag will only be set for a signed
|
operand. */
|
operand. */
|
#define PPC_OPERAND_NEGATIVE (0x1000)
|
#define PPC_OPERAND_NEGATIVE (0x1000)
|
|
|
/* This operand names a vector unit register. The disassembler
|
/* This operand names a vector unit register. The disassembler
|
prints these with a leading 'v'. */
|
prints these with a leading 'v'. */
|
#define PPC_OPERAND_VR (0x2000)
|
#define PPC_OPERAND_VR (0x2000)
|
|
|
/* This operand is for the DS field in a DS form instruction. */
|
/* This operand is for the DS field in a DS form instruction. */
|
#define PPC_OPERAND_DS (0x4000)
|
#define PPC_OPERAND_DS (0x4000)
|
|
|
/* This operand is for the DQ field in a DQ form instruction. */
|
/* This operand is for the DQ field in a DQ form instruction. */
|
#define PPC_OPERAND_DQ (0x8000)
|
#define PPC_OPERAND_DQ (0x8000)
|
|
|
/* Valid range of operand is 0..n rather than 0..n-1. */
|
/* Valid range of operand is 0..n rather than 0..n-1. */
|
#define PPC_OPERAND_PLUS1 (0x10000)
|
#define PPC_OPERAND_PLUS1 (0x10000)
|
|
|
/* Xilinx APU and FSL related operands */
|
/* Xilinx APU and FSL related operands */
|
#define PPC_OPERAND_FSL (0x20000)
|
#define PPC_OPERAND_FSL (0x20000)
|
#define PPC_OPERAND_FCR (0x40000)
|
#define PPC_OPERAND_FCR (0x40000)
|
#define PPC_OPERAND_UDI (0x80000)
|
#define PPC_OPERAND_UDI (0x80000)
|
|
|
/* This operand names a vector-scalar unit register. The disassembler
|
/* This operand names a vector-scalar unit register. The disassembler
|
prints these with a leading 'vs'. */
|
prints these with a leading 'vs'. */
|
#define PPC_OPERAND_VSR (0x100000)
|
#define PPC_OPERAND_VSR (0x100000)
|
|
|
/* The POWER and PowerPC assemblers use a few macros. We keep them
|
/* The POWER and PowerPC assemblers use a few macros. We keep them
|
with the operands table for simplicity. The macro table is an
|
with the operands table for simplicity. The macro table is an
|
array of struct powerpc_macro. */
|
array of struct powerpc_macro. */
|
|
|
struct powerpc_macro
|
struct powerpc_macro
|
{
|
{
|
/* The macro name. */
|
/* The macro name. */
|
const char *name;
|
const char *name;
|
|
|
/* The number of operands the macro takes. */
|
/* The number of operands the macro takes. */
|
unsigned int operands;
|
unsigned int operands;
|
|
|
/* One bit flags for the opcode. These are used to indicate which
|
/* One bit flags for the opcode. These are used to indicate which
|
specific processors support the instructions. The values are the
|
specific processors support the instructions. The values are the
|
same as those for the struct powerpc_opcode flags field. */
|
same as those for the struct powerpc_opcode flags field. */
|
ppc_cpu_t flags;
|
ppc_cpu_t flags;
|
|
|
/* A format string to turn the macro into a normal instruction.
|
/* A format string to turn the macro into a normal instruction.
|
Each %N in the string is replaced with operand number N (zero
|
Each %N in the string is replaced with operand number N (zero
|
based). */
|
based). */
|
const char *format;
|
const char *format;
|
};
|
};
|
|
|
extern const struct powerpc_macro powerpc_macros[];
|
extern const struct powerpc_macro powerpc_macros[];
|
extern const int powerpc_num_macros;
|
extern const int powerpc_num_macros;
|
|
|
extern ppc_cpu_t ppc_parse_cpu (ppc_cpu_t, const char *);
|
extern ppc_cpu_t ppc_parse_cpu (ppc_cpu_t, const char *);
|
|
|
#endif /* PPC_H */
|
#endif /* PPC_H */
|
|
|
