OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [common/] [genmloop.sh] - Diff between revs 227 and 816

Go to most recent revision | Only display areas with differences | Details | Blame | View Log

Rev 227 Rev 816
# Generate the main loop of the simulator.
# Generate the main loop of the simulator.
# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2007, 2008, 2009, 2010
# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2007, 2008, 2009, 2010
# Free Software Foundation, Inc.
# Free Software Foundation, Inc.
# Contributed by Cygnus Support.
# Contributed by Cygnus Support.
#
#
# This file is part of the GNU simulators.
# This file is part of the GNU simulators.
#
#
# This program is free software; you can redistribute it and/or modify
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
# (at your option) any later version.
#
#
# This program is distributed in the hope that it will be useful,
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
# GNU General Public License for more details.
#
#
# You should have received a copy of the GNU General Public License
# You should have received a copy of the GNU General Public License
# along with this program.  If not, see <http://www.gnu.org/licenses/>.
# along with this program.  If not, see <http://www.gnu.org/licenses/>.
#
#
# This file creates two files: eng.hin and mloop.cin.
# This file creates two files: eng.hin and mloop.cin.
# eng.hin defines a few macros that specify what kind of engine was selected
# eng.hin defines a few macros that specify what kind of engine was selected
# based on the arguments to this script.
# based on the arguments to this script.
# mloop.cin contains the engine.
# mloop.cin contains the engine.
#
#
# ??? Rename mloop.c to eng.c?
# ??? Rename mloop.c to eng.c?
# ??? Rename mainloop.in to engine.in?
# ??? Rename mainloop.in to engine.in?
# ??? Add options to specify output file names?
# ??? Add options to specify output file names?
# ??? Rename this file to genengine.sh?
# ??? Rename this file to genengine.sh?
#
#
# Syntax: genmloop.sh [options]
# Syntax: genmloop.sh [options]
#
#
# Options:
# Options:
#
#
# -mono | -multi
# -mono | -multi
#    - specify single cpu or multiple cpus (number specifyable at runtime),
#    - specify single cpu or multiple cpus (number specifyable at runtime),
#      maximum number is a configuration parameter
#      maximum number is a configuration parameter
#    - -multi wip
#    - -multi wip
#
#
# -fast: include support for fast execution in addition to full featured mode
# -fast: include support for fast execution in addition to full featured mode
#
#
#       Full featured mode is for tracing, profiling, etc. and is always
#       Full featured mode is for tracing, profiling, etc. and is always
#       provided.  Fast mode contains no frills, except speed.
#       provided.  Fast mode contains no frills, except speed.
#       A target need only provide a "full" version of one of
#       A target need only provide a "full" version of one of
#       simple,scache,pbb.  If the target wants it can also provide a fast
#       simple,scache,pbb.  If the target wants it can also provide a fast
#       version of same.  It can't provide more than this.
#       version of same.  It can't provide more than this.
#       ??? Later add ability to have another set of full/fast semantics
#       ??? Later add ability to have another set of full/fast semantics
#       for use in with-devices/with-smp situations (pbb can be inappropriate
#       for use in with-devices/with-smp situations (pbb can be inappropriate
#       here).
#       here).
#
#
# -full-switch: same as -fast but for full featured version of -switch
# -full-switch: same as -fast but for full featured version of -switch
#       Only needed if -fast present.
#       Only needed if -fast present.
#
#
# -simple: simple execution engine (the default)
# -simple: simple execution engine (the default)
#
#
#       This engine fetches and executes one instruction at a time.
#       This engine fetches and executes one instruction at a time.
#       Field extraction is done in the semantic routines.
#       Field extraction is done in the semantic routines.
#
#
#       ??? There are two possible flavours of -simple.  One that extracts
#       ??? There are two possible flavours of -simple.  One that extracts
#       fields in the semantic routine (which is what is implemented here),
#       fields in the semantic routine (which is what is implemented here),
#       and one that stores the extracted fields in ARGBUF before calling the
#       and one that stores the extracted fields in ARGBUF before calling the
#       semantic routine.  The latter is essentially the -scache case with a
#       semantic routine.  The latter is essentially the -scache case with a
#       cache size of one (and the scache lookup code removed).  There are no
#       cache size of one (and the scache lookup code removed).  There are no
#       current uses of this and it's not clear when doing this would be a win.
#       current uses of this and it's not clear when doing this would be a win.
#       More complicated ISA's that want to use -simple may find this a win.
#       More complicated ISA's that want to use -simple may find this a win.
#       Should this ever be desirable, implement a new engine style here and
#       Should this ever be desirable, implement a new engine style here and
#       call it -extract (or some such).  It's believed that the CGEN-generated
#       call it -extract (or some such).  It's believed that the CGEN-generated
#       code for the -scache case would be usable here, so no new code
#       code for the -scache case would be usable here, so no new code
#       generation option would be needed for CGEN.
#       generation option would be needed for CGEN.
#
#
# -scache: use the scache to speed things up (not always a win)
# -scache: use the scache to speed things up (not always a win)
#
#
#       This engine caches the extracted instruction before executing it.
#       This engine caches the extracted instruction before executing it.
#       When executing instructions they are first looked up in the scache.
#       When executing instructions they are first looked up in the scache.
#
#
# -pbb: same as -scache but extract a (pseudo-) basic block at a time
# -pbb: same as -scache but extract a (pseudo-) basic block at a time
#
#
#       This engine is basically identical to the scache version except that
#       This engine is basically identical to the scache version except that
#       extraction is done a pseudo-basic-block at a time and the address of
#       extraction is done a pseudo-basic-block at a time and the address of
#       the scache entry of a branch target is recorded as well.
#       the scache entry of a branch target is recorded as well.
#       Additional speedups are then possible by defering Ctrl-C checking
#       Additional speedups are then possible by defering Ctrl-C checking
#       to the end of basic blocks and by threading the insns together.
#       to the end of basic blocks and by threading the insns together.
#       We call them pseudo-basic-block's instead of just basic-blocks because
#       We call them pseudo-basic-block's instead of just basic-blocks because
#       they're not necessarily basic-blocks, though normally are.
#       they're not necessarily basic-blocks, though normally are.
#
#
# -parallel-read: support parallel execution with read-before-exec support.
# -parallel-read: support parallel execution with read-before-exec support.
# -parallel-write: support parallel execution with write-after-exec support.
# -parallel-write: support parallel execution with write-after-exec support.
# -parallel-generic-write: support parallel execution with generic queued
# -parallel-generic-write: support parallel execution with generic queued
#       writes.
#       writes.
#
#
#       One of these options is specified in addition to -simple, -scache,
#       One of these options is specified in addition to -simple, -scache,
#       -pbb.  Note that while the code can determine if the cpu supports
#       -pbb.  Note that while the code can determine if the cpu supports
#       parallel execution with HAVE_PARALLEL_INSNS [and thus this option is
#       parallel execution with HAVE_PARALLEL_INSNS [and thus this option is
#       technically unnecessary], having this option cuts down on the clutter
#       technically unnecessary], having this option cuts down on the clutter
#       in the result.
#       in the result.
#
#
# -parallel-only: semantic code only supports parallel version of insn
# -parallel-only: semantic code only supports parallel version of insn
#
#
#       Semantic code only supports parallel versions of each insn.
#       Semantic code only supports parallel versions of each insn.
#       Things can be sped up by generating both serial and parallel versions
#       Things can be sped up by generating both serial and parallel versions
#       and is better suited to mixed parallel architectures like the m32r.
#       and is better suited to mixed parallel architectures like the m32r.
#
#
# -prefix: string to prepend to function names in mloop.c/eng.h.
# -prefix: string to prepend to function names in mloop.c/eng.h.
#
#
#       If no prefix is specified, the cpu type is used.
#       If no prefix is specified, the cpu type is used.
#
#
# -switch file: specify file containing semantics implemented as a switch()
# -switch file: specify file containing semantics implemented as a switch()
#
#
# -cpu <cpu-family>
# -cpu <cpu-family>
#
#
#       Specify the cpu family name.
#       Specify the cpu family name.
#
#
# -infile <input-file>
# -infile <input-file>
#
#
#       Specify the mainloop.in input file.
#       Specify the mainloop.in input file.
#
#
# -outfile-suffix <output-file-suffix>
# -outfile-suffix <output-file-suffix>
#
#
#       Specify the suffix to append to output files.
#       Specify the suffix to append to output files.
#
#
# -shell <shell>
# -shell <shell>
#
#
#       Specify the shell to use to execute <input-file>
#       Specify the shell to use to execute <input-file>
#
#
# Only one of -scache/-pbb may be selected.
# Only one of -scache/-pbb may be selected.
# -simple is the default.
# -simple is the default.
#
#
####
####
#
#
# TODO
# TODO
# - build mainloop.in from .cpu file
# - build mainloop.in from .cpu file
 
 
type=mono
type=mono
#scache=
#scache=
#fast=
#fast=
#full_switch=
#full_switch=
#pbb=
#pbb=
parallel=no
parallel=no
parallel_only=no
parallel_only=no
switch=
switch=
cpu="unknown"
cpu="unknown"
infile=""
infile=""
prefix="unknown"
prefix="unknown"
outsuffix=""
outsuffix=""
 
 
while test $# -gt 0
while test $# -gt 0
do
do
        case $1 in
        case $1 in
        -mono) type=mono ;;
        -mono) type=mono ;;
        -multi) type=multi ;;
        -multi) type=multi ;;
        -no-fast) ;;
        -no-fast) ;;
        -fast) fast=yes ;;
        -fast) fast=yes ;;
        -full-switch) full_switch=yes ;;
        -full-switch) full_switch=yes ;;
        -simple) ;;
        -simple) ;;
        -scache) scache=yes ;;
        -scache) scache=yes ;;
        -pbb) pbb=yes ;;
        -pbb) pbb=yes ;;
        -no-parallel) ;;
        -no-parallel) ;;
        -outfile-suffix) shift ; outsuffix=$1 ;;
        -outfile-suffix) shift ; outsuffix=$1 ;;
        -parallel-read) parallel=read ;;
        -parallel-read) parallel=read ;;
        -parallel-write) parallel=write ;;
        -parallel-write) parallel=write ;;
        -parallel-generic-write) parallel=genwrite ;;
        -parallel-generic-write) parallel=genwrite ;;
        -parallel-only) parallel_only=yes ;;
        -parallel-only) parallel_only=yes ;;
        -prefix) shift ; prefix=$1 ;;
        -prefix) shift ; prefix=$1 ;;
        -switch) shift ; switch=$1 ;;
        -switch) shift ; switch=$1 ;;
        -cpu) shift ; cpu=$1 ;;
        -cpu) shift ; cpu=$1 ;;
        -infile) shift ; infile=$1 ;;
        -infile) shift ; infile=$1 ;;
        -shell) shift ; SHELL=$1 ;;
        -shell) shift ; SHELL=$1 ;;
        *) echo "unknown option: $1" >&2 ; exit 1 ;;
        *) echo "unknown option: $1" >&2 ; exit 1 ;;
        esac
        esac
        shift
        shift
done
done
 
 
# Argument validation.
# Argument validation.
 
 
if [ x$scache = xyes -a x$pbb = xyes ] ; then
if [ x$scache = xyes -a x$pbb = xyes ] ; then
    echo "only one of -scache and -pbb may be selected" >&2
    echo "only one of -scache and -pbb may be selected" >&2
    exit 1
    exit 1
fi
fi
 
 
if [ "x$cpu" = xunknown ] ; then
if [ "x$cpu" = xunknown ] ; then
    echo "cpu family not specified" >&2
    echo "cpu family not specified" >&2
    exit 1
    exit 1
fi
fi
 
 
if [ "x$infile" = x ] ; then
if [ "x$infile" = x ] ; then
    echo "mainloop.in not specified" >&2
    echo "mainloop.in not specified" >&2
    exit 1
    exit 1
fi
fi
 
 
if [ "x$prefix" = xunknown ] ; then
if [ "x$prefix" = xunknown ] ; then
    prefix=$cpu
    prefix=$cpu
fi
fi
 
 
lowercase='abcdefghijklmnopqrstuvwxyz'
lowercase='abcdefghijklmnopqrstuvwxyz'
uppercase='ABCDEFGHIJKLMNOPQRSTUVWXYZ'
uppercase='ABCDEFGHIJKLMNOPQRSTUVWXYZ'
CPU=`echo ${cpu} | tr "${lowercase}" "${uppercase}"`
CPU=`echo ${cpu} | tr "${lowercase}" "${uppercase}"`
PREFIX=`echo ${prefix} | tr "${lowercase}" "${uppercase}"`
PREFIX=`echo ${prefix} | tr "${lowercase}" "${uppercase}"`
 
 
##########################################################################
##########################################################################
 
 
rm -f eng${outsuffix}.hin
rm -f eng${outsuffix}.hin
exec 1>eng${outsuffix}.hin
exec 1>eng${outsuffix}.hin
 
 
echo "/* engine configuration for ${cpu} */"
echo "/* engine configuration for ${cpu} */"
echo ""
echo ""
 
 
echo "/* WITH_FAST: non-zero if a fast version of the engine is available"
echo "/* WITH_FAST: non-zero if a fast version of the engine is available"
echo "   in addition to the full-featured version.  */"
echo "   in addition to the full-featured version.  */"
if [ x$fast = xyes ] ; then
if [ x$fast = xyes ] ; then
        echo "#define WITH_FAST 1"
        echo "#define WITH_FAST 1"
else
else
        echo "#define WITH_FAST 0"
        echo "#define WITH_FAST 0"
fi
fi
 
 
echo ""
echo ""
echo "/* WITH_SCACHE_PBB_${PREFIX}: non-zero if the pbb engine was selected.  */"
echo "/* WITH_SCACHE_PBB_${PREFIX}: non-zero if the pbb engine was selected.  */"
if [ x$pbb = xyes ] ; then
if [ x$pbb = xyes ] ; then
        echo "#define WITH_SCACHE_PBB_${PREFIX} 1"
        echo "#define WITH_SCACHE_PBB_${PREFIX} 1"
else
else
        echo "#define WITH_SCACHE_PBB_${PREFIX} 0"
        echo "#define WITH_SCACHE_PBB_${PREFIX} 0"
fi
fi
 
 
echo ""
echo ""
echo "/* HAVE_PARALLEL_INSNS: non-zero if cpu can parallelly execute > 1 insn.  */"
echo "/* HAVE_PARALLEL_INSNS: non-zero if cpu can parallelly execute > 1 insn.  */"
# blah blah blah, other ways to do this, blah blah blah
# blah blah blah, other ways to do this, blah blah blah
case x$parallel in
case x$parallel in
xno)
xno)
    echo "#define HAVE_PARALLEL_INSNS 0"
    echo "#define HAVE_PARALLEL_INSNS 0"
    echo "#define WITH_PARALLEL_READ 0"
    echo "#define WITH_PARALLEL_READ 0"
    echo "#define WITH_PARALLEL_WRITE 0"
    echo "#define WITH_PARALLEL_WRITE 0"
    echo "#define WITH_PARALLEL_GENWRITE 0"
    echo "#define WITH_PARALLEL_GENWRITE 0"
    ;;
    ;;
xread)
xread)
    echo "#define HAVE_PARALLEL_INSNS 1"
    echo "#define HAVE_PARALLEL_INSNS 1"
    echo "/* Parallel execution is supported by read-before-exec.  */"
    echo "/* Parallel execution is supported by read-before-exec.  */"
    echo "#define WITH_PARALLEL_READ 1"
    echo "#define WITH_PARALLEL_READ 1"
    echo "#define WITH_PARALLEL_WRITE 0"
    echo "#define WITH_PARALLEL_WRITE 0"
    echo "#define WITH_PARALLEL_GENWRITE 0"
    echo "#define WITH_PARALLEL_GENWRITE 0"
    ;;
    ;;
xwrite)
xwrite)
    echo "#define HAVE_PARALLEL_INSNS 1"
    echo "#define HAVE_PARALLEL_INSNS 1"
    echo "/* Parallel execution is supported by write-after-exec.  */"
    echo "/* Parallel execution is supported by write-after-exec.  */"
    echo "#define WITH_PARALLEL_READ 0"
    echo "#define WITH_PARALLEL_READ 0"
    echo "#define WITH_PARALLEL_WRITE 1"
    echo "#define WITH_PARALLEL_WRITE 1"
    echo "#define WITH_PARALLEL_GENWRITE 0"
    echo "#define WITH_PARALLEL_GENWRITE 0"
    ;;
    ;;
xgenwrite)
xgenwrite)
    echo "#define HAVE_PARALLEL_INSNS 1"
    echo "#define HAVE_PARALLEL_INSNS 1"
    echo "/* Parallel execution is supported by generic write-after-exec.  */"
    echo "/* Parallel execution is supported by generic write-after-exec.  */"
    echo "#define WITH_PARALLEL_READ 0"
    echo "#define WITH_PARALLEL_READ 0"
    echo "#define WITH_PARALLEL_WRITE 0"
    echo "#define WITH_PARALLEL_WRITE 0"
    echo "#define WITH_PARALLEL_GENWRITE 1"
    echo "#define WITH_PARALLEL_GENWRITE 1"
    ;;
    ;;
esac
esac
 
 
if [ "x$switch" != x ] ; then
if [ "x$switch" != x ] ; then
        echo ""
        echo ""
        echo "/* WITH_SEM_SWITCH_FULL: non-zero if full-featured engine is"
        echo "/* WITH_SEM_SWITCH_FULL: non-zero if full-featured engine is"
        echo "   implemented as a switch().  */"
        echo "   implemented as a switch().  */"
        if [ x$fast != xyes -o x$full_switch = xyes ] ; then
        if [ x$fast != xyes -o x$full_switch = xyes ] ; then
                echo "#define WITH_SEM_SWITCH_FULL 1"
                echo "#define WITH_SEM_SWITCH_FULL 1"
        else
        else
                echo "#define WITH_SEM_SWITCH_FULL 0"
                echo "#define WITH_SEM_SWITCH_FULL 0"
        fi
        fi
        echo ""
        echo ""
        echo "/* WITH_SEM_SWITCH_FAST: non-zero if fast engine is"
        echo "/* WITH_SEM_SWITCH_FAST: non-zero if fast engine is"
        echo "   implemented as a switch().  */"
        echo "   implemented as a switch().  */"
        if [ x$fast = xyes ] ; then
        if [ x$fast = xyes ] ; then
                echo "#define WITH_SEM_SWITCH_FAST 1"
                echo "#define WITH_SEM_SWITCH_FAST 1"
        else
        else
                echo "#define WITH_SEM_SWITCH_FAST 0"
                echo "#define WITH_SEM_SWITCH_FAST 0"
        fi
        fi
fi
fi
 
 
# Decls of functions we define.
# Decls of functions we define.
 
 
echo ""
echo ""
echo "/* Functions defined in the generated mainloop.c file"
echo "/* Functions defined in the generated mainloop.c file"
echo "   (which doesn't necessarily have that file name).  */"
echo "   (which doesn't necessarily have that file name).  */"
echo ""
echo ""
echo "extern ENGINE_FN ${prefix}_engine_run_full;"
echo "extern ENGINE_FN ${prefix}_engine_run_full;"
echo "extern ENGINE_FN ${prefix}_engine_run_fast;"
echo "extern ENGINE_FN ${prefix}_engine_run_fast;"
 
 
if [ x$pbb = xyes ] ; then
if [ x$pbb = xyes ] ; then
        echo ""
        echo ""
        echo "extern SEM_PC ${prefix}_pbb_begin (SIM_CPU *, int);"
        echo "extern SEM_PC ${prefix}_pbb_begin (SIM_CPU *, int);"
        echo "extern SEM_PC ${prefix}_pbb_chain (SIM_CPU *, SEM_ARG);"
        echo "extern SEM_PC ${prefix}_pbb_chain (SIM_CPU *, SEM_ARG);"
        echo "extern SEM_PC ${prefix}_pbb_cti_chain (SIM_CPU *, SEM_ARG, SEM_BRANCH_TYPE, PCADDR);"
        echo "extern SEM_PC ${prefix}_pbb_cti_chain (SIM_CPU *, SEM_ARG, SEM_BRANCH_TYPE, PCADDR);"
        echo "extern void ${prefix}_pbb_before (SIM_CPU *, SCACHE *);"
        echo "extern void ${prefix}_pbb_before (SIM_CPU *, SCACHE *);"
        echo "extern void ${prefix}_pbb_after (SIM_CPU *, SCACHE *);"
        echo "extern void ${prefix}_pbb_after (SIM_CPU *, SCACHE *);"
fi
fi
 
 
##########################################################################
##########################################################################
 
 
rm -f tmp-mloop-$$.cin mloop${outsuffix}.cin
rm -f tmp-mloop-$$.cin mloop${outsuffix}.cin
exec 1>tmp-mloop-$$.cin
exec 1>tmp-mloop-$$.cin
 
 
# We use @cpu@ instead of ${cpu} because we still need to run sed to handle
# We use @cpu@ instead of ${cpu} because we still need to run sed to handle
# transformation of @cpu@ for mainloop.in, so there's no need to use ${cpu}
# transformation of @cpu@ for mainloop.in, so there's no need to use ${cpu}
# here.
# here.
 
 
cat << EOF
cat << EOF
/* This file is generated by the genmloop script.  DO NOT EDIT! */
/* This file is generated by the genmloop script.  DO NOT EDIT! */
 
 
/* Enable switch() support in cgen headers.  */
/* Enable switch() support in cgen headers.  */
#define SEM_IN_SWITCH
#define SEM_IN_SWITCH
 
 
#define WANT_CPU @cpu@
#define WANT_CPU @cpu@
#define WANT_CPU_@CPU@
#define WANT_CPU_@CPU@
 
 
#include "sim-main.h"
#include "sim-main.h"
#include "bfd.h"
#include "bfd.h"
#include "cgen-mem.h"
#include "cgen-mem.h"
#include "cgen-ops.h"
#include "cgen-ops.h"
#include "sim-assert.h"
#include "sim-assert.h"
 
 
/* Fill in the administrative ARGBUF fields required by all insns,
/* Fill in the administrative ARGBUF fields required by all insns,
   virtual and real.  */
   virtual and real.  */
 
 
static INLINE void
static INLINE void
@prefix@_fill_argbuf (const SIM_CPU *cpu, ARGBUF *abuf, const IDESC *idesc,
@prefix@_fill_argbuf (const SIM_CPU *cpu, ARGBUF *abuf, const IDESC *idesc,
                    PCADDR pc, int fast_p)
                    PCADDR pc, int fast_p)
{
{
#if WITH_SCACHE
#if WITH_SCACHE
  SEM_SET_CODE (abuf, idesc, fast_p);
  SEM_SET_CODE (abuf, idesc, fast_p);
  ARGBUF_ADDR (abuf) = pc;
  ARGBUF_ADDR (abuf) = pc;
#endif
#endif
  ARGBUF_IDESC (abuf) = idesc;
  ARGBUF_IDESC (abuf) = idesc;
}
}
 
 
/* Fill in tracing/profiling fields of an ARGBUF.  */
/* Fill in tracing/profiling fields of an ARGBUF.  */
 
 
static INLINE void
static INLINE void
@prefix@_fill_argbuf_tp (const SIM_CPU *cpu, ARGBUF *abuf,
@prefix@_fill_argbuf_tp (const SIM_CPU *cpu, ARGBUF *abuf,
                       int trace_p, int profile_p)
                       int trace_p, int profile_p)
{
{
  ARGBUF_TRACE_P (abuf) = trace_p;
  ARGBUF_TRACE_P (abuf) = trace_p;
  ARGBUF_PROFILE_P (abuf) = profile_p;
  ARGBUF_PROFILE_P (abuf) = profile_p;
}
}
 
 
#if WITH_SCACHE_PBB
#if WITH_SCACHE_PBB
 
 
/* Emit the "x-before" handler.
/* Emit the "x-before" handler.
   x-before is emitted before each insn (serial or parallel).
   x-before is emitted before each insn (serial or parallel).
   This is as opposed to x-after which is only emitted at the end of a group
   This is as opposed to x-after which is only emitted at the end of a group
   of parallel insns.  */
   of parallel insns.  */
 
 
static INLINE void
static INLINE void
@prefix@_emit_before (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc, int first_p)
@prefix@_emit_before (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc, int first_p)
{
{
  ARGBUF *abuf = &sc[0].argbuf;
  ARGBUF *abuf = &sc[0].argbuf;
  const IDESC *id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEFORE];
  const IDESC *id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEFORE];
 
 
  abuf->fields.before.first_p = first_p;
  abuf->fields.before.first_p = first_p;
  @prefix@_fill_argbuf (current_cpu, abuf, id, pc, 0);
  @prefix@_fill_argbuf (current_cpu, abuf, id, pc, 0);
  /* no need to set trace_p,profile_p */
  /* no need to set trace_p,profile_p */
}
}
 
 
/* Emit the "x-after" handler.
/* Emit the "x-after" handler.
   x-after is emitted after a serial insn or at the end of a group of
   x-after is emitted after a serial insn or at the end of a group of
   parallel insns.  */
   parallel insns.  */
 
 
static INLINE void
static INLINE void
@prefix@_emit_after (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc)
@prefix@_emit_after (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc)
{
{
  ARGBUF *abuf = &sc[0].argbuf;
  ARGBUF *abuf = &sc[0].argbuf;
  const IDESC *id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_AFTER];
  const IDESC *id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_AFTER];
 
 
  @prefix@_fill_argbuf (current_cpu, abuf, id, pc, 0);
  @prefix@_fill_argbuf (current_cpu, abuf, id, pc, 0);
  /* no need to set trace_p,profile_p */
  /* no need to set trace_p,profile_p */
}
}
 
 
#endif /* WITH_SCACHE_PBB */
#endif /* WITH_SCACHE_PBB */
 
 
EOF
EOF
 
 
${SHELL} $infile support
${SHELL} $infile support
 
 
##########################################################################
##########################################################################
 
 
# Simple engine: fetch an instruction, execute the instruction.
# Simple engine: fetch an instruction, execute the instruction.
#
#
# Instruction fields are not extracted into ARGBUF, they are extracted in
# Instruction fields are not extracted into ARGBUF, they are extracted in
# the semantic routines themselves.  However, there is still a need to pass
# the semantic routines themselves.  However, there is still a need to pass
# and return misc. information to the semantic routines so we still use ARGBUF.
# and return misc. information to the semantic routines so we still use ARGBUF.
# [One could certainly implement things differently and remove ARGBUF.
# [One could certainly implement things differently and remove ARGBUF.
# It's not clear this is necessarily always a win.]
# It's not clear this is necessarily always a win.]
# ??? The use of the SCACHE struct is for consistency with the with-scache
# ??? The use of the SCACHE struct is for consistency with the with-scache
# case though it might be a source of confusion.
# case though it might be a source of confusion.
 
 
if [ x$scache != xyes -a x$pbb != xyes ] ; then
if [ x$scache != xyes -a x$pbb != xyes ] ; then
 
 
    cat << EOF
    cat << EOF
 
 
#define FAST_P 0
#define FAST_P 0
 
 
void
void
@prefix@_engine_run_full (SIM_CPU *current_cpu)
@prefix@_engine_run_full (SIM_CPU *current_cpu)
{
{
#define FAST_P 0
#define FAST_P 0
  SIM_DESC current_state = CPU_STATE (current_cpu);
  SIM_DESC current_state = CPU_STATE (current_cpu);
  /* ??? Use of SCACHE is a bit of a hack as we don't actually use the scache.
  /* ??? Use of SCACHE is a bit of a hack as we don't actually use the scache.
     We do however use ARGBUF so for consistency with the other engine flavours
     We do however use ARGBUF so for consistency with the other engine flavours
     the SCACHE type is used.  */
     the SCACHE type is used.  */
  SCACHE cache[MAX_LIW_INSNS];
  SCACHE cache[MAX_LIW_INSNS];
  SCACHE *sc = &cache[0];
  SCACHE *sc = &cache[0];
 
 
EOF
EOF
 
 
case x$parallel in
case x$parallel in
xread | xwrite)
xread | xwrite)
    cat << EOF
    cat << EOF
  PAREXEC pbufs[MAX_PARALLEL_INSNS];
  PAREXEC pbufs[MAX_PARALLEL_INSNS];
  PAREXEC *par_exec;
  PAREXEC *par_exec;
 
 
EOF
EOF
    ;;
    ;;
esac
esac
 
 
# Any initialization code before looping starts.
# Any initialization code before looping starts.
# Note that this code may declare some locals.
# Note that this code may declare some locals.
${SHELL} $infile init
${SHELL} $infile init
 
 
if [ x$parallel = xread ] ; then
if [ x$parallel = xread ] ; then
  cat << EOF
  cat << EOF
 
 
#if defined (__GNUC__)
#if defined (__GNUC__)
  {
  {
    if (! CPU_IDESC_READ_INIT_P (current_cpu))
    if (! CPU_IDESC_READ_INIT_P (current_cpu))
      {
      {
/* ??? Later maybe paste read.c in when building mainloop.c.  */
/* ??? Later maybe paste read.c in when building mainloop.c.  */
#define DEFINE_LABELS
#define DEFINE_LABELS
#include "readx.c"
#include "readx.c"
        CPU_IDESC_READ_INIT_P (current_cpu) = 1;
        CPU_IDESC_READ_INIT_P (current_cpu) = 1;
      }
      }
  }
  }
#endif
#endif
 
 
EOF
EOF
fi
fi
 
 
cat << EOF
cat << EOF
 
 
  if (! CPU_IDESC_SEM_INIT_P (current_cpu))
  if (! CPU_IDESC_SEM_INIT_P (current_cpu))
    {
    {
#if WITH_SEM_SWITCH_FULL
#if WITH_SEM_SWITCH_FULL
#if defined (__GNUC__)
#if defined (__GNUC__)
/* ??? Later maybe paste sem-switch.c in when building mainloop.c.  */
/* ??? Later maybe paste sem-switch.c in when building mainloop.c.  */
#define DEFINE_LABELS
#define DEFINE_LABELS
#include "$switch"
#include "$switch"
#endif
#endif
#else
#else
      @prefix@_sem_init_idesc_table (current_cpu);
      @prefix@_sem_init_idesc_table (current_cpu);
#endif
#endif
      CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
      CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
    }
    }
 
 
  do
  do
    {
    {
/* begin full-exec-simple */
/* begin full-exec-simple */
EOF
EOF
 
 
${SHELL} $infile full-exec-simple
${SHELL} $infile full-exec-simple
 
 
cat << EOF
cat << EOF
/* end full-exec-simple */
/* end full-exec-simple */
 
 
      ++ CPU_INSN_COUNT (current_cpu);
      ++ CPU_INSN_COUNT (current_cpu);
    }
    }
  while (0 /*CPU_RUNNING_P (current_cpu)*/);
  while (0 /*CPU_RUNNING_P (current_cpu)*/);
}
}
 
 
#undef FAST_P
#undef FAST_P
 
 
EOF
EOF
 
 
####################################
####################################
 
 
# Simple engine: fast version.
# Simple engine: fast version.
# ??? A somewhat dubious effort, but for completeness' sake.
# ??? A somewhat dubious effort, but for completeness' sake.
 
 
if [ x$fast = xyes ] ; then
if [ x$fast = xyes ] ; then
 
 
    cat << EOF
    cat << EOF
 
 
#define FAST_P 1
#define FAST_P 1
 
 
FIXME: "fast simple version unimplemented, delete -fast arg to genmloop.sh."
FIXME: "fast simple version unimplemented, delete -fast arg to genmloop.sh."
 
 
#undef FAST_P
#undef FAST_P
 
 
EOF
EOF
 
 
fi # -fast
fi # -fast
 
 
fi # simple engine
fi # simple engine
 
 
##########################################################################
##########################################################################
 
 
# Non-parallel scache engine: lookup insn in scache, fetch if missing,
# Non-parallel scache engine: lookup insn in scache, fetch if missing,
# then execute it.
# then execute it.
 
 
if [ x$scache = xyes -a x$parallel = xno ] ; then
if [ x$scache = xyes -a x$parallel = xno ] ; then
 
 
    cat << EOF
    cat << EOF
 
 
static INLINE SCACHE *
static INLINE SCACHE *
@prefix@_scache_lookup (SIM_CPU *current_cpu, PCADDR vpc, SCACHE *scache,
@prefix@_scache_lookup (SIM_CPU *current_cpu, PCADDR vpc, SCACHE *scache,
                     unsigned int hash_mask, int FAST_P)
                     unsigned int hash_mask, int FAST_P)
{
{
  /* First step: look up current insn in hash table.  */
  /* First step: look up current insn in hash table.  */
  SCACHE *sc = scache + SCACHE_HASH_PC (vpc, hash_mask);
  SCACHE *sc = scache + SCACHE_HASH_PC (vpc, hash_mask);
 
 
  /* If the entry isn't the one we want (cache miss),
  /* If the entry isn't the one we want (cache miss),
     fetch and decode the instruction.  */
     fetch and decode the instruction.  */
  if (sc->argbuf.addr != vpc)
  if (sc->argbuf.addr != vpc)
    {
    {
      if (! FAST_P)
      if (! FAST_P)
        PROFILE_COUNT_SCACHE_MISS (current_cpu);
        PROFILE_COUNT_SCACHE_MISS (current_cpu);
 
 
/* begin extract-scache */
/* begin extract-scache */
EOF
EOF
 
 
${SHELL} $infile extract-scache
${SHELL} $infile extract-scache
 
 
cat << EOF
cat << EOF
/* end extract-scache */
/* end extract-scache */
    }
    }
  else if (! FAST_P)
  else if (! FAST_P)
    {
    {
      PROFILE_COUNT_SCACHE_HIT (current_cpu);
      PROFILE_COUNT_SCACHE_HIT (current_cpu);
      /* Make core access statistics come out right.
      /* Make core access statistics come out right.
         The size is a guess, but it's currently not used either.  */
         The size is a guess, but it's currently not used either.  */
      PROFILE_COUNT_CORE (current_cpu, vpc, 2, exec_map);
      PROFILE_COUNT_CORE (current_cpu, vpc, 2, exec_map);
    }
    }
 
 
  return sc;
  return sc;
}
}
 
 
#define FAST_P 0
#define FAST_P 0
 
 
void
void
@prefix@_engine_run_full (SIM_CPU *current_cpu)
@prefix@_engine_run_full (SIM_CPU *current_cpu)
{
{
  SIM_DESC current_state = CPU_STATE (current_cpu);
  SIM_DESC current_state = CPU_STATE (current_cpu);
  SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
  SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
  unsigned int hash_mask = CPU_SCACHE_HASH_MASK (current_cpu);
  unsigned int hash_mask = CPU_SCACHE_HASH_MASK (current_cpu);
  SEM_PC vpc;
  SEM_PC vpc;
 
 
EOF
EOF
 
 
# Any initialization code before looping starts.
# Any initialization code before looping starts.
# Note that this code may declare some locals.
# Note that this code may declare some locals.
${SHELL} $infile init
${SHELL} $infile init
 
 
cat << EOF
cat << EOF
 
 
  if (! CPU_IDESC_SEM_INIT_P (current_cpu))
  if (! CPU_IDESC_SEM_INIT_P (current_cpu))
    {
    {
#if ! WITH_SEM_SWITCH_FULL
#if ! WITH_SEM_SWITCH_FULL
      @prefix@_sem_init_idesc_table (current_cpu);
      @prefix@_sem_init_idesc_table (current_cpu);
#endif
#endif
      CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
      CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
    }
    }
 
 
  vpc = GET_H_PC ();
  vpc = GET_H_PC ();
 
 
  do
  do
    {
    {
      SCACHE *sc;
      SCACHE *sc;
 
 
      sc = @prefix@_scache_lookup (current_cpu, vpc, scache, hash_mask, FAST_P);
      sc = @prefix@_scache_lookup (current_cpu, vpc, scache, hash_mask, FAST_P);
 
 
/* begin full-exec-scache */
/* begin full-exec-scache */
EOF
EOF
 
 
${SHELL} $infile full-exec-scache
${SHELL} $infile full-exec-scache
 
 
cat << EOF
cat << EOF
/* end full-exec-scache */
/* end full-exec-scache */
 
 
      SET_H_PC (vpc);
      SET_H_PC (vpc);
 
 
      ++ CPU_INSN_COUNT (current_cpu);
      ++ CPU_INSN_COUNT (current_cpu);
    }
    }
  while (0 /*CPU_RUNNING_P (current_cpu)*/);
  while (0 /*CPU_RUNNING_P (current_cpu)*/);
}
}
 
 
#undef FAST_P
#undef FAST_P
 
 
EOF
EOF
 
 
####################################
####################################
 
 
# Non-parallel scache engine: fast version.
# Non-parallel scache engine: fast version.
 
 
if [ x$fast = xyes ] ; then
if [ x$fast = xyes ] ; then
 
 
    cat << EOF
    cat << EOF
 
 
#define FAST_P 1
#define FAST_P 1
 
 
void
void
@prefix@_engine_run_fast (SIM_CPU *current_cpu)
@prefix@_engine_run_fast (SIM_CPU *current_cpu)
{
{
  SIM_DESC current_state = CPU_STATE (current_cpu);
  SIM_DESC current_state = CPU_STATE (current_cpu);
  SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
  SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
  unsigned int hash_mask = CPU_SCACHE_HASH_MASK (current_cpu);
  unsigned int hash_mask = CPU_SCACHE_HASH_MASK (current_cpu);
  SEM_PC vpc;
  SEM_PC vpc;
 
 
EOF
EOF
 
 
# Any initialization code before looping starts.
# Any initialization code before looping starts.
# Note that this code may declare some locals.
# Note that this code may declare some locals.
${SHELL} $infile init
${SHELL} $infile init
 
 
cat << EOF
cat << EOF
 
 
  if (! CPU_IDESC_SEM_INIT_P (current_cpu))
  if (! CPU_IDESC_SEM_INIT_P (current_cpu))
    {
    {
#if WITH_SEM_SWITCH_FAST
#if WITH_SEM_SWITCH_FAST
#if defined (__GNUC__)
#if defined (__GNUC__)
/* ??? Later maybe paste sem-switch.c in when building mainloop.c.  */
/* ??? Later maybe paste sem-switch.c in when building mainloop.c.  */
#define DEFINE_LABELS
#define DEFINE_LABELS
#include "$switch"
#include "$switch"
#endif
#endif
#else
#else
      @prefix@_semf_init_idesc_table (current_cpu);
      @prefix@_semf_init_idesc_table (current_cpu);
#endif
#endif
      CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
      CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
    }
    }
 
 
  vpc = GET_H_PC ();
  vpc = GET_H_PC ();
 
 
  do
  do
    {
    {
      SCACHE *sc;
      SCACHE *sc;
 
 
      sc = @prefix@_scache_lookup (current_cpu, vpc, scache, hash_mask, FAST_P);
      sc = @prefix@_scache_lookup (current_cpu, vpc, scache, hash_mask, FAST_P);
 
 
/* begin fast-exec-scache */
/* begin fast-exec-scache */
EOF
EOF
 
 
${SHELL} $infile fast-exec-scache
${SHELL} $infile fast-exec-scache
 
 
cat << EOF
cat << EOF
/* end fast-exec-scache */
/* end fast-exec-scache */
 
 
      SET_H_PC (vpc);
      SET_H_PC (vpc);
 
 
      ++ CPU_INSN_COUNT (current_cpu);
      ++ CPU_INSN_COUNT (current_cpu);
    }
    }
  while (0 /*CPU_RUNNING_P (current_cpu)*/);
  while (0 /*CPU_RUNNING_P (current_cpu)*/);
}
}
 
 
#undef FAST_P
#undef FAST_P
 
 
EOF
EOF
 
 
fi # -fast
fi # -fast
 
 
fi # -scache && ! parallel
fi # -scache && ! parallel
 
 
##########################################################################
##########################################################################
 
 
# Parallel scache engine: lookup insn in scache, fetch if missing,
# Parallel scache engine: lookup insn in scache, fetch if missing,
# then execute it.
# then execute it.
# For the parallel case we give the target more flexibility.
# For the parallel case we give the target more flexibility.
 
 
if [ x$scache = xyes -a x$parallel != xno ] ; then
if [ x$scache = xyes -a x$parallel != xno ] ; then
 
 
    cat << EOF
    cat << EOF
 
 
static INLINE SCACHE *
static INLINE SCACHE *
@prefix@_scache_lookup (SIM_CPU *current_cpu, PCADDR vpc, SCACHE *scache,
@prefix@_scache_lookup (SIM_CPU *current_cpu, PCADDR vpc, SCACHE *scache,
                     unsigned int hash_mask, int FAST_P)
                     unsigned int hash_mask, int FAST_P)
{
{
  /* First step: look up current insn in hash table.  */
  /* First step: look up current insn in hash table.  */
  SCACHE *sc = scache + SCACHE_HASH_PC (vpc, hash_mask);
  SCACHE *sc = scache + SCACHE_HASH_PC (vpc, hash_mask);
 
 
  /* If the entry isn't the one we want (cache miss),
  /* If the entry isn't the one we want (cache miss),
     fetch and decode the instruction.  */
     fetch and decode the instruction.  */
  if (sc->argbuf.addr != vpc)
  if (sc->argbuf.addr != vpc)
    {
    {
      if (! FAST_P)
      if (! FAST_P)
        PROFILE_COUNT_SCACHE_MISS (current_cpu);
        PROFILE_COUNT_SCACHE_MISS (current_cpu);
 
 
#define SET_LAST_INSN_P(last_p) do { sc->last_insn_p = (last_p); } while (0)
#define SET_LAST_INSN_P(last_p) do { sc->last_insn_p = (last_p); } while (0)
/* begin extract-scache */
/* begin extract-scache */
EOF
EOF
 
 
${SHELL} $infile extract-scache
${SHELL} $infile extract-scache
 
 
cat << EOF
cat << EOF
/* end extract-scache */
/* end extract-scache */
#undef SET_LAST_INSN_P
#undef SET_LAST_INSN_P
    }
    }
  else if (! FAST_P)
  else if (! FAST_P)
    {
    {
      PROFILE_COUNT_SCACHE_HIT (current_cpu);
      PROFILE_COUNT_SCACHE_HIT (current_cpu);
      /* Make core access statistics come out right.
      /* Make core access statistics come out right.
         The size is a guess, but it's currently not used either.  */
         The size is a guess, but it's currently not used either.  */
      PROFILE_COUNT_CORE (current_cpu, vpc, 2, exec_map);
      PROFILE_COUNT_CORE (current_cpu, vpc, 2, exec_map);
    }
    }
 
 
  return sc;
  return sc;
}
}
 
 
#define FAST_P 0
#define FAST_P 0
 
 
void
void
@prefix@_engine_run_full (SIM_CPU *current_cpu)
@prefix@_engine_run_full (SIM_CPU *current_cpu)
{
{
  SIM_DESC current_state = CPU_STATE (current_cpu);
  SIM_DESC current_state = CPU_STATE (current_cpu);
  SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
  SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
  unsigned int hash_mask = CPU_SCACHE_HASH_MASK (current_cpu);
  unsigned int hash_mask = CPU_SCACHE_HASH_MASK (current_cpu);
  SEM_PC vpc;
  SEM_PC vpc;
 
 
EOF
EOF
 
 
# Any initialization code before looping starts.
# Any initialization code before looping starts.
# Note that this code may declare some locals.
# Note that this code may declare some locals.
${SHELL} $infile init
${SHELL} $infile init
 
 
if [ x$parallel = xread ] ; then
if [ x$parallel = xread ] ; then
cat << EOF
cat << EOF
#if defined (__GNUC__)
#if defined (__GNUC__)
  {
  {
    if (! CPU_IDESC_READ_INIT_P (current_cpu))
    if (! CPU_IDESC_READ_INIT_P (current_cpu))
      {
      {
/* ??? Later maybe paste read.c in when building mainloop.c.  */
/* ??? Later maybe paste read.c in when building mainloop.c.  */
#define DEFINE_LABELS
#define DEFINE_LABELS
#include "readx.c"
#include "readx.c"
        CPU_IDESC_READ_INIT_P (current_cpu) = 1;
        CPU_IDESC_READ_INIT_P (current_cpu) = 1;
      }
      }
  }
  }
#endif
#endif
 
 
EOF
EOF
fi
fi
 
 
cat << EOF
cat << EOF
 
 
  if (! CPU_IDESC_SEM_INIT_P (current_cpu))
  if (! CPU_IDESC_SEM_INIT_P (current_cpu))
    {
    {
#if ! WITH_SEM_SWITCH_FULL
#if ! WITH_SEM_SWITCH_FULL
      @prefix@_sem_init_idesc_table (current_cpu);
      @prefix@_sem_init_idesc_table (current_cpu);
#endif
#endif
      CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
      CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
    }
    }
 
 
  vpc = GET_H_PC ();
  vpc = GET_H_PC ();
 
 
  do
  do
    {
    {
/* begin full-exec-scache */
/* begin full-exec-scache */
EOF
EOF
 
 
${SHELL} $infile full-exec-scache
${SHELL} $infile full-exec-scache
 
 
cat << EOF
cat << EOF
/* end full-exec-scache */
/* end full-exec-scache */
    }
    }
  while (0 /*CPU_RUNNING_P (current_cpu)*/);
  while (0 /*CPU_RUNNING_P (current_cpu)*/);
}
}
 
 
#undef FAST_P
#undef FAST_P
 
 
EOF
EOF
 
 
####################################
####################################
 
 
# Parallel scache engine: fast version.
# Parallel scache engine: fast version.
 
 
if [ x$fast = xyes ] ; then
if [ x$fast = xyes ] ; then
 
 
    cat << EOF
    cat << EOF
 
 
#define FAST_P 1
#define FAST_P 1
 
 
void
void
@prefix@_engine_run_fast (SIM_CPU *current_cpu)
@prefix@_engine_run_fast (SIM_CPU *current_cpu)
{
{
  SIM_DESC current_state = CPU_STATE (current_cpu);
  SIM_DESC current_state = CPU_STATE (current_cpu);
  SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
  SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
  unsigned int hash_mask = CPU_SCACHE_HASH_MASK (current_cpu);
  unsigned int hash_mask = CPU_SCACHE_HASH_MASK (current_cpu);
  SEM_PC vpc;
  SEM_PC vpc;
  PAREXEC pbufs[MAX_PARALLEL_INSNS];
  PAREXEC pbufs[MAX_PARALLEL_INSNS];
  PAREXEC *par_exec;
  PAREXEC *par_exec;
 
 
EOF
EOF
 
 
# Any initialization code before looping starts.
# Any initialization code before looping starts.
# Note that this code may declare some locals.
# Note that this code may declare some locals.
${SHELL} $infile init
${SHELL} $infile init
 
 
if [ x$parallel = xread ] ; then
if [ x$parallel = xread ] ; then
cat << EOF
cat << EOF
 
 
#if defined (__GNUC__)
#if defined (__GNUC__)
  {
  {
    if (! CPU_IDESC_READ_INIT_P (current_cpu))
    if (! CPU_IDESC_READ_INIT_P (current_cpu))
      {
      {
/* ??? Later maybe paste read.c in when building mainloop.c.  */
/* ??? Later maybe paste read.c in when building mainloop.c.  */
#define DEFINE_LABELS
#define DEFINE_LABELS
#include "readx.c"
#include "readx.c"
        CPU_IDESC_READ_INIT_P (current_cpu) = 1;
        CPU_IDESC_READ_INIT_P (current_cpu) = 1;
      }
      }
  }
  }
#endif
#endif
 
 
EOF
EOF
fi
fi
 
 
cat << EOF
cat << EOF
 
 
  if (! CPU_IDESC_SEM_INIT_P (current_cpu))
  if (! CPU_IDESC_SEM_INIT_P (current_cpu))
    {
    {
#if WITH_SEM_SWITCH_FAST
#if WITH_SEM_SWITCH_FAST
#if defined (__GNUC__)
#if defined (__GNUC__)
/* ??? Later maybe paste sem-switch.c in when building mainloop.c.  */
/* ??? Later maybe paste sem-switch.c in when building mainloop.c.  */
#define DEFINE_LABELS
#define DEFINE_LABELS
#include "$switch"
#include "$switch"
#endif
#endif
#else
#else
      @prefix@_semf_init_idesc_table (current_cpu);
      @prefix@_semf_init_idesc_table (current_cpu);
#endif
#endif
      CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
      CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
    }
    }
 
 
  vpc = GET_H_PC ();
  vpc = GET_H_PC ();
 
 
  do
  do
    {
    {
/* begin fast-exec-scache */
/* begin fast-exec-scache */
EOF
EOF
 
 
${SHELL} $infile fast-exec-scache
${SHELL} $infile fast-exec-scache
 
 
cat << EOF
cat << EOF
/* end fast-exec-scache */
/* end fast-exec-scache */
    }
    }
  while (0 /*CPU_RUNNING_P (current_cpu)*/);
  while (0 /*CPU_RUNNING_P (current_cpu)*/);
}
}
 
 
#undef FAST_P
#undef FAST_P
 
 
EOF
EOF
 
 
fi # -fast
fi # -fast
 
 
fi # -scache && parallel
fi # -scache && parallel
 
 
##########################################################################
##########################################################################
 
 
# Compilation engine: lookup insn in scache, extract a pbb
# Compilation engine: lookup insn in scache, extract a pbb
# (pseudo-basic-block) if missing, then execute the pbb.
# (pseudo-basic-block) if missing, then execute the pbb.
# A "pbb" is a sequence of insns up to the next cti insn or until
# A "pbb" is a sequence of insns up to the next cti insn or until
# some prespecified maximum.
# some prespecified maximum.
# CTI: control transfer instruction.
# CTI: control transfer instruction.
 
 
if [ x$pbb = xyes ] ; then
if [ x$pbb = xyes ] ; then
 
 
    cat << EOF
    cat << EOF
 
 
/* Record address of cti terminating a pbb.  */
/* Record address of cti terminating a pbb.  */
#define SET_CTI_VPC(sc) do { _cti_sc = (sc); } while (0)
#define SET_CTI_VPC(sc) do { _cti_sc = (sc); } while (0)
/* Record number of [real] insns in pbb.  */
/* Record number of [real] insns in pbb.  */
#define SET_INSN_COUNT(n) do { _insn_count = (n); } while (0)
#define SET_INSN_COUNT(n) do { _insn_count = (n); } while (0)
 
 
/* Fetch and extract a pseudo-basic-block.
/* Fetch and extract a pseudo-basic-block.
   FAST_P is non-zero if no tracing/profiling/etc. is wanted.  */
   FAST_P is non-zero if no tracing/profiling/etc. is wanted.  */
 
 
INLINE SEM_PC
INLINE SEM_PC
@prefix@_pbb_begin (SIM_CPU *current_cpu, int FAST_P)
@prefix@_pbb_begin (SIM_CPU *current_cpu, int FAST_P)
{
{
  SEM_PC new_vpc;
  SEM_PC new_vpc;
  PCADDR pc;
  PCADDR pc;
  SCACHE *sc;
  SCACHE *sc;
  int max_insns = CPU_SCACHE_MAX_CHAIN_LENGTH (current_cpu);
  int max_insns = CPU_SCACHE_MAX_CHAIN_LENGTH (current_cpu);
 
 
  pc = GET_H_PC ();
  pc = GET_H_PC ();
 
 
  new_vpc = scache_lookup_or_alloc (current_cpu, pc, max_insns, &sc);
  new_vpc = scache_lookup_or_alloc (current_cpu, pc, max_insns, &sc);
  if (! new_vpc)
  if (! new_vpc)
    {
    {
      /* Leading '_' to avoid collision with mainloop.in.  */
      /* Leading '_' to avoid collision with mainloop.in.  */
      int _insn_count = 0;
      int _insn_count = 0;
      SCACHE *orig_sc = sc;
      SCACHE *orig_sc = sc;
      SCACHE *_cti_sc = NULL;
      SCACHE *_cti_sc = NULL;
      int slice_insns = CPU_MAX_SLICE_INSNS (current_cpu);
      int slice_insns = CPU_MAX_SLICE_INSNS (current_cpu);
 
 
      /* First figure out how many instructions to compile.
      /* First figure out how many instructions to compile.
         MAX_INSNS is the size of the allocated buffer, which includes space
         MAX_INSNS is the size of the allocated buffer, which includes space
         for before/after handlers if they're being used.
         for before/after handlers if they're being used.
         SLICE_INSNS is the maxinum number of real insns that can be
         SLICE_INSNS is the maxinum number of real insns that can be
         executed.  Zero means "as many as we want".  */
         executed.  Zero means "as many as we want".  */
      /* ??? max_insns is serving two incompatible roles.
      /* ??? max_insns is serving two incompatible roles.
         1) Number of slots available in scache buffer.
         1) Number of slots available in scache buffer.
         2) Number of real insns to execute.
         2) Number of real insns to execute.
         They're incompatible because there are virtual insns emitted too
         They're incompatible because there are virtual insns emitted too
         (chain,cti-chain,before,after handlers).  */
         (chain,cti-chain,before,after handlers).  */
 
 
      if (slice_insns == 1)
      if (slice_insns == 1)
        {
        {
          /* No need to worry about extra slots required for virtual insns
          /* No need to worry about extra slots required for virtual insns
             and parallel exec support because MAX_CHAIN_LENGTH is
             and parallel exec support because MAX_CHAIN_LENGTH is
             guaranteed to be big enough to execute at least 1 insn!  */
             guaranteed to be big enough to execute at least 1 insn!  */
          max_insns = 1;
          max_insns = 1;
        }
        }
      else
      else
        {
        {
          /* Allow enough slop so that while compiling insns, if max_insns > 0
          /* Allow enough slop so that while compiling insns, if max_insns > 0
             then there's guaranteed to be enough space to emit one real insn.
             then there's guaranteed to be enough space to emit one real insn.
             MAX_CHAIN_LENGTH is typically much longer than
             MAX_CHAIN_LENGTH is typically much longer than
             the normal number of insns between cti's anyway.  */
             the normal number of insns between cti's anyway.  */
          max_insns -= (1 /* one for the trailing chain insn */
          max_insns -= (1 /* one for the trailing chain insn */
                        + (FAST_P
                        + (FAST_P
                           ? 0
                           ? 0
                           : (1 + MAX_PARALLEL_INSNS) /* before+after */)
                           : (1 + MAX_PARALLEL_INSNS) /* before+after */)
                        + (MAX_PARALLEL_INSNS > 1
                        + (MAX_PARALLEL_INSNS > 1
                           ? (MAX_PARALLEL_INSNS * 2)
                           ? (MAX_PARALLEL_INSNS * 2)
                           : 0));
                           : 0));
 
 
          /* Account for before/after handlers.  */
          /* Account for before/after handlers.  */
          if (! FAST_P)
          if (! FAST_P)
            slice_insns *= 3;
            slice_insns *= 3;
 
 
          if (slice_insns > 0
          if (slice_insns > 0
              && slice_insns < max_insns)
              && slice_insns < max_insns)
            max_insns = slice_insns;
            max_insns = slice_insns;
        }
        }
 
 
      new_vpc = sc;
      new_vpc = sc;
 
 
      /* SC,PC must be updated to point passed the last entry used.
      /* SC,PC must be updated to point passed the last entry used.
         SET_CTI_VPC must be called if pbb is terminated by a cti.
         SET_CTI_VPC must be called if pbb is terminated by a cti.
         SET_INSN_COUNT must be called to record number of real insns in
         SET_INSN_COUNT must be called to record number of real insns in
         pbb [could be computed by us of course, extra cpu but perhaps
         pbb [could be computed by us of course, extra cpu but perhaps
         negligible enough].  */
         negligible enough].  */
 
 
/* begin extract-pbb */
/* begin extract-pbb */
EOF
EOF
 
 
${SHELL} $infile extract-pbb
${SHELL} $infile extract-pbb
 
 
cat << EOF
cat << EOF
/* end extract-pbb */
/* end extract-pbb */
 
 
      /* The last one is a pseudo-insn to link to the next chain.
      /* The last one is a pseudo-insn to link to the next chain.
         It is also used to record the insn count for this chain.  */
         It is also used to record the insn count for this chain.  */
      {
      {
        const IDESC *id;
        const IDESC *id;
 
 
        /* Was pbb terminated by a cti?  */
        /* Was pbb terminated by a cti?  */
        if (_cti_sc)
        if (_cti_sc)
          {
          {
            id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_CTI_CHAIN];
            id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_CTI_CHAIN];
          }
          }
        else
        else
          {
          {
            id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_CHAIN];
            id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_CHAIN];
          }
          }
        SEM_SET_CODE (&sc->argbuf, id, FAST_P);
        SEM_SET_CODE (&sc->argbuf, id, FAST_P);
        sc->argbuf.idesc = id;
        sc->argbuf.idesc = id;
        sc->argbuf.addr = pc;
        sc->argbuf.addr = pc;
        sc->argbuf.fields.chain.insn_count = _insn_count;
        sc->argbuf.fields.chain.insn_count = _insn_count;
        sc->argbuf.fields.chain.next = 0;
        sc->argbuf.fields.chain.next = 0;
        sc->argbuf.fields.chain.branch_target = 0;
        sc->argbuf.fields.chain.branch_target = 0;
        ++sc;
        ++sc;
      }
      }
 
 
      /* Update the pointer to the next free entry, may not have used as
      /* Update the pointer to the next free entry, may not have used as
         many entries as was asked for.  */
         many entries as was asked for.  */
      CPU_SCACHE_NEXT_FREE (current_cpu) = sc;
      CPU_SCACHE_NEXT_FREE (current_cpu) = sc;
      /* Record length of chain if profiling.
      /* Record length of chain if profiling.
         This includes virtual insns since they count against
         This includes virtual insns since they count against
         max_insns too.  */
         max_insns too.  */
      if (! FAST_P)
      if (! FAST_P)
        PROFILE_COUNT_SCACHE_CHAIN_LENGTH (current_cpu, sc - orig_sc);
        PROFILE_COUNT_SCACHE_CHAIN_LENGTH (current_cpu, sc - orig_sc);
    }
    }
 
 
  return new_vpc;
  return new_vpc;
}
}
 
 
/* Chain to the next block from a non-cti terminated previous block.  */
/* Chain to the next block from a non-cti terminated previous block.  */
 
 
INLINE SEM_PC
INLINE SEM_PC
@prefix@_pbb_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg)
@prefix@_pbb_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
{
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 
 
  PBB_UPDATE_INSN_COUNT (current_cpu, sem_arg);
  PBB_UPDATE_INSN_COUNT (current_cpu, sem_arg);
 
 
  SET_H_PC (abuf->addr);
  SET_H_PC (abuf->addr);
 
 
  /* If not running forever, exit back to main loop.  */
  /* If not running forever, exit back to main loop.  */
  if (CPU_MAX_SLICE_INSNS (current_cpu) != 0
  if (CPU_MAX_SLICE_INSNS (current_cpu) != 0
      /* Also exit back to main loop if there's an event.
      /* Also exit back to main loop if there's an event.
         Note that if CPU_MAX_SLICE_INSNS != 1, events won't get processed
         Note that if CPU_MAX_SLICE_INSNS != 1, events won't get processed
         at the "right" time, but then that was what was asked for.
         at the "right" time, but then that was what was asked for.
         There is no silver bullet for simulator engines.
         There is no silver bullet for simulator engines.
         ??? Clearly this needs a cleaner interface.
         ??? Clearly this needs a cleaner interface.
         At present it's just so Ctrl-C works.  */
         At present it's just so Ctrl-C works.  */
      || STATE_EVENTS (CPU_STATE (current_cpu))->work_pending)
      || STATE_EVENTS (CPU_STATE (current_cpu))->work_pending)
    CPU_RUNNING_P (current_cpu) = 0;
    CPU_RUNNING_P (current_cpu) = 0;
 
 
  /* If chained to next block, go straight to it.  */
  /* If chained to next block, go straight to it.  */
  if (abuf->fields.chain.next)
  if (abuf->fields.chain.next)
    return abuf->fields.chain.next;
    return abuf->fields.chain.next;
  /* See if next block has already been compiled.  */
  /* See if next block has already been compiled.  */
  abuf->fields.chain.next = scache_lookup (current_cpu, abuf->addr);
  abuf->fields.chain.next = scache_lookup (current_cpu, abuf->addr);
  if (abuf->fields.chain.next)
  if (abuf->fields.chain.next)
    return abuf->fields.chain.next;
    return abuf->fields.chain.next;
  /* Nope, so next insn is a virtual insn to invoke the compiler
  /* Nope, so next insn is a virtual insn to invoke the compiler
     (begin a pbb).  */
     (begin a pbb).  */
  return CPU_SCACHE_PBB_BEGIN (current_cpu);
  return CPU_SCACHE_PBB_BEGIN (current_cpu);
}
}
 
 
/* Chain to the next block from a cti terminated previous block.
/* Chain to the next block from a cti terminated previous block.
   BR_TYPE indicates whether the branch was taken and whether we can cache
   BR_TYPE indicates whether the branch was taken and whether we can cache
   the vpc of the branch target.
   the vpc of the branch target.
   NEW_PC is the target's branch address, and is only valid if
   NEW_PC is the target's branch address, and is only valid if
   BR_TYPE != SEM_BRANCH_UNTAKEN.  */
   BR_TYPE != SEM_BRANCH_UNTAKEN.  */
 
 
INLINE SEM_PC
INLINE SEM_PC
@prefix@_pbb_cti_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg,
@prefix@_pbb_cti_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg,
                     SEM_BRANCH_TYPE br_type, PCADDR new_pc)
                     SEM_BRANCH_TYPE br_type, PCADDR new_pc)
{
{
  SEM_PC *new_vpc_ptr;
  SEM_PC *new_vpc_ptr;
 
 
  PBB_UPDATE_INSN_COUNT (current_cpu, sem_arg);
  PBB_UPDATE_INSN_COUNT (current_cpu, sem_arg);
 
 
  /* If not running forever, exit back to main loop.  */
  /* If not running forever, exit back to main loop.  */
  if (CPU_MAX_SLICE_INSNS (current_cpu) != 0
  if (CPU_MAX_SLICE_INSNS (current_cpu) != 0
      /* Also exit back to main loop if there's an event.
      /* Also exit back to main loop if there's an event.
         Note that if CPU_MAX_SLICE_INSNS != 1, events won't get processed
         Note that if CPU_MAX_SLICE_INSNS != 1, events won't get processed
         at the "right" time, but then that was what was asked for.
         at the "right" time, but then that was what was asked for.
         There is no silver bullet for simulator engines.
         There is no silver bullet for simulator engines.
         ??? Clearly this needs a cleaner interface.
         ??? Clearly this needs a cleaner interface.
         At present it's just so Ctrl-C works.  */
         At present it's just so Ctrl-C works.  */
      || STATE_EVENTS (CPU_STATE (current_cpu))->work_pending)
      || STATE_EVENTS (CPU_STATE (current_cpu))->work_pending)
    CPU_RUNNING_P (current_cpu) = 0;
    CPU_RUNNING_P (current_cpu) = 0;
 
 
  /* Restart compiler if we branched to an uncacheable address
  /* Restart compiler if we branched to an uncacheable address
     (e.g. "j reg").  */
     (e.g. "j reg").  */
  if (br_type == SEM_BRANCH_UNCACHEABLE)
  if (br_type == SEM_BRANCH_UNCACHEABLE)
    {
    {
      SET_H_PC (new_pc);
      SET_H_PC (new_pc);
      return CPU_SCACHE_PBB_BEGIN (current_cpu);
      return CPU_SCACHE_PBB_BEGIN (current_cpu);
    }
    }
 
 
  /* If branch wasn't taken, update the pc and set BR_ADDR_PTR to our
  /* If branch wasn't taken, update the pc and set BR_ADDR_PTR to our
     next chain ptr.  */
     next chain ptr.  */
  if (br_type == SEM_BRANCH_UNTAKEN)
  if (br_type == SEM_BRANCH_UNTAKEN)
    {
    {
      ARGBUF *abuf = SEM_ARGBUF (sem_arg);
      ARGBUF *abuf = SEM_ARGBUF (sem_arg);
      new_pc = abuf->addr;
      new_pc = abuf->addr;
      SET_H_PC (new_pc);
      SET_H_PC (new_pc);
      new_vpc_ptr = &abuf->fields.chain.next;
      new_vpc_ptr = &abuf->fields.chain.next;
    }
    }
  else
  else
    {
    {
      ARGBUF *abuf = SEM_ARGBUF (sem_arg);
      ARGBUF *abuf = SEM_ARGBUF (sem_arg);
      SET_H_PC (new_pc);
      SET_H_PC (new_pc);
      new_vpc_ptr = &abuf->fields.chain.branch_target;
      new_vpc_ptr = &abuf->fields.chain.branch_target;
    }
    }
 
 
  /* If chained to next block, go straight to it.  */
  /* If chained to next block, go straight to it.  */
  if (*new_vpc_ptr)
  if (*new_vpc_ptr)
    return *new_vpc_ptr;
    return *new_vpc_ptr;
  /* See if next block has already been compiled.  */
  /* See if next block has already been compiled.  */
  *new_vpc_ptr = scache_lookup (current_cpu, new_pc);
  *new_vpc_ptr = scache_lookup (current_cpu, new_pc);
  if (*new_vpc_ptr)
  if (*new_vpc_ptr)
    return *new_vpc_ptr;
    return *new_vpc_ptr;
  /* Nope, so next insn is a virtual insn to invoke the compiler
  /* Nope, so next insn is a virtual insn to invoke the compiler
     (begin a pbb).  */
     (begin a pbb).  */
  return CPU_SCACHE_PBB_BEGIN (current_cpu);
  return CPU_SCACHE_PBB_BEGIN (current_cpu);
}
}
 
 
/* x-before handler.
/* x-before handler.
   This is called before each insn.  */
   This is called before each insn.  */
 
 
void
void
@prefix@_pbb_before (SIM_CPU *current_cpu, SCACHE *sc)
@prefix@_pbb_before (SIM_CPU *current_cpu, SCACHE *sc)
{
{
  SEM_ARG sem_arg = sc;
  SEM_ARG sem_arg = sc;
  const ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  const ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  int first_p = abuf->fields.before.first_p;
  int first_p = abuf->fields.before.first_p;
  const ARGBUF *cur_abuf = SEM_ARGBUF (sc + 1);
  const ARGBUF *cur_abuf = SEM_ARGBUF (sc + 1);
  const IDESC *cur_idesc = cur_abuf->idesc;
  const IDESC *cur_idesc = cur_abuf->idesc;
  PCADDR pc = cur_abuf->addr;
  PCADDR pc = cur_abuf->addr;
 
 
  if (ARGBUF_PROFILE_P (cur_abuf))
  if (ARGBUF_PROFILE_P (cur_abuf))
    PROFILE_COUNT_INSN (current_cpu, pc, cur_idesc->num);
    PROFILE_COUNT_INSN (current_cpu, pc, cur_idesc->num);
 
 
  /* If this isn't the first insn, finish up the previous one.  */
  /* If this isn't the first insn, finish up the previous one.  */
 
 
  if (! first_p)
  if (! first_p)
    {
    {
      if (PROFILE_MODEL_P (current_cpu))
      if (PROFILE_MODEL_P (current_cpu))
        {
        {
          const SEM_ARG prev_sem_arg = sc - 1;
          const SEM_ARG prev_sem_arg = sc - 1;
          const ARGBUF *prev_abuf = SEM_ARGBUF (prev_sem_arg);
          const ARGBUF *prev_abuf = SEM_ARGBUF (prev_sem_arg);
          const IDESC *prev_idesc = prev_abuf->idesc;
          const IDESC *prev_idesc = prev_abuf->idesc;
          int cycles;
          int cycles;
 
 
          /* ??? May want to measure all insns if doing insn tracing.  */
          /* ??? May want to measure all insns if doing insn tracing.  */
          if (ARGBUF_PROFILE_P (prev_abuf))
          if (ARGBUF_PROFILE_P (prev_abuf))
            {
            {
              cycles = (*prev_idesc->timing->model_fn) (current_cpu, prev_sem_arg);
              cycles = (*prev_idesc->timing->model_fn) (current_cpu, prev_sem_arg);
              @prefix@_model_insn_after (current_cpu, 0 /*last_p*/, cycles);
              @prefix@_model_insn_after (current_cpu, 0 /*last_p*/, cycles);
            }
            }
        }
        }
 
 
      TRACE_INSN_FINI (current_cpu, cur_abuf, 0 /*last_p*/);
      TRACE_INSN_FINI (current_cpu, cur_abuf, 0 /*last_p*/);
    }
    }
 
 
  /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}.  */
  /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}.  */
  if (PROFILE_MODEL_P (current_cpu)
  if (PROFILE_MODEL_P (current_cpu)
      && ARGBUF_PROFILE_P (cur_abuf))
      && ARGBUF_PROFILE_P (cur_abuf))
    @prefix@_model_insn_before (current_cpu, first_p);
    @prefix@_model_insn_before (current_cpu, first_p);
 
 
  TRACE_INSN_INIT (current_cpu, cur_abuf, first_p);
  TRACE_INSN_INIT (current_cpu, cur_abuf, first_p);
  TRACE_INSN (current_cpu, cur_idesc->idata, cur_abuf, pc);
  TRACE_INSN (current_cpu, cur_idesc->idata, cur_abuf, pc);
}
}
 
 
/* x-after handler.
/* x-after handler.
   This is called after a serial insn or at the end of a group of parallel
   This is called after a serial insn or at the end of a group of parallel
   insns.  */
   insns.  */
 
 
void
void
@prefix@_pbb_after (SIM_CPU *current_cpu, SCACHE *sc)
@prefix@_pbb_after (SIM_CPU *current_cpu, SCACHE *sc)
{
{
  SEM_ARG sem_arg = sc;
  SEM_ARG sem_arg = sc;
  const ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  const ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  const SEM_ARG prev_sem_arg = sc - 1;
  const SEM_ARG prev_sem_arg = sc - 1;
  const ARGBUF *prev_abuf = SEM_ARGBUF (prev_sem_arg);
  const ARGBUF *prev_abuf = SEM_ARGBUF (prev_sem_arg);
 
 
  /* ??? May want to measure all insns if doing insn tracing.  */
  /* ??? May want to measure all insns if doing insn tracing.  */
  if (PROFILE_MODEL_P (current_cpu)
  if (PROFILE_MODEL_P (current_cpu)
      && ARGBUF_PROFILE_P (prev_abuf))
      && ARGBUF_PROFILE_P (prev_abuf))
    {
    {
      const IDESC *prev_idesc = prev_abuf->idesc;
      const IDESC *prev_idesc = prev_abuf->idesc;
      int cycles;
      int cycles;
 
 
      cycles = (*prev_idesc->timing->model_fn) (current_cpu, prev_sem_arg);
      cycles = (*prev_idesc->timing->model_fn) (current_cpu, prev_sem_arg);
      @prefix@_model_insn_after (current_cpu, 1 /*last_p*/, cycles);
      @prefix@_model_insn_after (current_cpu, 1 /*last_p*/, cycles);
    }
    }
  TRACE_INSN_FINI (current_cpu, prev_abuf, 1 /*last_p*/);
  TRACE_INSN_FINI (current_cpu, prev_abuf, 1 /*last_p*/);
}
}
 
 
#define FAST_P 0
#define FAST_P 0
 
 
void
void
@prefix@_engine_run_full (SIM_CPU *current_cpu)
@prefix@_engine_run_full (SIM_CPU *current_cpu)
{
{
  SIM_DESC current_state = CPU_STATE (current_cpu);
  SIM_DESC current_state = CPU_STATE (current_cpu);
  SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
  SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
  /* virtual program counter */
  /* virtual program counter */
  SEM_PC vpc;
  SEM_PC vpc;
#if WITH_SEM_SWITCH_FULL
#if WITH_SEM_SWITCH_FULL
  /* For communication between cti's and cti-chain.  */
  /* For communication between cti's and cti-chain.  */
  SEM_BRANCH_TYPE pbb_br_type;
  SEM_BRANCH_TYPE pbb_br_type;
  PCADDR pbb_br_npc;
  PCADDR pbb_br_npc;
#endif
#endif
 
 
EOF
EOF
 
 
case x$parallel in
case x$parallel in
xread | xwrite)
xread | xwrite)
    cat << EOF
    cat << EOF
  PAREXEC pbufs[MAX_PARALLEL_INSNS];
  PAREXEC pbufs[MAX_PARALLEL_INSNS];
  PAREXEC *par_exec = &pbufs[0];
  PAREXEC *par_exec = &pbufs[0];
 
 
EOF
EOF
    ;;
    ;;
esac
esac
 
 
# Any initialization code before looping starts.
# Any initialization code before looping starts.
# Note that this code may declare some locals.
# Note that this code may declare some locals.
${SHELL} $infile init
${SHELL} $infile init
 
 
cat << EOF
cat << EOF
 
 
  if (! CPU_IDESC_SEM_INIT_P (current_cpu))
  if (! CPU_IDESC_SEM_INIT_P (current_cpu))
    {
    {
      /* ??? 'twould be nice to move this up a level and only call it once.
      /* ??? 'twould be nice to move this up a level and only call it once.
         On the other hand, in the "let's go fast" case the test is only done
         On the other hand, in the "let's go fast" case the test is only done
         once per pbb (since we only return to the main loop at the end of
         once per pbb (since we only return to the main loop at the end of
         a pbb).  And in the "let's run until we're done" case we don't return
         a pbb).  And in the "let's run until we're done" case we don't return
         until the program exits.  */
         until the program exits.  */
 
 
#if WITH_SEM_SWITCH_FULL
#if WITH_SEM_SWITCH_FULL
#if defined (__GNUC__)
#if defined (__GNUC__)
/* ??? Later maybe paste sem-switch.c in when building mainloop.c.  */
/* ??? Later maybe paste sem-switch.c in when building mainloop.c.  */
#define DEFINE_LABELS
#define DEFINE_LABELS
#include "$switch"
#include "$switch"
#endif
#endif
#else
#else
      @prefix@_sem_init_idesc_table (current_cpu);
      @prefix@_sem_init_idesc_table (current_cpu);
#endif
#endif
 
 
      /* Initialize the "begin (compile) a pbb" virtual insn.  */
      /* Initialize the "begin (compile) a pbb" virtual insn.  */
      vpc = CPU_SCACHE_PBB_BEGIN (current_cpu);
      vpc = CPU_SCACHE_PBB_BEGIN (current_cpu);
      SEM_SET_FULL_CODE (SEM_ARGBUF (vpc),
      SEM_SET_FULL_CODE (SEM_ARGBUF (vpc),
                         & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN]);
                         & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN]);
      vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN];
      vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN];
 
 
      CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
      CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
    }
    }
 
 
  CPU_RUNNING_P (current_cpu) = 1;
  CPU_RUNNING_P (current_cpu) = 1;
  /* ??? In the case where we're returning to the main loop after every
  /* ??? In the case where we're returning to the main loop after every
     pbb we don't want to call pbb_begin each time (which hashes on the pc
     pbb we don't want to call pbb_begin each time (which hashes on the pc
     and does a table lookup).  A way to speed this up is to save vpc
     and does a table lookup).  A way to speed this up is to save vpc
     between calls.  */
     between calls.  */
  vpc = @prefix@_pbb_begin (current_cpu, FAST_P);
  vpc = @prefix@_pbb_begin (current_cpu, FAST_P);
 
 
  do
  do
    {
    {
/* begin full-exec-pbb */
/* begin full-exec-pbb */
EOF
EOF
 
 
${SHELL} $infile full-exec-pbb
${SHELL} $infile full-exec-pbb
 
 
cat << EOF
cat << EOF
/* end full-exec-pbb */
/* end full-exec-pbb */
    }
    }
  while (CPU_RUNNING_P (current_cpu));
  while (CPU_RUNNING_P (current_cpu));
}
}
 
 
#undef FAST_P
#undef FAST_P
 
 
EOF
EOF
 
 
####################################
####################################
 
 
# Compile engine: fast version.
# Compile engine: fast version.
 
 
if [ x$fast = xyes ] ; then
if [ x$fast = xyes ] ; then
 
 
    cat << EOF
    cat << EOF
 
 
#define FAST_P 1
#define FAST_P 1
 
 
void
void
@prefix@_engine_run_fast (SIM_CPU *current_cpu)
@prefix@_engine_run_fast (SIM_CPU *current_cpu)
{
{
  SIM_DESC current_state = CPU_STATE (current_cpu);
  SIM_DESC current_state = CPU_STATE (current_cpu);
  SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
  SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
  /* virtual program counter */
  /* virtual program counter */
  SEM_PC vpc;
  SEM_PC vpc;
#if WITH_SEM_SWITCH_FAST
#if WITH_SEM_SWITCH_FAST
  /* For communication between cti's and cti-chain.  */
  /* For communication between cti's and cti-chain.  */
  SEM_BRANCH_TYPE pbb_br_type;
  SEM_BRANCH_TYPE pbb_br_type;
  PCADDR pbb_br_npc;
  PCADDR pbb_br_npc;
#endif
#endif
 
 
EOF
EOF
 
 
case x$parallel in
case x$parallel in
xread | xwrite)
xread | xwrite)
    cat << EOF
    cat << EOF
  PAREXEC pbufs[MAX_PARALLEL_INSNS];
  PAREXEC pbufs[MAX_PARALLEL_INSNS];
  PAREXEC *par_exec = &pbufs[0];
  PAREXEC *par_exec = &pbufs[0];
 
 
EOF
EOF
    ;;
    ;;
esac
esac
 
 
# Any initialization code before looping starts.
# Any initialization code before looping starts.
# Note that this code may declare some locals.
# Note that this code may declare some locals.
${SHELL} $infile init
${SHELL} $infile init
 
 
cat << EOF
cat << EOF
 
 
  if (! CPU_IDESC_SEM_INIT_P (current_cpu))
  if (! CPU_IDESC_SEM_INIT_P (current_cpu))
    {
    {
      /* ??? 'twould be nice to move this up a level and only call it once.
      /* ??? 'twould be nice to move this up a level and only call it once.
         On the other hand, in the "let's go fast" case the test is only done
         On the other hand, in the "let's go fast" case the test is only done
         once per pbb (since we only return to the main loop at the end of
         once per pbb (since we only return to the main loop at the end of
         a pbb).  And in the "let's run until we're done" case we don't return
         a pbb).  And in the "let's run until we're done" case we don't return
         until the program exits.  */
         until the program exits.  */
 
 
#if WITH_SEM_SWITCH_FAST
#if WITH_SEM_SWITCH_FAST
#if defined (__GNUC__)
#if defined (__GNUC__)
/* ??? Later maybe paste sem-switch.c in when building mainloop.c.  */
/* ??? Later maybe paste sem-switch.c in when building mainloop.c.  */
#define DEFINE_LABELS
#define DEFINE_LABELS
#include "$switch"
#include "$switch"
#endif
#endif
#else
#else
      @prefix@_semf_init_idesc_table (current_cpu);
      @prefix@_semf_init_idesc_table (current_cpu);
#endif
#endif
 
 
      /* Initialize the "begin (compile) a pbb" virtual insn.  */
      /* Initialize the "begin (compile) a pbb" virtual insn.  */
      vpc = CPU_SCACHE_PBB_BEGIN (current_cpu);
      vpc = CPU_SCACHE_PBB_BEGIN (current_cpu);
      SEM_SET_FAST_CODE (SEM_ARGBUF (vpc),
      SEM_SET_FAST_CODE (SEM_ARGBUF (vpc),
                         & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN]);
                         & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN]);
      vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN];
      vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN];
 
 
      CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
      CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
    }
    }
 
 
  CPU_RUNNING_P (current_cpu) = 1;
  CPU_RUNNING_P (current_cpu) = 1;
  /* ??? In the case where we're returning to the main loop after every
  /* ??? In the case where we're returning to the main loop after every
     pbb we don't want to call pbb_begin each time (which hashes on the pc
     pbb we don't want to call pbb_begin each time (which hashes on the pc
     and does a table lookup).  A way to speed this up is to save vpc
     and does a table lookup).  A way to speed this up is to save vpc
     between calls.  */
     between calls.  */
  vpc = @prefix@_pbb_begin (current_cpu, FAST_P);
  vpc = @prefix@_pbb_begin (current_cpu, FAST_P);
 
 
  do
  do
    {
    {
/* begin fast-exec-pbb */
/* begin fast-exec-pbb */
EOF
EOF
 
 
${SHELL} $infile fast-exec-pbb
${SHELL} $infile fast-exec-pbb
 
 
cat << EOF
cat << EOF
/* end fast-exec-pbb */
/* end fast-exec-pbb */
    }
    }
  while (CPU_RUNNING_P (current_cpu));
  while (CPU_RUNNING_P (current_cpu));
}
}
 
 
#undef FAST_P
#undef FAST_P
 
 
EOF
EOF
fi # -fast
fi # -fast
 
 
fi # -pbb
fi # -pbb
 
 
# Expand @..@ macros appearing in tmp-mloop-{pid}.cin.
# Expand @..@ macros appearing in tmp-mloop-{pid}.cin.
sed \
sed \
  -e "s/@cpu@/$cpu/g" -e "s/@CPU@/$CPU/g" \
  -e "s/@cpu@/$cpu/g" -e "s/@CPU@/$CPU/g" \
  -e "s/@prefix@/$prefix/g" -e "s/@PREFIX@/$PREFIX/g" < tmp-mloop-$$.cin > mloop${outsuffix}.cin
  -e "s/@prefix@/$prefix/g" -e "s/@PREFIX@/$PREFIX/g" < tmp-mloop-$$.cin > mloop${outsuffix}.cin
rc=$?
rc=$?
rm -f tmp-mloop-$$.cin
rm -f tmp-mloop-$$.cin
 
 
exit $rc
exit $rc
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.