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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [frv/] [Makefile.in] - Diff between revs 834 and 842

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# Makefile template for Configure for the frv simulator
# Makefile template for Configure for the frv simulator
# Copyright (C) 1998, 1999, 2000, 2001, 2003, 2007, 2008, 2009, 2010
# Copyright (C) 1998, 1999, 2000, 2001, 2003, 2007, 2008, 2009, 2010
# Free Software Foundation, Inc.
# Free Software Foundation, Inc.
# Contributed by Red Hat.
# Contributed by Red Hat.
#
#
# This program is free software; you can redistribute it and/or modify
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
# (at your option) any later version.
#
#
# This program is distributed in the hope that it will be useful,
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
# GNU General Public License for more details.
#
#
# You should have received a copy of the GNU General Public License
# You should have received a copy of the GNU General Public License
# along with this program.  If not, see .
# along with this program.  If not, see .
## COMMON_PRE_CONFIG_FRAG
## COMMON_PRE_CONFIG_FRAG
FRV_OBJS = frv.o cpu.o decode.o sem.o model.o mloop.o cgen-par.o
FRV_OBJS = frv.o cpu.o decode.o sem.o model.o mloop.o cgen-par.o
CONFIG_DEVICES = dv-sockser.o
CONFIG_DEVICES = dv-sockser.o
CONFIG_DEVICES =
CONFIG_DEVICES =
SIM_OBJS = \
SIM_OBJS = \
        $(SIM_NEW_COMMON_OBJS) \
        $(SIM_NEW_COMMON_OBJS) \
        sim-cpu.o \
        sim-cpu.o \
        sim-hload.o \
        sim-hload.o \
        sim-hrw.o \
        sim-hrw.o \
        sim-model.o \
        sim-model.o \
        sim-reg.o \
        sim-reg.o \
        cgen-utils.o cgen-trace.o cgen-scache.o cgen-fpu.o cgen-accfp.o \
        cgen-utils.o cgen-trace.o cgen-scache.o cgen-fpu.o cgen-accfp.o \
        cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
        cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
        sim-if.o arch.o \
        sim-if.o arch.o \
        $(FRV_OBJS) \
        $(FRV_OBJS) \
        traps.o interrupts.o memory.o cache.o pipeline.o \
        traps.o interrupts.o memory.o cache.o pipeline.o \
        profile.o profile-fr400.o profile-fr450.o profile-fr500.o profile-fr550.o options.o \
        profile.o profile-fr400.o profile-fr450.o profile-fr500.o profile-fr550.o options.o \
        devices.o reset.o registers.o \
        devices.o reset.o registers.o \
        $(CONFIG_DEVICES)
        $(CONFIG_DEVICES)
# Extra headers included by sim-main.h.
# Extra headers included by sim-main.h.
SIM_EXTRA_DEPS = \
SIM_EXTRA_DEPS = \
        $(CGEN_INCLUDE_DEPS) \
        $(CGEN_INCLUDE_DEPS) \
        arch.h cpuall.h frv-sim.h $(srcdir)/../../opcodes/frv-desc.h cache.h \
        arch.h cpuall.h frv-sim.h $(srcdir)/../../opcodes/frv-desc.h cache.h \
        registers.h profile.h \
        registers.h profile.h \
        $(sim-options_h)
        $(sim-options_h)
SIM_EXTRA_CFLAGS = @sim_trapdump@
SIM_EXTRA_CFLAGS = @sim_trapdump@
SIM_RUN_OBJS = nrun.o
SIM_RUN_OBJS = nrun.o
SIM_EXTRA_CLEAN = frv-clean
SIM_EXTRA_CLEAN = frv-clean
# This selects the frv newlib/libgloss syscall definitions.
# This selects the frv newlib/libgloss syscall definitions.
NL_TARGET = -DNL_TARGET_frv
NL_TARGET = -DNL_TARGET_frv
## COMMON_POST_CONFIG_FRAG
## COMMON_POST_CONFIG_FRAG
arch = frv
arch = frv
arch.o: arch.c $(SIM_MAIN_DEPS)
arch.o: arch.c $(SIM_MAIN_DEPS)
devices.o: devices.c $(SIM_MAIN_DEPS)
devices.o: devices.c $(SIM_MAIN_DEPS)
# FRV objs
# FRV objs
FRVBF_INCLUDE_DEPS = \
FRVBF_INCLUDE_DEPS = \
        $(CGEN_MAIN_CPU_DEPS) \
        $(CGEN_MAIN_CPU_DEPS) \
        $(SIM_EXTRA_DEPS) \
        $(SIM_EXTRA_DEPS) \
        cpu.h decode.h eng.h
        cpu.h decode.h eng.h
frv.o: frv.c $(FRVBF_INCLUDE_DEPS)
frv.o: frv.c $(FRVBF_INCLUDE_DEPS)
traps.o: traps.c $(FRVBF_INCLUDE_DEPS)
traps.o: traps.c $(FRVBF_INCLUDE_DEPS)
pipeline.o: pipeline.c $(FRVBF_INCLUDE_DEPS)
pipeline.o: pipeline.c $(FRVBF_INCLUDE_DEPS)
interrupts.o: interrupts.c $(FRVBF_INCLUDE_DEPS)
interrupts.o: interrupts.c $(FRVBF_INCLUDE_DEPS)
memory.o: memory.c $(FRVBF_INCLUDE_DEPS)
memory.o: memory.c $(FRVBF_INCLUDE_DEPS)
cache.o: cache.c $(FRVBF_INCLUDE_DEPS)
cache.o: cache.c $(FRVBF_INCLUDE_DEPS)
options.o: options.c $(FRVBF_INCLUDE_DEPS)
options.o: options.c $(FRVBF_INCLUDE_DEPS)
reset.o: reset.c $(FRVBF_INCLUDE_DEPS)
reset.o: reset.c $(FRVBF_INCLUDE_DEPS)
registers.o: registers.c $(FRVBF_INCLUDE_DEPS)
registers.o: registers.c $(FRVBF_INCLUDE_DEPS)
profile.o: profile.c profile-fr400.h profile-fr500.h profile-fr550.h $(FRVBF_INCLUDE_DEPS)
profile.o: profile.c profile-fr400.h profile-fr500.h profile-fr550.h $(FRVBF_INCLUDE_DEPS)
profile-fr400.o: profile-fr400.c profile-fr400.h $(FRVBF_INCLUDE_DEPS)
profile-fr400.o: profile-fr400.c profile-fr400.h $(FRVBF_INCLUDE_DEPS)
profile-fr450.o: profile-fr450.c $(FRVBF_INCLUDE_DEPS)
profile-fr450.o: profile-fr450.c $(FRVBF_INCLUDE_DEPS)
profile-fr500.o: profile-fr500.c profile-fr500.h $(FRVBF_INCLUDE_DEPS)
profile-fr500.o: profile-fr500.c profile-fr500.h $(FRVBF_INCLUDE_DEPS)
profile-fr550.o: profile-fr550.c profile-fr550.h $(FRVBF_INCLUDE_DEPS)
profile-fr550.o: profile-fr550.c profile-fr550.h $(FRVBF_INCLUDE_DEPS)
sim-if.o: sim-if.c $(FRVBF_INCLUDE_DEPS) $(srcdir)/../common/sim-core.h eng.h
sim-if.o: sim-if.c $(FRVBF_INCLUDE_DEPS) $(srcdir)/../common/sim-core.h eng.h
# FIXME: Use of `mono' is wip.
# FIXME: Use of `mono' is wip.
mloop.c eng.h: stamp-mloop
mloop.c eng.h: stamp-mloop
stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
        $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
        $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
                -mono -scache -parallel-generic-write -parallel-only \
                -mono -scache -parallel-generic-write -parallel-only \
                -cpu frvbf -infile $(srcdir)/mloop.in
                -cpu frvbf -infile $(srcdir)/mloop.in
        $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
        $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
        $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
        $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
        touch stamp-mloop
        touch stamp-mloop
mloop.o: mloop.c $(FRVBF_INCLUDE_DEPS)
mloop.o: mloop.c $(FRVBF_INCLUDE_DEPS)
cpu.o: cpu.c $(FRVBF_INCLUDE_DEPS)
cpu.o: cpu.c $(FRVBF_INCLUDE_DEPS)
decode.o: decode.c $(FRVBF_INCLUDE_DEPS)
decode.o: decode.c $(FRVBF_INCLUDE_DEPS)
sem.o: sem.c $(FRVBF_INCLUDE_DEPS)
sem.o: sem.c $(FRVBF_INCLUDE_DEPS)
model.o: model.c $(FRVBF_INCLUDE_DEPS)
model.o: model.c $(FRVBF_INCLUDE_DEPS)
frv-clean:
frv-clean:
        rm -f mloop.c eng.h stamp-mloop
        rm -f mloop.c eng.h stamp-mloop
        rm -f tmp-*
        rm -f tmp-*
        rm -f stamp-arch stamp-cpu
        rm -f stamp-arch stamp-cpu
# cgen support, enable with --enable-cgen-maint
# cgen support, enable with --enable-cgen-maint
CGEN_MAINT = ; @true
CGEN_MAINT = ; @true
# The following line is commented in or out depending upon --enable-cgen-maint.
# The following line is commented in or out depending upon --enable-cgen-maint.
@CGEN_MAINT@CGEN_MAINT =
@CGEN_MAINT@CGEN_MAINT =
stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srcdir)/../../cpu/frv.cpu
stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srcdir)/../../cpu/frv.cpu
        $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
        $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
          archfile=$(srcdir)/../../cpu/frv.cpu \
          archfile=$(srcdir)/../../cpu/frv.cpu \
          FLAGS="with-scache"
          FLAGS="with-scache"
        touch stamp-arch
        touch stamp-arch
arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
#       @true
#       @true
stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srcdir)/../../cpu/frv.cpu
stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srcdir)/../../cpu/frv.cpu
        $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
        $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
          cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple SUFFIX= \
          cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple SUFFIX= \
          archfile=$(srcdir)/../../cpu/frv.cpu \
          archfile=$(srcdir)/../../cpu/frv.cpu \
          FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" \
          FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" \
          EXTRAFILES="$(CGEN_CPU_SEM)"
          EXTRAFILES="$(CGEN_CPU_SEM)"
        touch stamp-cpu
        touch stamp-cpu
cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
#       @true
#       @true
 
 

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