# Makefile template for Configure for the frv simulator
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# Makefile template for Configure for the frv simulator
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# Copyright (C) 1998, 1999, 2000, 2001, 2003, 2007, 2008, 2009, 2010
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# Copyright (C) 1998, 1999, 2000, 2001, 2003, 2007, 2008, 2009, 2010
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# Free Software Foundation, Inc.
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# Free Software Foundation, Inc.
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# Contributed by Red Hat.
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# Contributed by Red Hat.
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#
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#
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# This program is free software; you can redistribute it and/or modify
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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# (at your option) any later version.
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#
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#
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# This program is distributed in the hope that it will be useful,
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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# GNU General Public License for more details.
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#
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#
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# You should have received a copy of the GNU General Public License
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see .
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# along with this program. If not, see .
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## COMMON_PRE_CONFIG_FRAG
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## COMMON_PRE_CONFIG_FRAG
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FRV_OBJS = frv.o cpu.o decode.o sem.o model.o mloop.o cgen-par.o
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FRV_OBJS = frv.o cpu.o decode.o sem.o model.o mloop.o cgen-par.o
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CONFIG_DEVICES = dv-sockser.o
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CONFIG_DEVICES = dv-sockser.o
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CONFIG_DEVICES =
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CONFIG_DEVICES =
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SIM_OBJS = \
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SIM_OBJS = \
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$(SIM_NEW_COMMON_OBJS) \
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$(SIM_NEW_COMMON_OBJS) \
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sim-cpu.o \
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sim-cpu.o \
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sim-hload.o \
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sim-hload.o \
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sim-hrw.o \
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sim-hrw.o \
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sim-model.o \
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sim-model.o \
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sim-reg.o \
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sim-reg.o \
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cgen-utils.o cgen-trace.o cgen-scache.o cgen-fpu.o cgen-accfp.o \
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cgen-utils.o cgen-trace.o cgen-scache.o cgen-fpu.o cgen-accfp.o \
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cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
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cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
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sim-if.o arch.o \
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sim-if.o arch.o \
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$(FRV_OBJS) \
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$(FRV_OBJS) \
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traps.o interrupts.o memory.o cache.o pipeline.o \
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traps.o interrupts.o memory.o cache.o pipeline.o \
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profile.o profile-fr400.o profile-fr450.o profile-fr500.o profile-fr550.o options.o \
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profile.o profile-fr400.o profile-fr450.o profile-fr500.o profile-fr550.o options.o \
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devices.o reset.o registers.o \
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devices.o reset.o registers.o \
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$(CONFIG_DEVICES)
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$(CONFIG_DEVICES)
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# Extra headers included by sim-main.h.
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# Extra headers included by sim-main.h.
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SIM_EXTRA_DEPS = \
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SIM_EXTRA_DEPS = \
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$(CGEN_INCLUDE_DEPS) \
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$(CGEN_INCLUDE_DEPS) \
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arch.h cpuall.h frv-sim.h $(srcdir)/../../opcodes/frv-desc.h cache.h \
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arch.h cpuall.h frv-sim.h $(srcdir)/../../opcodes/frv-desc.h cache.h \
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registers.h profile.h \
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registers.h profile.h \
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$(sim-options_h)
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$(sim-options_h)
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SIM_EXTRA_CFLAGS = @sim_trapdump@
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SIM_EXTRA_CFLAGS = @sim_trapdump@
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SIM_RUN_OBJS = nrun.o
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SIM_RUN_OBJS = nrun.o
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SIM_EXTRA_CLEAN = frv-clean
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SIM_EXTRA_CLEAN = frv-clean
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# This selects the frv newlib/libgloss syscall definitions.
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# This selects the frv newlib/libgloss syscall definitions.
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NL_TARGET = -DNL_TARGET_frv
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NL_TARGET = -DNL_TARGET_frv
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## COMMON_POST_CONFIG_FRAG
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## COMMON_POST_CONFIG_FRAG
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arch = frv
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arch = frv
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arch.o: arch.c $(SIM_MAIN_DEPS)
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arch.o: arch.c $(SIM_MAIN_DEPS)
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devices.o: devices.c $(SIM_MAIN_DEPS)
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devices.o: devices.c $(SIM_MAIN_DEPS)
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# FRV objs
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# FRV objs
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FRVBF_INCLUDE_DEPS = \
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FRVBF_INCLUDE_DEPS = \
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$(CGEN_MAIN_CPU_DEPS) \
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$(CGEN_MAIN_CPU_DEPS) \
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$(SIM_EXTRA_DEPS) \
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$(SIM_EXTRA_DEPS) \
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cpu.h decode.h eng.h
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cpu.h decode.h eng.h
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frv.o: frv.c $(FRVBF_INCLUDE_DEPS)
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frv.o: frv.c $(FRVBF_INCLUDE_DEPS)
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traps.o: traps.c $(FRVBF_INCLUDE_DEPS)
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traps.o: traps.c $(FRVBF_INCLUDE_DEPS)
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pipeline.o: pipeline.c $(FRVBF_INCLUDE_DEPS)
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pipeline.o: pipeline.c $(FRVBF_INCLUDE_DEPS)
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interrupts.o: interrupts.c $(FRVBF_INCLUDE_DEPS)
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interrupts.o: interrupts.c $(FRVBF_INCLUDE_DEPS)
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memory.o: memory.c $(FRVBF_INCLUDE_DEPS)
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memory.o: memory.c $(FRVBF_INCLUDE_DEPS)
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cache.o: cache.c $(FRVBF_INCLUDE_DEPS)
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cache.o: cache.c $(FRVBF_INCLUDE_DEPS)
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options.o: options.c $(FRVBF_INCLUDE_DEPS)
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options.o: options.c $(FRVBF_INCLUDE_DEPS)
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reset.o: reset.c $(FRVBF_INCLUDE_DEPS)
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reset.o: reset.c $(FRVBF_INCLUDE_DEPS)
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registers.o: registers.c $(FRVBF_INCLUDE_DEPS)
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registers.o: registers.c $(FRVBF_INCLUDE_DEPS)
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profile.o: profile.c profile-fr400.h profile-fr500.h profile-fr550.h $(FRVBF_INCLUDE_DEPS)
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profile.o: profile.c profile-fr400.h profile-fr500.h profile-fr550.h $(FRVBF_INCLUDE_DEPS)
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profile-fr400.o: profile-fr400.c profile-fr400.h $(FRVBF_INCLUDE_DEPS)
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profile-fr400.o: profile-fr400.c profile-fr400.h $(FRVBF_INCLUDE_DEPS)
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profile-fr450.o: profile-fr450.c $(FRVBF_INCLUDE_DEPS)
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profile-fr450.o: profile-fr450.c $(FRVBF_INCLUDE_DEPS)
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profile-fr500.o: profile-fr500.c profile-fr500.h $(FRVBF_INCLUDE_DEPS)
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profile-fr500.o: profile-fr500.c profile-fr500.h $(FRVBF_INCLUDE_DEPS)
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profile-fr550.o: profile-fr550.c profile-fr550.h $(FRVBF_INCLUDE_DEPS)
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profile-fr550.o: profile-fr550.c profile-fr550.h $(FRVBF_INCLUDE_DEPS)
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sim-if.o: sim-if.c $(FRVBF_INCLUDE_DEPS) $(srcdir)/../common/sim-core.h eng.h
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sim-if.o: sim-if.c $(FRVBF_INCLUDE_DEPS) $(srcdir)/../common/sim-core.h eng.h
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# FIXME: Use of `mono' is wip.
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# FIXME: Use of `mono' is wip.
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mloop.c eng.h: stamp-mloop
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mloop.c eng.h: stamp-mloop
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stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
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stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
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$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
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$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
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-mono -scache -parallel-generic-write -parallel-only \
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-mono -scache -parallel-generic-write -parallel-only \
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-cpu frvbf -infile $(srcdir)/mloop.in
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-cpu frvbf -infile $(srcdir)/mloop.in
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$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
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$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
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$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
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$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
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touch stamp-mloop
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touch stamp-mloop
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mloop.o: mloop.c $(FRVBF_INCLUDE_DEPS)
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mloop.o: mloop.c $(FRVBF_INCLUDE_DEPS)
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cpu.o: cpu.c $(FRVBF_INCLUDE_DEPS)
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cpu.o: cpu.c $(FRVBF_INCLUDE_DEPS)
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decode.o: decode.c $(FRVBF_INCLUDE_DEPS)
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decode.o: decode.c $(FRVBF_INCLUDE_DEPS)
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sem.o: sem.c $(FRVBF_INCLUDE_DEPS)
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sem.o: sem.c $(FRVBF_INCLUDE_DEPS)
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model.o: model.c $(FRVBF_INCLUDE_DEPS)
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model.o: model.c $(FRVBF_INCLUDE_DEPS)
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frv-clean:
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frv-clean:
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rm -f mloop.c eng.h stamp-mloop
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rm -f mloop.c eng.h stamp-mloop
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rm -f tmp-*
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rm -f tmp-*
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rm -f stamp-arch stamp-cpu
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rm -f stamp-arch stamp-cpu
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# cgen support, enable with --enable-cgen-maint
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# cgen support, enable with --enable-cgen-maint
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CGEN_MAINT = ; @true
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CGEN_MAINT = ; @true
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# The following line is commented in or out depending upon --enable-cgen-maint.
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# The following line is commented in or out depending upon --enable-cgen-maint.
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@CGEN_MAINT@CGEN_MAINT =
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@CGEN_MAINT@CGEN_MAINT =
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stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srcdir)/../../cpu/frv.cpu
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stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srcdir)/../../cpu/frv.cpu
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$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
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$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
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archfile=$(srcdir)/../../cpu/frv.cpu \
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archfile=$(srcdir)/../../cpu/frv.cpu \
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FLAGS="with-scache"
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FLAGS="with-scache"
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touch stamp-arch
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touch stamp-arch
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arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
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arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
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# @true
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# @true
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stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srcdir)/../../cpu/frv.cpu
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stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srcdir)/../../cpu/frv.cpu
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$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
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$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
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cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple SUFFIX= \
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cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple SUFFIX= \
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archfile=$(srcdir)/../../cpu/frv.cpu \
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archfile=$(srcdir)/../../cpu/frv.cpu \
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FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" \
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FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" \
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EXTRAFILES="$(CGEN_CPU_SEM)"
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EXTRAFILES="$(CGEN_CPU_SEM)"
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touch stamp-cpu
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touch stamp-cpu
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cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
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cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
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# @true
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# @true
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