OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [lm32/] [arch.c] - Diff between revs 227 and 816

Go to most recent revision | Only display areas with differences | Details | Blame | View Log

Rev 227 Rev 816
/* Simulator support for lm32.
/* Simulator support for lm32.
 
 
THIS FILE IS MACHINE GENERATED WITH CGEN.
THIS FILE IS MACHINE GENERATED WITH CGEN.
 
 
Copyright 1996-2010 Free Software Foundation, Inc.
Copyright 1996-2010 Free Software Foundation, Inc.
 
 
This file is part of the GNU simulators.
This file is part of the GNU simulators.
 
 
   This file is free software; you can redistribute it and/or modify
   This file is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   the Free Software Foundation; either version 3, or (at your option)
   any later version.
   any later version.
 
 
   It is distributed in the hope that it will be useful, but WITHOUT
   It is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.
   License for more details.
 
 
   You should have received a copy of the GNU General Public License along
   You should have received a copy of the GNU General Public License along
   with this program; if not, write to the Free Software Foundation, Inc.,
   with this program; if not, write to the Free Software Foundation, Inc.,
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 
*/
*/
 
 
#include "sim-main.h"
#include "sim-main.h"
#include "bfd.h"
#include "bfd.h"
 
 
const MACH *sim_machs[] =
const MACH *sim_machs[] =
{
{
#ifdef HAVE_CPU_LM32BF
#ifdef HAVE_CPU_LM32BF
  & lm32_mach,
  & lm32_mach,
#endif
#endif
  0
  0
};
};
 
 
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.