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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [lm32/] [mloop.in] - Diff between revs 834 and 842

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# Simulator main loop for lm32. -*- C -*-
# Simulator main loop for lm32. -*- C -*-
# Contributed by Jon Beniston 
# Contributed by Jon Beniston 
#
#
# This file is part of the GNU Simulators.
# This file is part of the GNU Simulators.
#
#
# This program is free software; you can redistribute it and/or modify
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2, or (at your option)
# the Free Software Foundation; either version 2, or (at your option)
# any later version.
# any later version.
#
#
# This program is distributed in the hope that it will be useful,
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
# GNU General Public License for more details.
#
#
# You should have received a copy of the GNU General Public License along
# You should have received a copy of the GNU General Public License along
# with this program; if not, write to the Free Software Foundation, Inc.,
# with this program; if not, write to the Free Software Foundation, Inc.,
# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
# Syntax:
# Syntax:
# /bin/sh mainloop.in command
# /bin/sh mainloop.in command
#
#
# Command is one of:
# Command is one of:
#
#
# init
# init
# support
# support
# extract-{simple,scache,pbb}
# extract-{simple,scache,pbb}
# {full,fast}-exec-{simple,scache,pbb}
# {full,fast}-exec-{simple,scache,pbb}
#
#
case "x$1" in
case "x$1" in
xsupport)
xsupport)
cat <
cat <
static INLINE const IDESC *
static INLINE const IDESC *
extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn,
extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn,
           ARGBUF *abuf, int fast_p)
           ARGBUF *abuf, int fast_p)
{
{
  const IDESC *id = @cpu@_decode (current_cpu, pc, insn, insn, abuf);
  const IDESC *id = @cpu@_decode (current_cpu, pc, insn, insn, abuf);
  @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p);
  @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p);
  if (! fast_p)
  if (! fast_p)
    {
    {
      int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
      int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
      int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
      int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
      @cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p);
      @cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p);
    }
    }
  return id;
  return id;
}
}
static INLINE SEM_PC
static INLINE SEM_PC
execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p)
execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p)
{
{
  SEM_PC vpc;
  SEM_PC vpc;
  if (fast_p)
  if (fast_p)
    {
    {
#if ! WITH_SEM_SWITCH_FAST
#if ! WITH_SEM_SWITCH_FAST
#if WITH_SCACHE
#if WITH_SCACHE
      vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc);
      vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc);
#else
#else
      vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf);
      vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf);
#endif
#endif
#else
#else
      abort ();
      abort ();
#endif /* WITH_SEM_SWITCH_FAST */
#endif /* WITH_SEM_SWITCH_FAST */
    }
    }
  else
  else
    {
    {
#if ! WITH_SEM_SWITCH_FULL
#if ! WITH_SEM_SWITCH_FULL
      ARGBUF *abuf = &sc->argbuf;
      ARGBUF *abuf = &sc->argbuf;
      const IDESC *idesc = abuf->idesc;
      const IDESC *idesc = abuf->idesc;
      const CGEN_INSN *idata = idesc->idata;
      const CGEN_INSN *idata = idesc->idata;
#if WITH_SCACHE_PBB
#if WITH_SCACHE_PBB
      int virtual_p = CGEN_INSN_ATTR_VALUE (idata, CGEN_INSN_VIRTUAL);
      int virtual_p = CGEN_INSN_ATTR_VALUE (idata, CGEN_INSN_VIRTUAL);
#else
#else
      int virtual_p = 0;
      int virtual_p = 0;
#endif
#endif
      if (! virtual_p)
      if (! virtual_p)
        {
        {
          /* FIXME: call x-before */
          /* FIXME: call x-before */
          if (ARGBUF_PROFILE_P (abuf))
          if (ARGBUF_PROFILE_P (abuf))
            PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num);
            PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num);
          /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}.  */
          /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}.  */
          if (PROFILE_MODEL_P (current_cpu)
          if (PROFILE_MODEL_P (current_cpu)
              && ARGBUF_PROFILE_P (abuf))
              && ARGBUF_PROFILE_P (abuf))
            @cpu@_model_insn_before (current_cpu, 1 /*first_p*/);
            @cpu@_model_insn_before (current_cpu, 1 /*first_p*/);
          TRACE_INSN_INIT (current_cpu, abuf, 1);
          TRACE_INSN_INIT (current_cpu, abuf, 1);
          TRACE_INSN (current_cpu, idata,
          TRACE_INSN (current_cpu, idata,
                      (const struct argbuf *) abuf, abuf->addr);
                      (const struct argbuf *) abuf, abuf->addr);
        }
        }
#if WITH_SCACHE
#if WITH_SCACHE
      vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc);
      vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc);
#else
#else
      vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf);
      vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf);
#endif
#endif
      if (! virtual_p)
      if (! virtual_p)
        {
        {
          /* FIXME: call x-after */
          /* FIXME: call x-after */
          if (PROFILE_MODEL_P (current_cpu)
          if (PROFILE_MODEL_P (current_cpu)
              && ARGBUF_PROFILE_P (abuf))
              && ARGBUF_PROFILE_P (abuf))
            {
            {
              int cycles;
              int cycles;
              cycles = (*idesc->timing->model_fn) (current_cpu, sc);
              cycles = (*idesc->timing->model_fn) (current_cpu, sc);
              @cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles);
              @cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles);
            }
            }
          TRACE_INSN_FINI (current_cpu, abuf, 1);
          TRACE_INSN_FINI (current_cpu, abuf, 1);
        }
        }
#else
#else
      abort ();
      abort ();
#endif /* WITH_SEM_SWITCH_FULL */
#endif /* WITH_SEM_SWITCH_FULL */
    }
    }
  return vpc;
  return vpc;
}
}
EOF
EOF
;;
;;
xinit)
xinit)
# Nothing needed.
# Nothing needed.
;;
;;
xextract-simple | xextract-scache)
xextract-simple | xextract-scache)
cat <
cat <
{
{
  CGEN_INSN_INT insn = GETIMEMUSI (current_cpu, vpc);
  CGEN_INSN_INT insn = GETIMEMUSI (current_cpu, vpc);
  extract (current_cpu, vpc, insn, SEM_ARGBUF (sc), FAST_P);
  extract (current_cpu, vpc, insn, SEM_ARGBUF (sc), FAST_P);
}
}
EOF
EOF
;;
;;
xextract-pbb)
xextract-pbb)
# Inputs:  current_cpu, pc, sc, max_insns, FAST_P
# Inputs:  current_cpu, pc, sc, max_insns, FAST_P
# Outputs: sc, pc
# Outputs: sc, pc
# sc must be left pointing past the last created entry.
# sc must be left pointing past the last created entry.
# pc must be left pointing past the last created entry.
# pc must be left pointing past the last created entry.
# If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called
# If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called
# to record the vpc of the cti insn.
# to record the vpc of the cti insn.
# SET_INSN_COUNT(n) must be called to record number of real insns.
# SET_INSN_COUNT(n) must be called to record number of real insns.
cat <
cat <
{
{
  const IDESC *idesc;
  const IDESC *idesc;
  int icount = 0;
  int icount = 0;
  while (max_insns > 0)
  while (max_insns > 0)
    {
    {
      USI insn = GETIMEMUSI (current_cpu, pc);
      USI insn = GETIMEMUSI (current_cpu, pc);
      idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P);
      idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P);
      ++sc;
      ++sc;
      --max_insns;
      --max_insns;
      ++icount;
      ++icount;
      pc += idesc->length;
      pc += idesc->length;
      if (IDESC_CTI_P (idesc))
      if (IDESC_CTI_P (idesc))
        {
        {
          SET_CTI_VPC (sc - 1);
          SET_CTI_VPC (sc - 1);
          break;
          break;
        }
        }
    }
    }
 Finish:
 Finish:
  SET_INSN_COUNT (icount);
  SET_INSN_COUNT (icount);
}
}
EOF
EOF
;;
;;
xfull-exec-* | xfast-exec-*)
xfull-exec-* | xfast-exec-*)
# Inputs: current_cpu, vpc, FAST_P
# Inputs: current_cpu, vpc, FAST_P
# Outputs: vpc
# Outputs: vpc
cat <
cat <
  /* Update cycle counter */
  /* Update cycle counter */
  SET_H_CSR (LM32_CSR_CC, GET_H_CSR (LM32_CSR_CC) + 1);
  SET_H_CSR (LM32_CSR_CC, GET_H_CSR (LM32_CSR_CC) + 1);
#if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST)
#if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST)
#define DEFINE_SWITCH
#define DEFINE_SWITCH
#include "sem-switch.c"
#include "sem-switch.c"
#else
#else
  vpc = execute (current_cpu, vpc, FAST_P);
  vpc = execute (current_cpu, vpc, FAST_P);
#endif
#endif
EOF
EOF
;;
;;
*)
*)
  echo "Invalid argument to mainloop.in: $1" >&2
  echo "Invalid argument to mainloop.in: $1" >&2
  exit 1
  exit 1
  ;;
  ;;
esac
esac
 
 

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