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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [m32r/] [Makefile.in] - Diff between revs 834 and 842

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# Makefile template for Configure for the m32r simulator
# Makefile template for Configure for the m32r simulator
# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2003, 2004, 2007, 2008, 2009,
# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2003, 2004, 2007, 2008, 2009,
# 2010 Free Software Foundation, Inc.
# 2010 Free Software Foundation, Inc.
# Contributed by Cygnus Support.
# Contributed by Cygnus Support.
#
#
# This file is part of GDB, the GNU debugger.
# This file is part of GDB, the GNU debugger.
#
#
# This program is free software; you can redistribute it and/or modify
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
# (at your option) any later version.
#
#
# This program is distributed in the hope that it will be useful,
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
# GNU General Public License for more details.
#
#
# You should have received a copy of the GNU General Public License
# You should have received a copy of the GNU General Public License
# along with this program.  If not, see .
# along with this program.  If not, see .
## COMMON_PRE_CONFIG_FRAG
## COMMON_PRE_CONFIG_FRAG
M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o
M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o
TRAPS_OBJ = @traps_obj@
TRAPS_OBJ = @traps_obj@
CONFIG_DEVICES = dv-sockser.o
CONFIG_DEVICES = dv-sockser.o
CONFIG_DEVICES =
CONFIG_DEVICES =
SIM_OBJS = \
SIM_OBJS = \
        $(SIM_NEW_COMMON_OBJS) \
        $(SIM_NEW_COMMON_OBJS) \
        sim-cpu.o \
        sim-cpu.o \
        sim-hload.o \
        sim-hload.o \
        sim-hrw.o \
        sim-hrw.o \
        sim-model.o \
        sim-model.o \
        sim-reg.o \
        sim-reg.o \
        cgen-utils.o cgen-trace.o cgen-scache.o \
        cgen-utils.o cgen-trace.o cgen-scache.o \
        cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
        cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
        sim-if.o arch.o \
        sim-if.o arch.o \
        $(M32R_OBJS) \
        $(M32R_OBJS) \
        $(M32RX_OBJS) \
        $(M32RX_OBJS) \
        $(M32R2_OBJS) \
        $(M32R2_OBJS) \
        $(TRAPS_OBJ) \
        $(TRAPS_OBJ) \
        devices.o \
        devices.o \
        $(CONFIG_DEVICES)
        $(CONFIG_DEVICES)
# Extra headers included by sim-main.h.
# Extra headers included by sim-main.h.
SIM_EXTRA_DEPS = \
SIM_EXTRA_DEPS = \
        $(CGEN_INCLUDE_DEPS) \
        $(CGEN_INCLUDE_DEPS) \
        arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h
        arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h
SIM_EXTRA_CFLAGS = @sim_extra_cflags@
SIM_EXTRA_CFLAGS = @sim_extra_cflags@
SIM_RUN_OBJS = nrun.o
SIM_RUN_OBJS = nrun.o
SIM_EXTRA_CLEAN = m32r-clean
SIM_EXTRA_CLEAN = m32r-clean
# This selects the m32r newlib/libgloss syscall definitions.
# This selects the m32r newlib/libgloss syscall definitions.
NL_TARGET = -DNL_TARGET_m32r
NL_TARGET = -DNL_TARGET_m32r
## COMMON_POST_CONFIG_FRAG
## COMMON_POST_CONFIG_FRAG
arch = m32r
arch = m32r
sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
arch.o: arch.c $(SIM_MAIN_DEPS)
arch.o: arch.c $(SIM_MAIN_DEPS)
traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
traps-linux.o: traps.c syscall.h targ-vals.h $(SIM_MAIN_DEPS)
traps-linux.o: traps.c syscall.h targ-vals.h $(SIM_MAIN_DEPS)
devices.o: devices.c $(SIM_MAIN_DEPS)
devices.o: devices.c $(SIM_MAIN_DEPS)
# M32R objs
# M32R objs
M32RBF_INCLUDE_DEPS = \
M32RBF_INCLUDE_DEPS = \
        $(CGEN_MAIN_CPU_DEPS) \
        $(CGEN_MAIN_CPU_DEPS) \
        cpu.h decode.h eng.h
        cpu.h decode.h eng.h
m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
# FIXME: Use of `mono' is wip.
# FIXME: Use of `mono' is wip.
mloop.c eng.h: stamp-mloop ; @true
mloop.c eng.h: stamp-mloop ; @true
stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
        $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
        $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
                -mono -fast -pbb -switch sem-switch.c \
                -mono -fast -pbb -switch sem-switch.c \
                -cpu m32rbf -infile $(srcdir)/mloop.in
                -cpu m32rbf -infile $(srcdir)/mloop.in
        $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
        $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
        $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
        $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
        touch stamp-mloop
        touch stamp-mloop
mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)
mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)
cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)
cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)
decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
model.o: model.c $(M32RBF_INCLUDE_DEPS)
model.o: model.c $(M32RBF_INCLUDE_DEPS)
# M32RX objs
# M32RX objs
M32RXF_INCLUDE_DEPS = \
M32RXF_INCLUDE_DEPS = \
        $(CGEN_MAIN_CPU_DEPS) \
        $(CGEN_MAIN_CPU_DEPS) \
        cpux.h decodex.h engx.h
        cpux.h decodex.h engx.h
m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
# FIXME: Use of `mono' is wip.
# FIXME: Use of `mono' is wip.
mloopx.c engx.h: stamp-xmloop ; @true
mloopx.c engx.h: stamp-xmloop ; @true
stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
        $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
        $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
                -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
                -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
                -cpu m32rxf -infile $(srcdir)/mloopx.in \
                -cpu m32rxf -infile $(srcdir)/mloopx.in \
                -outfile-suffix x
                -outfile-suffix x
        $(SHELL) $(srcroot)/move-if-change engx.hin engx.h
        $(SHELL) $(srcroot)/move-if-change engx.hin engx.h
        $(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
        $(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
        touch stamp-xmloop
        touch stamp-xmloop
mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
# M32R2 objs
# M32R2 objs
M32R2F_INCLUDE_DEPS = \
M32R2F_INCLUDE_DEPS = \
        $(CGEN_MAIN_CPU_DEPS) \
        $(CGEN_MAIN_CPU_DEPS) \
        cpu2.h decode2.h eng2.h
        cpu2.h decode2.h eng2.h
m32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS)
m32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS)
# FIXME: Use of `mono' is wip.
# FIXME: Use of `mono' is wip.
mloop2.c eng2.h: stamp-2mloop ; @true
mloop2.c eng2.h: stamp-2mloop ; @true
stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
        $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
        $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
                -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
                -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
                -cpu m32r2f -infile $(srcdir)/mloop2.in \
                -cpu m32r2f -infile $(srcdir)/mloop2.in \
                -outfile-suffix 2
                -outfile-suffix 2
        $(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h
        $(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h
        $(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
        $(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
        touch stamp-2mloop
        touch stamp-2mloop
mloop2.o: mloop2.c $(srcdir)/sem2-switch.c $(M32R2F_INCLUDE_DEPS)
mloop2.o: mloop2.c $(srcdir)/sem2-switch.c $(M32R2F_INCLUDE_DEPS)
cpu2.o: cpu2.c $(M32R2F_INCLUDE_DEPS)
cpu2.o: cpu2.c $(M32R2F_INCLUDE_DEPS)
decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS)
decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS)
sem2.o: sem2.c $(M32R2F_INCLUDE_DEPS)
sem2.o: sem2.c $(M32R2F_INCLUDE_DEPS)
model2.o: model2.c $(M32R2F_INCLUDE_DEPS)
model2.o: model2.c $(M32R2F_INCLUDE_DEPS)
m32r-clean:
m32r-clean:
        rm -f mloop.c eng.h stamp-mloop
        rm -f mloop.c eng.h stamp-mloop
        rm -f mloopx.c engx.h stamp-xmloop
        rm -f mloopx.c engx.h stamp-xmloop
        rm -f mloop2.c eng2.h stamp-2mloop
        rm -f mloop2.c eng2.h stamp-2mloop
        rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
        rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
        rm -f tmp-*
        rm -f tmp-*
# cgen support, enable with --enable-cgen-maint
# cgen support, enable with --enable-cgen-maint
CGEN_MAINT = ; @true
CGEN_MAINT = ; @true
# The following line is commented in or out depending upon --enable-cgen-maint.
# The following line is commented in or out depending upon --enable-cgen-maint.
@CGEN_MAINT@CGEN_MAINT =
@CGEN_MAINT@CGEN_MAINT =
# NOTE: Generated source files are specified as full paths,
# NOTE: Generated source files are specified as full paths,
# e.g. $(srcdir)/arch.c, because make may decide the files live
# e.g. $(srcdir)/arch.c, because make may decide the files live
# in objdir otherwise.
# in objdir otherwise.
stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile
stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile
        $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
        $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
          archfile=$(CPU_DIR)/m32r.cpu \
          archfile=$(CPU_DIR)/m32r.cpu \
          FLAGS="with-scache with-profile=fn"
          FLAGS="with-scache with-profile=fn"
        touch stamp-arch
        touch stamp-arch
$(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
$(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
        @true
        @true
stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
        $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
        $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
          cpu=m32rbf mach=m32r SUFFIX= \
          cpu=m32rbf mach=m32r SUFFIX= \
          archfile=$(CPU_DIR)/m32r.cpu \
          archfile=$(CPU_DIR)/m32r.cpu \
          FLAGS="with-scache with-profile=fn" \
          FLAGS="with-scache with-profile=fn" \
          EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
          EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
        touch stamp-cpu
        touch stamp-cpu
$(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
$(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
        @true
        @true
stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
        $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
        $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
          cpu=m32rxf mach=m32rx SUFFIX=x \
          cpu=m32rxf mach=m32rx SUFFIX=x \
          archfile=$(CPU_DIR)/m32r.cpu \
          archfile=$(CPU_DIR)/m32r.cpu \
          FLAGS="with-scache with-profile=fn" \
          FLAGS="with-scache with-profile=fn" \
          EXTRAFILES="$(CGEN_CPU_SEMSW)"
          EXTRAFILES="$(CGEN_CPU_SEMSW)"
        touch stamp-xcpu
        touch stamp-xcpu
$(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu
$(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu
        @true
        @true
stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
        $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
        $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
          cpu=m32r2f mach=m32r2 SUFFIX=2 \
          cpu=m32r2f mach=m32r2 SUFFIX=2 \
          archfile=$(CPU_DIR)/m32r.cpu \
          archfile=$(CPU_DIR)/m32r.cpu \
          FLAGS="with-scache with-profile=fn" \
          FLAGS="with-scache with-profile=fn" \
          EXTRAFILES="$(CGEN_CPU_SEMSW)"
          EXTRAFILES="$(CGEN_CPU_SEMSW)"
        touch stamp-2cpu
        touch stamp-2cpu
$(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu
$(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu
        @true
        @true
 
 

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