/* This file is part of the program psim.
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/* This file is part of the program psim.
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Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
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Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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*/
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/* Instruction field macros:
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/* Instruction field macros:
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The macro's below greatly simplify the process of translating the
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The macro's below greatly simplify the process of translating the
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pseudo code found in the PowerPC manual into C.
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pseudo code found in the PowerPC manual into C.
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In addition to the below, more will be found in the gen program's
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In addition to the below, more will be found in the gen program's
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cache table */
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cache table */
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/* map some statements and variables directly across */
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/* map some statements and variables directly across */
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#define is_64bit_implementation (WITH_TARGET_WORD_BITSIZE == 64)
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#define is_64bit_implementation (WITH_TARGET_WORD_BITSIZE == 64)
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#define is_64bit_mode IS_64BIT_MODE(processor)
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#define is_64bit_mode IS_64BIT_MODE(processor)
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#define NIA nia
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#define NIA nia
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#define CIA cia
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#define CIA cia
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/* reservation */
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/* reservation */
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#define RESERVE cpu_reservation(processor)->valid
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#define RESERVE cpu_reservation(processor)->valid
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#define RESERVE_ADDR cpu_reservation(processor)->addr
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#define RESERVE_ADDR cpu_reservation(processor)->addr
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#define RESERVE_DATA cpu_reservation(processor)->data
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#define RESERVE_DATA cpu_reservation(processor)->data
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#define real_addr(EA, IS_READ) vm_real_data_addr(cpu_data_map(processor), \
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#define real_addr(EA, IS_READ) vm_real_data_addr(cpu_data_map(processor), \
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EA, \
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EA, \
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IS_READ, \
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IS_READ, \
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processor, \
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processor, \
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cia)
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cia)
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/* depending on mode return a 32 or 64bit number */
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/* depending on mode return a 32 or 64bit number */
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#define IEA(X) (is_64bit_mode \
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#define IEA(X) (is_64bit_mode \
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? (X) \
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? (X) \
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: MASKED((X), 32, 63))
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: MASKED((X), 32, 63))
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/* Expand argument to current architecture size */
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/* Expand argument to current architecture size */
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#define EXTS(X) EXTS_##X
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#define EXTS(X) EXTS_##X
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/* Gen translates text of the form A{XX:YY} into A_XX_YY_ the macro's
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/* Gen translates text of the form A{XX:YY} into A_XX_YY_ the macro's
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below define such translated text into real expressions */
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below define such translated text into real expressions */
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/* the spr field as it normally is used */
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/* the spr field as it normally is used */
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#define SPR_5_9_ (SPR & 0x1f)
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#define SPR_5_9_ (SPR & 0x1f)
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#define SPR_0_4_ (SPR >> 5)
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#define SPR_0_4_ (SPR >> 5)
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#define SPR_0_ ((SPR & BIT10(0)) != 0)
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#define SPR_0_ ((SPR & BIT10(0)) != 0)
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#define tbr_5_9_ (tbr & 0x1f)
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#define tbr_5_9_ (tbr & 0x1f)
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#define tbr_0_4_ (tbr >> 5)
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#define tbr_0_4_ (tbr >> 5)
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#define TB cpu_get_time_base(processor)
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#define TB cpu_get_time_base(processor)
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/* various registers with important masks */
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/* various registers with important masks */
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#define LR_0b00 (LR & ~3)
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#define LR_0b00 (LR & ~3)
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#define CTR_0b00 (CTR & ~3)
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#define CTR_0b00 (CTR & ~3)
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#define CR_BI_ ((CR & BIT32_BI) != 0)
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#define CR_BI_ ((CR & BIT32_BI) != 0)
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#define CR_BA_ ((CR & BIT32_BA) != 0)
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#define CR_BA_ ((CR & BIT32_BA) != 0)
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#define CR_BB_ ((CR & BIT32_BB) != 0)
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#define CR_BB_ ((CR & BIT32_BB) != 0)
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/* extended extracted fields */
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/* extended extracted fields */
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#define TO_0_ ((TO & BIT5(0)) != 0)
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#define TO_0_ ((TO & BIT5(0)) != 0)
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#define TO_1_ ((TO & BIT5(1)) != 0)
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#define TO_1_ ((TO & BIT5(1)) != 0)
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#define TO_2_ ((TO & BIT5(2)) != 0)
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#define TO_2_ ((TO & BIT5(2)) != 0)
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#define TO_3_ ((TO & BIT5(3)) != 0)
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#define TO_3_ ((TO & BIT5(3)) != 0)
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#define TO_4_ ((TO & BIT5(4)) != 0)
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#define TO_4_ ((TO & BIT5(4)) != 0)
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#define BO_0_ ((BO & BIT5(0)) != 0)
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#define BO_0_ ((BO & BIT5(0)) != 0)
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#define BO_1_ ((BO & BIT5(1)) != 0)
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#define BO_1_ ((BO & BIT5(1)) != 0)
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#define BO_2_ ((BO & BIT5(2)) != 0)
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#define BO_2_ ((BO & BIT5(2)) != 0)
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#define BO_3_ ((BO & BIT5(3)) != 0)
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#define BO_3_ ((BO & BIT5(3)) != 0)
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#define BO_4_ ((BO & BIT5(4)) != 0)
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#define BO_4_ ((BO & BIT5(4)) != 0)
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#define GOTO(dest) goto XCONCAT4(label__,dest,__,MY_PREFIX)
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#define GOTO(dest) goto XCONCAT4(label__,dest,__,MY_PREFIX)
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#define LABEL(dest) XCONCAT4(label__,dest,__,MY_PREFIX)
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#define LABEL(dest) XCONCAT4(label__,dest,__,MY_PREFIX)
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