/* gdb-if.c -- sim interface to GDB.
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/* gdb-if.c -- sim interface to GDB.
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Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
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Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
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Contributed by Red Hat, Inc.
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Contributed by Red Hat, Inc.
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This file is part of the GNU simulators.
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This file is part of the GNU simulators.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include <stdio.h>
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#include <stdio.h>
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#include <assert.h>
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#include <assert.h>
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#include <signal.h>
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#include <signal.h>
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#include <string.h>
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#include <string.h>
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#include <ctype.h>
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#include <ctype.h>
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#include <stdlib.h>
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#include <stdlib.h>
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#include "ansidecl.h"
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#include "ansidecl.h"
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#include "gdb/callback.h"
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#include "gdb/callback.h"
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#include "gdb/remote-sim.h"
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#include "gdb/remote-sim.h"
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#include "gdb/signals.h"
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#include "gdb/signals.h"
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#include "gdb/sim-rx.h"
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#include "gdb/sim-rx.h"
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#include "cpu.h"
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#include "cpu.h"
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#include "mem.h"
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#include "mem.h"
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#include "load.h"
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#include "load.h"
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#include "syscalls.h"
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#include "syscalls.h"
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#include "err.h"
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#include "err.h"
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/* Ideally, we'd wrap up all the minisim's data structures in an
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/* Ideally, we'd wrap up all the minisim's data structures in an
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object and pass that around. However, neither GDB nor run needs
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object and pass that around. However, neither GDB nor run needs
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that ability.
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that ability.
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So we just have one instance, that lives in global variables, and
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So we just have one instance, that lives in global variables, and
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each time we open it, we re-initialize it. */
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each time we open it, we re-initialize it. */
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struct sim_state
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struct sim_state
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{
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{
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const char *message;
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const char *message;
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};
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};
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static struct sim_state the_minisim = {
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static struct sim_state the_minisim = {
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"This is the sole rx minisim instance. See libsim.a's global variables."
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"This is the sole rx minisim instance. See libsim.a's global variables."
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};
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};
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static int open;
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static int open;
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SIM_DESC
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SIM_DESC
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sim_open (SIM_OPEN_KIND kind,
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sim_open (SIM_OPEN_KIND kind,
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struct host_callback_struct *callback,
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struct host_callback_struct *callback,
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struct bfd *abfd, char **argv)
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struct bfd *abfd, char **argv)
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{
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{
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if (open)
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if (open)
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fprintf (stderr, "rx minisim: re-opened sim\n");
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fprintf (stderr, "rx minisim: re-opened sim\n");
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/* The 'run' interface doesn't use this function, so we don't care
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/* The 'run' interface doesn't use this function, so we don't care
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about KIND; it's always SIM_OPEN_DEBUG. */
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about KIND; it's always SIM_OPEN_DEBUG. */
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if (kind != SIM_OPEN_DEBUG)
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if (kind != SIM_OPEN_DEBUG)
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fprintf (stderr, "rx minisim: sim_open KIND != SIM_OPEN_DEBUG: %d\n",
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fprintf (stderr, "rx minisim: sim_open KIND != SIM_OPEN_DEBUG: %d\n",
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kind);
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kind);
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set_callbacks (callback);
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set_callbacks (callback);
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/* We don't expect any command-line arguments. */
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/* We don't expect any command-line arguments. */
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init_mem ();
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init_mem ();
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init_regs ();
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init_regs ();
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execution_error_init_debugger ();
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execution_error_init_debugger ();
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sim_disasm_init (abfd);
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sim_disasm_init (abfd);
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open = 1;
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open = 1;
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return &the_minisim;
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return &the_minisim;
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}
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}
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static void
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static void
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check_desc (SIM_DESC sd)
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check_desc (SIM_DESC sd)
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{
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{
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if (sd != &the_minisim)
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if (sd != &the_minisim)
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fprintf (stderr, "rx minisim: desc != &the_minisim\n");
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fprintf (stderr, "rx minisim: desc != &the_minisim\n");
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}
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}
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void
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void
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sim_close (SIM_DESC sd, int quitting)
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sim_close (SIM_DESC sd, int quitting)
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{
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{
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check_desc (sd);
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check_desc (sd);
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/* Not much to do. At least free up our memory. */
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/* Not much to do. At least free up our memory. */
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init_mem ();
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init_mem ();
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open = 0;
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open = 0;
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}
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}
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static bfd *
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static bfd *
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open_objfile (const char *filename)
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open_objfile (const char *filename)
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{
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{
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bfd *prog = bfd_openr (filename, 0);
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bfd *prog = bfd_openr (filename, 0);
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if (!prog)
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if (!prog)
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{
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{
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fprintf (stderr, "Can't read %s\n", filename);
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fprintf (stderr, "Can't read %s\n", filename);
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return 0;
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return 0;
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}
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}
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if (!bfd_check_format (prog, bfd_object))
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if (!bfd_check_format (prog, bfd_object))
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{
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{
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fprintf (stderr, "%s not a rx program\n", filename);
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fprintf (stderr, "%s not a rx program\n", filename);
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return 0;
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return 0;
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}
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}
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return prog;
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return prog;
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}
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}
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static struct swap_list
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static struct swap_list
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{
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{
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bfd_vma start, end;
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bfd_vma start, end;
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struct swap_list *next;
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struct swap_list *next;
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} *swap_list = NULL;
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} *swap_list = NULL;
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static void
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static void
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free_swap_list (void)
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free_swap_list (void)
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{
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{
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while (swap_list)
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while (swap_list)
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{
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{
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struct swap_list *next = swap_list->next;
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struct swap_list *next = swap_list->next;
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free (swap_list);
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free (swap_list);
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swap_list = next;
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swap_list = next;
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}
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}
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}
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}
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/* When running in big endian mode, we must do an additional
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/* When running in big endian mode, we must do an additional
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byte swap of memory areas used to hold instructions. See
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byte swap of memory areas used to hold instructions. See
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the comment preceding rx_load in load.c to see why this is
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the comment preceding rx_load in load.c to see why this is
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so.
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so.
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Construct a list of memory areas that must be byte swapped.
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Construct a list of memory areas that must be byte swapped.
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This list will be consulted when either reading or writing
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This list will be consulted when either reading or writing
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memory. */
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memory. */
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static void
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static void
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build_swap_list (struct bfd *abfd)
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build_swap_list (struct bfd *abfd)
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{
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{
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asection *s;
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asection *s;
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free_swap_list ();
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free_swap_list ();
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/* Nothing to do when in little endian mode. */
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/* Nothing to do when in little endian mode. */
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if (!rx_big_endian)
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if (!rx_big_endian)
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return;
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return;
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for (s = abfd->sections; s; s = s->next)
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for (s = abfd->sections; s; s = s->next)
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{
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{
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if ((s->flags & SEC_LOAD) && (s->flags & SEC_CODE))
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if ((s->flags & SEC_LOAD) && (s->flags & SEC_CODE))
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{
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{
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struct swap_list *sl;
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struct swap_list *sl;
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bfd_size_type size;
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bfd_size_type size;
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size = bfd_get_section_size (s);
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size = bfd_get_section_size (s);
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if (size <= 0)
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if (size <= 0)
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continue;
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continue;
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sl = malloc (sizeof (struct swap_list));
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sl = malloc (sizeof (struct swap_list));
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assert (sl != NULL);
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assert (sl != NULL);
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sl->next = swap_list;
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sl->next = swap_list;
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sl->start = bfd_section_lma (abfd, s);
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sl->start = bfd_section_lma (abfd, s);
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sl->end = sl->start + size;
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sl->end = sl->start + size;
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swap_list = sl;
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swap_list = sl;
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}
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}
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}
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}
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}
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}
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static int
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static int
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addr_in_swap_list (bfd_vma addr)
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addr_in_swap_list (bfd_vma addr)
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{
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{
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struct swap_list *s;
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struct swap_list *s;
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for (s = swap_list; s; s = s->next)
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for (s = swap_list; s; s = s->next)
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{
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{
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if (s->start <= addr && addr < s->end)
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if (s->start <= addr && addr < s->end)
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return 1;
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return 1;
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}
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}
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return 0;
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return 0;
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}
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}
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SIM_RC
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SIM_RC
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sim_load (SIM_DESC sd, char *prog, struct bfd *abfd, int from_tty)
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sim_load (SIM_DESC sd, char *prog, struct bfd *abfd, int from_tty)
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{
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{
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check_desc (sd);
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check_desc (sd);
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if (!abfd)
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if (!abfd)
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abfd = open_objfile (prog);
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abfd = open_objfile (prog);
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if (!abfd)
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if (!abfd)
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return SIM_RC_FAIL;
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return SIM_RC_FAIL;
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rx_load (abfd);
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rx_load (abfd);
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build_swap_list (abfd);
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build_swap_list (abfd);
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return SIM_RC_OK;
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return SIM_RC_OK;
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}
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}
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SIM_RC
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SIM_RC
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sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char **argv, char **env)
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sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char **argv, char **env)
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{
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{
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check_desc (sd);
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check_desc (sd);
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if (abfd)
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if (abfd)
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{
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{
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rx_load (abfd);
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rx_load (abfd);
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build_swap_list (abfd);
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build_swap_list (abfd);
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}
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}
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return SIM_RC_OK;
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return SIM_RC_OK;
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}
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}
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int
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int
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sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
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sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
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{
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{
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int i;
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int i;
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check_desc (sd);
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check_desc (sd);
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if (mem == 0)
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if (mem == 0)
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return 0;
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return 0;
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execution_error_clear_last_error ();
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execution_error_clear_last_error ();
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for (i = 0; i < length; i++)
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for (i = 0; i < length; i++)
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{
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{
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bfd_vma addr = mem + i;
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bfd_vma addr = mem + i;
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int do_swap = addr_in_swap_list (addr);
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int do_swap = addr_in_swap_list (addr);
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buf[i] = mem_get_qi (addr ^ (do_swap ? 3 : 0));
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buf[i] = mem_get_qi (addr ^ (do_swap ? 3 : 0));
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if (execution_error_get_last_error () != SIM_ERR_NONE)
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if (execution_error_get_last_error () != SIM_ERR_NONE)
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return i;
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return i;
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}
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}
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return length;
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return length;
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}
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}
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int
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int
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sim_write (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
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sim_write (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
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{
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{
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int i;
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int i;
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check_desc (sd);
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check_desc (sd);
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execution_error_clear_last_error ();
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execution_error_clear_last_error ();
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for (i = 0; i < length; i++)
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for (i = 0; i < length; i++)
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{
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{
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bfd_vma addr = mem + i;
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bfd_vma addr = mem + i;
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int do_swap = addr_in_swap_list (addr);
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int do_swap = addr_in_swap_list (addr);
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mem_put_qi (addr ^ (do_swap ? 3 : 0), buf[i]);
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mem_put_qi (addr ^ (do_swap ? 3 : 0), buf[i]);
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if (execution_error_get_last_error () != SIM_ERR_NONE)
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if (execution_error_get_last_error () != SIM_ERR_NONE)
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return i;
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return i;
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}
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}
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return length;
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return length;
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}
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}
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/* Read the LENGTH bytes at BUF as an little-endian value. */
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/* Read the LENGTH bytes at BUF as an little-endian value. */
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static DI
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static DI
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get_le (unsigned char *buf, int length)
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get_le (unsigned char *buf, int length)
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{
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{
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DI acc = 0;
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DI acc = 0;
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while (--length >= 0)
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while (--length >= 0)
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acc = (acc << 8) + buf[length];
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acc = (acc << 8) + buf[length];
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return acc;
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return acc;
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}
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}
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/* Read the LENGTH bytes at BUF as a big-endian value. */
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/* Read the LENGTH bytes at BUF as a big-endian value. */
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static DI
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static DI
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get_be (unsigned char *buf, int length)
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get_be (unsigned char *buf, int length)
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{
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{
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DI acc = 0;
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DI acc = 0;
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while (length-- > 0)
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while (length-- > 0)
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acc = (acc << 8) + *buf++;
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acc = (acc << 8) + *buf++;
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return acc;
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return acc;
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}
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}
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/* Store VAL as a little-endian value in the LENGTH bytes at BUF. */
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/* Store VAL as a little-endian value in the LENGTH bytes at BUF. */
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static void
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static void
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put_le (unsigned char *buf, int length, DI val)
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put_le (unsigned char *buf, int length, DI val)
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{
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{
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int i;
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int i;
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for (i = 0; i < length; i++)
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for (i = 0; i < length; i++)
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{
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{
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buf[i] = val & 0xff;
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buf[i] = val & 0xff;
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val >>= 8;
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val >>= 8;
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}
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}
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}
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}
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/* Store VAL as a big-endian value in the LENGTH bytes at BUF. */
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/* Store VAL as a big-endian value in the LENGTH bytes at BUF. */
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static void
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static void
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put_be (unsigned char *buf, int length, DI val)
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put_be (unsigned char *buf, int length, DI val)
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{
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{
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int i;
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int i;
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for (i = length-1; i >= 0; i--)
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for (i = length-1; i >= 0; i--)
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{
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{
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buf[i] = val & 0xff;
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buf[i] = val & 0xff;
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val >>= 8;
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val >>= 8;
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}
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}
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}
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}
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static int
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static int
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check_regno (enum sim_rx_regnum regno)
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check_regno (enum sim_rx_regnum regno)
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{
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{
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return 0 <= regno && regno < sim_rx_num_regs;
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return 0 <= regno && regno < sim_rx_num_regs;
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}
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}
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|
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static size_t
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static size_t
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reg_size (enum sim_rx_regnum regno)
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reg_size (enum sim_rx_regnum regno)
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{
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{
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size_t size;
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size_t size;
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|
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switch (regno)
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switch (regno)
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{
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{
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case sim_rx_r0_regnum:
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case sim_rx_r0_regnum:
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size = sizeof (regs.r[0]);
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size = sizeof (regs.r[0]);
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break;
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break;
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case sim_rx_r1_regnum:
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case sim_rx_r1_regnum:
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size = sizeof (regs.r[1]);
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size = sizeof (regs.r[1]);
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break;
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break;
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case sim_rx_r2_regnum:
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case sim_rx_r2_regnum:
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size = sizeof (regs.r[2]);
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size = sizeof (regs.r[2]);
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break;
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break;
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case sim_rx_r3_regnum:
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case sim_rx_r3_regnum:
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size = sizeof (regs.r[3]);
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size = sizeof (regs.r[3]);
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break;
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break;
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case sim_rx_r4_regnum:
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case sim_rx_r4_regnum:
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size = sizeof (regs.r[4]);
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size = sizeof (regs.r[4]);
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break;
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break;
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case sim_rx_r5_regnum:
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case sim_rx_r5_regnum:
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size = sizeof (regs.r[5]);
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size = sizeof (regs.r[5]);
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break;
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break;
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case sim_rx_r6_regnum:
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case sim_rx_r6_regnum:
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size = sizeof (regs.r[6]);
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size = sizeof (regs.r[6]);
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break;
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break;
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case sim_rx_r7_regnum:
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case sim_rx_r7_regnum:
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size = sizeof (regs.r[7]);
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size = sizeof (regs.r[7]);
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break;
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break;
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case sim_rx_r8_regnum:
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case sim_rx_r8_regnum:
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size = sizeof (regs.r[8]);
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size = sizeof (regs.r[8]);
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break;
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break;
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case sim_rx_r9_regnum:
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case sim_rx_r9_regnum:
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size = sizeof (regs.r[9]);
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size = sizeof (regs.r[9]);
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break;
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break;
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case sim_rx_r10_regnum:
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case sim_rx_r10_regnum:
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size = sizeof (regs.r[10]);
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size = sizeof (regs.r[10]);
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break;
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break;
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case sim_rx_r11_regnum:
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case sim_rx_r11_regnum:
|
size = sizeof (regs.r[11]);
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size = sizeof (regs.r[11]);
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break;
|
break;
|
case sim_rx_r12_regnum:
|
case sim_rx_r12_regnum:
|
size = sizeof (regs.r[12]);
|
size = sizeof (regs.r[12]);
|
break;
|
break;
|
case sim_rx_r13_regnum:
|
case sim_rx_r13_regnum:
|
size = sizeof (regs.r[13]);
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size = sizeof (regs.r[13]);
|
break;
|
break;
|
case sim_rx_r14_regnum:
|
case sim_rx_r14_regnum:
|
size = sizeof (regs.r[14]);
|
size = sizeof (regs.r[14]);
|
break;
|
break;
|
case sim_rx_r15_regnum:
|
case sim_rx_r15_regnum:
|
size = sizeof (regs.r[15]);
|
size = sizeof (regs.r[15]);
|
break;
|
break;
|
case sim_rx_isp_regnum:
|
case sim_rx_isp_regnum:
|
size = sizeof (regs.r_isp);
|
size = sizeof (regs.r_isp);
|
break;
|
break;
|
case sim_rx_usp_regnum:
|
case sim_rx_usp_regnum:
|
size = sizeof (regs.r_usp);
|
size = sizeof (regs.r_usp);
|
break;
|
break;
|
case sim_rx_intb_regnum:
|
case sim_rx_intb_regnum:
|
size = sizeof (regs.r_intb);
|
size = sizeof (regs.r_intb);
|
break;
|
break;
|
case sim_rx_pc_regnum:
|
case sim_rx_pc_regnum:
|
size = sizeof (regs.r_pc);
|
size = sizeof (regs.r_pc);
|
break;
|
break;
|
case sim_rx_ps_regnum:
|
case sim_rx_ps_regnum:
|
size = sizeof (regs.r_psw);
|
size = sizeof (regs.r_psw);
|
break;
|
break;
|
case sim_rx_bpc_regnum:
|
case sim_rx_bpc_regnum:
|
size = sizeof (regs.r_bpc);
|
size = sizeof (regs.r_bpc);
|
break;
|
break;
|
case sim_rx_bpsw_regnum:
|
case sim_rx_bpsw_regnum:
|
size = sizeof (regs.r_bpsw);
|
size = sizeof (regs.r_bpsw);
|
break;
|
break;
|
case sim_rx_fintv_regnum:
|
case sim_rx_fintv_regnum:
|
size = sizeof (regs.r_fintv);
|
size = sizeof (regs.r_fintv);
|
break;
|
break;
|
case sim_rx_fpsw_regnum:
|
case sim_rx_fpsw_regnum:
|
size = sizeof (regs.r_fpsw);
|
size = sizeof (regs.r_fpsw);
|
break;
|
break;
|
default:
|
default:
|
size = 0;
|
size = 0;
|
break;
|
break;
|
}
|
}
|
return size;
|
return size;
|
}
|
}
|
|
|
int
|
int
|
sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
|
sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
|
{
|
{
|
size_t size;
|
size_t size;
|
DI val;
|
DI val;
|
|
|
check_desc (sd);
|
check_desc (sd);
|
|
|
if (!check_regno (regno))
|
if (!check_regno (regno))
|
return 0;
|
return 0;
|
|
|
size = reg_size (regno);
|
size = reg_size (regno);
|
|
|
if (length != size)
|
if (length != size)
|
return 0;
|
return 0;
|
|
|
switch (regno)
|
switch (regno)
|
{
|
{
|
case sim_rx_r0_regnum:
|
case sim_rx_r0_regnum:
|
val = get_reg (0);
|
val = get_reg (0);
|
break;
|
break;
|
case sim_rx_r1_regnum:
|
case sim_rx_r1_regnum:
|
val = get_reg (1);
|
val = get_reg (1);
|
break;
|
break;
|
case sim_rx_r2_regnum:
|
case sim_rx_r2_regnum:
|
val = get_reg (2);
|
val = get_reg (2);
|
break;
|
break;
|
case sim_rx_r3_regnum:
|
case sim_rx_r3_regnum:
|
val = get_reg (3);
|
val = get_reg (3);
|
break;
|
break;
|
case sim_rx_r4_regnum:
|
case sim_rx_r4_regnum:
|
val = get_reg (4);
|
val = get_reg (4);
|
break;
|
break;
|
case sim_rx_r5_regnum:
|
case sim_rx_r5_regnum:
|
val = get_reg (5);
|
val = get_reg (5);
|
break;
|
break;
|
case sim_rx_r6_regnum:
|
case sim_rx_r6_regnum:
|
val = get_reg (6);
|
val = get_reg (6);
|
break;
|
break;
|
case sim_rx_r7_regnum:
|
case sim_rx_r7_regnum:
|
val = get_reg (7);
|
val = get_reg (7);
|
break;
|
break;
|
case sim_rx_r8_regnum:
|
case sim_rx_r8_regnum:
|
val = get_reg (8);
|
val = get_reg (8);
|
break;
|
break;
|
case sim_rx_r9_regnum:
|
case sim_rx_r9_regnum:
|
val = get_reg (9);
|
val = get_reg (9);
|
break;
|
break;
|
case sim_rx_r10_regnum:
|
case sim_rx_r10_regnum:
|
val = get_reg (10);
|
val = get_reg (10);
|
break;
|
break;
|
case sim_rx_r11_regnum:
|
case sim_rx_r11_regnum:
|
val = get_reg (11);
|
val = get_reg (11);
|
break;
|
break;
|
case sim_rx_r12_regnum:
|
case sim_rx_r12_regnum:
|
val = get_reg (12);
|
val = get_reg (12);
|
break;
|
break;
|
case sim_rx_r13_regnum:
|
case sim_rx_r13_regnum:
|
val = get_reg (13);
|
val = get_reg (13);
|
break;
|
break;
|
case sim_rx_r14_regnum:
|
case sim_rx_r14_regnum:
|
val = get_reg (14);
|
val = get_reg (14);
|
break;
|
break;
|
case sim_rx_r15_regnum:
|
case sim_rx_r15_regnum:
|
val = get_reg (15);
|
val = get_reg (15);
|
break;
|
break;
|
case sim_rx_isp_regnum:
|
case sim_rx_isp_regnum:
|
val = get_reg (isp);
|
val = get_reg (isp);
|
break;
|
break;
|
case sim_rx_usp_regnum:
|
case sim_rx_usp_regnum:
|
val = get_reg (usp);
|
val = get_reg (usp);
|
break;
|
break;
|
case sim_rx_intb_regnum:
|
case sim_rx_intb_regnum:
|
val = get_reg (intb);
|
val = get_reg (intb);
|
break;
|
break;
|
case sim_rx_pc_regnum:
|
case sim_rx_pc_regnum:
|
val = get_reg (pc);
|
val = get_reg (pc);
|
break;
|
break;
|
case sim_rx_ps_regnum:
|
case sim_rx_ps_regnum:
|
val = get_reg (psw);
|
val = get_reg (psw);
|
break;
|
break;
|
case sim_rx_bpc_regnum:
|
case sim_rx_bpc_regnum:
|
val = get_reg (bpc);
|
val = get_reg (bpc);
|
break;
|
break;
|
case sim_rx_bpsw_regnum:
|
case sim_rx_bpsw_regnum:
|
val = get_reg (bpsw);
|
val = get_reg (bpsw);
|
break;
|
break;
|
case sim_rx_fintv_regnum:
|
case sim_rx_fintv_regnum:
|
val = get_reg (fintv);
|
val = get_reg (fintv);
|
break;
|
break;
|
case sim_rx_fpsw_regnum:
|
case sim_rx_fpsw_regnum:
|
val = get_reg (fpsw);
|
val = get_reg (fpsw);
|
break;
|
break;
|
default:
|
default:
|
fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
|
fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
|
regno);
|
regno);
|
return -1;
|
return -1;
|
}
|
}
|
|
|
if (rx_big_endian)
|
if (rx_big_endian)
|
put_be (buf, length, val);
|
put_be (buf, length, val);
|
else
|
else
|
put_le (buf, length, val);
|
put_le (buf, length, val);
|
|
|
return size;
|
return size;
|
}
|
}
|
|
|
int
|
int
|
sim_store_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
|
sim_store_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
|
{
|
{
|
size_t size;
|
size_t size;
|
DI val;
|
DI val;
|
|
|
check_desc (sd);
|
check_desc (sd);
|
|
|
if (!check_regno (regno))
|
if (!check_regno (regno))
|
return 0;
|
return 0;
|
|
|
size = reg_size (regno);
|
size = reg_size (regno);
|
|
|
if (length != size)
|
if (length != size)
|
return 0;
|
return 0;
|
|
|
if (rx_big_endian)
|
if (rx_big_endian)
|
val = get_be (buf, length);
|
val = get_be (buf, length);
|
else
|
else
|
val = get_le (buf, length);
|
val = get_le (buf, length);
|
|
|
switch (regno)
|
switch (regno)
|
{
|
{
|
case sim_rx_r0_regnum:
|
case sim_rx_r0_regnum:
|
put_reg (0, val);
|
put_reg (0, val);
|
break;
|
break;
|
case sim_rx_r1_regnum:
|
case sim_rx_r1_regnum:
|
put_reg (1, val);
|
put_reg (1, val);
|
break;
|
break;
|
case sim_rx_r2_regnum:
|
case sim_rx_r2_regnum:
|
put_reg (2, val);
|
put_reg (2, val);
|
break;
|
break;
|
case sim_rx_r3_regnum:
|
case sim_rx_r3_regnum:
|
put_reg (3, val);
|
put_reg (3, val);
|
break;
|
break;
|
case sim_rx_r4_regnum:
|
case sim_rx_r4_regnum:
|
put_reg (4, val);
|
put_reg (4, val);
|
break;
|
break;
|
case sim_rx_r5_regnum:
|
case sim_rx_r5_regnum:
|
put_reg (5, val);
|
put_reg (5, val);
|
break;
|
break;
|
case sim_rx_r6_regnum:
|
case sim_rx_r6_regnum:
|
put_reg (6, val);
|
put_reg (6, val);
|
break;
|
break;
|
case sim_rx_r7_regnum:
|
case sim_rx_r7_regnum:
|
put_reg (7, val);
|
put_reg (7, val);
|
break;
|
break;
|
case sim_rx_r8_regnum:
|
case sim_rx_r8_regnum:
|
put_reg (8, val);
|
put_reg (8, val);
|
break;
|
break;
|
case sim_rx_r9_regnum:
|
case sim_rx_r9_regnum:
|
put_reg (9, val);
|
put_reg (9, val);
|
break;
|
break;
|
case sim_rx_r10_regnum:
|
case sim_rx_r10_regnum:
|
put_reg (10, val);
|
put_reg (10, val);
|
break;
|
break;
|
case sim_rx_r11_regnum:
|
case sim_rx_r11_regnum:
|
put_reg (11, val);
|
put_reg (11, val);
|
break;
|
break;
|
case sim_rx_r12_regnum:
|
case sim_rx_r12_regnum:
|
put_reg (12, val);
|
put_reg (12, val);
|
break;
|
break;
|
case sim_rx_r13_regnum:
|
case sim_rx_r13_regnum:
|
put_reg (13, val);
|
put_reg (13, val);
|
break;
|
break;
|
case sim_rx_r14_regnum:
|
case sim_rx_r14_regnum:
|
put_reg (14, val);
|
put_reg (14, val);
|
break;
|
break;
|
case sim_rx_r15_regnum:
|
case sim_rx_r15_regnum:
|
put_reg (15, val);
|
put_reg (15, val);
|
break;
|
break;
|
case sim_rx_isp_regnum:
|
case sim_rx_isp_regnum:
|
put_reg (isp, val);
|
put_reg (isp, val);
|
break;
|
break;
|
case sim_rx_usp_regnum:
|
case sim_rx_usp_regnum:
|
put_reg (usp, val);
|
put_reg (usp, val);
|
break;
|
break;
|
case sim_rx_intb_regnum:
|
case sim_rx_intb_regnum:
|
put_reg (intb, val);
|
put_reg (intb, val);
|
break;
|
break;
|
case sim_rx_pc_regnum:
|
case sim_rx_pc_regnum:
|
put_reg (pc, val);
|
put_reg (pc, val);
|
break;
|
break;
|
case sim_rx_ps_regnum:
|
case sim_rx_ps_regnum:
|
put_reg (psw, val);
|
put_reg (psw, val);
|
break;
|
break;
|
case sim_rx_bpc_regnum:
|
case sim_rx_bpc_regnum:
|
put_reg (bpc, val);
|
put_reg (bpc, val);
|
break;
|
break;
|
case sim_rx_bpsw_regnum:
|
case sim_rx_bpsw_regnum:
|
put_reg (bpsw, val);
|
put_reg (bpsw, val);
|
break;
|
break;
|
case sim_rx_fintv_regnum:
|
case sim_rx_fintv_regnum:
|
put_reg (fintv, val);
|
put_reg (fintv, val);
|
break;
|
break;
|
case sim_rx_fpsw_regnum:
|
case sim_rx_fpsw_regnum:
|
put_reg (fpsw, val);
|
put_reg (fpsw, val);
|
break;
|
break;
|
default:
|
default:
|
fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
|
fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
|
regno);
|
regno);
|
return -1;
|
return -1;
|
}
|
}
|
|
|
return size;
|
return size;
|
}
|
}
|
|
|
void
|
void
|
sim_info (SIM_DESC sd, int verbose)
|
sim_info (SIM_DESC sd, int verbose)
|
{
|
{
|
check_desc (sd);
|
check_desc (sd);
|
|
|
printf ("The rx minisim doesn't collect any statistics.\n");
|
printf ("The rx minisim doesn't collect any statistics.\n");
|
}
|
}
|
|
|
static volatile int stop;
|
static volatile int stop;
|
static enum sim_stop reason;
|
static enum sim_stop reason;
|
int siggnal;
|
int siggnal;
|
|
|
|
|
/* Given a signal number used by the RX bsp (that is, newlib),
|
/* Given a signal number used by the RX bsp (that is, newlib),
|
return a host signal number. (Oddly, the gdb/sim interface uses
|
return a host signal number. (Oddly, the gdb/sim interface uses
|
host signal numbers...) */
|
host signal numbers...) */
|
int
|
int
|
rx_signal_to_host (int rx)
|
rx_signal_to_host (int rx)
|
{
|
{
|
switch (rx)
|
switch (rx)
|
{
|
{
|
case 4:
|
case 4:
|
#ifdef SIGILL
|
#ifdef SIGILL
|
return SIGILL;
|
return SIGILL;
|
#else
|
#else
|
return SIGSEGV;
|
return SIGSEGV;
|
#endif
|
#endif
|
|
|
case 5:
|
case 5:
|
return SIGTRAP;
|
return SIGTRAP;
|
|
|
case 10:
|
case 10:
|
#ifdef SIGBUS
|
#ifdef SIGBUS
|
return SIGBUS;
|
return SIGBUS;
|
#else
|
#else
|
return SIGSEGV;
|
return SIGSEGV;
|
#endif
|
#endif
|
|
|
case 11:
|
case 11:
|
return SIGSEGV;
|
return SIGSEGV;
|
|
|
case 24:
|
case 24:
|
#ifdef SIGXCPU
|
#ifdef SIGXCPU
|
return SIGXCPU;
|
return SIGXCPU;
|
#else
|
#else
|
break;
|
break;
|
#endif
|
#endif
|
|
|
case 2:
|
case 2:
|
return SIGINT;
|
return SIGINT;
|
|
|
case 8:
|
case 8:
|
#ifdef SIGFPE
|
#ifdef SIGFPE
|
return SIGFPE;
|
return SIGFPE;
|
#else
|
#else
|
break;
|
break;
|
#endif
|
#endif
|
|
|
case 6:
|
case 6:
|
return SIGABRT;
|
return SIGABRT;
|
}
|
}
|
|
|
return 0;
|
return 0;
|
}
|
}
|
|
|
|
|
/* Take a step return code RC and set up the variables consulted by
|
/* Take a step return code RC and set up the variables consulted by
|
sim_stop_reason appropriately. */
|
sim_stop_reason appropriately. */
|
void
|
void
|
handle_step (int rc)
|
handle_step (int rc)
|
{
|
{
|
if (execution_error_get_last_error () != SIM_ERR_NONE)
|
if (execution_error_get_last_error () != SIM_ERR_NONE)
|
{
|
{
|
reason = sim_stopped;
|
reason = sim_stopped;
|
siggnal = TARGET_SIGNAL_SEGV;
|
siggnal = TARGET_SIGNAL_SEGV;
|
}
|
}
|
if (RX_STEPPED (rc) || RX_HIT_BREAK (rc))
|
if (RX_STEPPED (rc) || RX_HIT_BREAK (rc))
|
{
|
{
|
reason = sim_stopped;
|
reason = sim_stopped;
|
siggnal = TARGET_SIGNAL_TRAP;
|
siggnal = TARGET_SIGNAL_TRAP;
|
}
|
}
|
else if (RX_STOPPED (rc))
|
else if (RX_STOPPED (rc))
|
{
|
{
|
reason = sim_stopped;
|
reason = sim_stopped;
|
siggnal = rx_signal_to_host (RX_STOP_SIG (rc));
|
siggnal = rx_signal_to_host (RX_STOP_SIG (rc));
|
}
|
}
|
else
|
else
|
{
|
{
|
assert (RX_EXITED (rc));
|
assert (RX_EXITED (rc));
|
reason = sim_exited;
|
reason = sim_exited;
|
siggnal = RX_EXIT_STATUS (rc);
|
siggnal = RX_EXIT_STATUS (rc);
|
}
|
}
|
}
|
}
|
|
|
|
|
void
|
void
|
sim_resume (SIM_DESC sd, int step, int sig_to_deliver)
|
sim_resume (SIM_DESC sd, int step, int sig_to_deliver)
|
{
|
{
|
check_desc (sd);
|
check_desc (sd);
|
|
|
if (sig_to_deliver != 0)
|
if (sig_to_deliver != 0)
|
{
|
{
|
fprintf (stderr,
|
fprintf (stderr,
|
"Warning: the rx minisim does not implement "
|
"Warning: the rx minisim does not implement "
|
"signal delivery yet.\n" "Resuming with no signal.\n");
|
"signal delivery yet.\n" "Resuming with no signal.\n");
|
}
|
}
|
|
|
execution_error_clear_last_error ();
|
execution_error_clear_last_error ();
|
|
|
if (step)
|
if (step)
|
handle_step (decode_opcode ());
|
handle_step (decode_opcode ());
|
else
|
else
|
{
|
{
|
/* We don't clear 'stop' here, because then we would miss
|
/* We don't clear 'stop' here, because then we would miss
|
interrupts that arrived on the way here. Instead, we clear
|
interrupts that arrived on the way here. Instead, we clear
|
the flag in sim_stop_reason, after GDB has disabled the
|
the flag in sim_stop_reason, after GDB has disabled the
|
interrupt signal handler. */
|
interrupt signal handler. */
|
for (;;)
|
for (;;)
|
{
|
{
|
if (stop)
|
if (stop)
|
{
|
{
|
stop = 0;
|
stop = 0;
|
reason = sim_stopped;
|
reason = sim_stopped;
|
siggnal = TARGET_SIGNAL_INT;
|
siggnal = TARGET_SIGNAL_INT;
|
break;
|
break;
|
}
|
}
|
|
|
int rc = decode_opcode ();
|
int rc = decode_opcode ();
|
|
|
if (execution_error_get_last_error () != SIM_ERR_NONE)
|
if (execution_error_get_last_error () != SIM_ERR_NONE)
|
{
|
{
|
reason = sim_stopped;
|
reason = sim_stopped;
|
siggnal = TARGET_SIGNAL_SEGV;
|
siggnal = TARGET_SIGNAL_SEGV;
|
break;
|
break;
|
}
|
}
|
|
|
if (!RX_STEPPED (rc))
|
if (!RX_STEPPED (rc))
|
{
|
{
|
handle_step (rc);
|
handle_step (rc);
|
break;
|
break;
|
}
|
}
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
int
|
int
|
sim_stop (SIM_DESC sd)
|
sim_stop (SIM_DESC sd)
|
{
|
{
|
stop = 1;
|
stop = 1;
|
|
|
return 1;
|
return 1;
|
}
|
}
|
|
|
void
|
void
|
sim_stop_reason (SIM_DESC sd, enum sim_stop *reason_p, int *sigrc_p)
|
sim_stop_reason (SIM_DESC sd, enum sim_stop *reason_p, int *sigrc_p)
|
{
|
{
|
check_desc (sd);
|
check_desc (sd);
|
|
|
*reason_p = reason;
|
*reason_p = reason;
|
*sigrc_p = siggnal;
|
*sigrc_p = siggnal;
|
}
|
}
|
|
|
void
|
void
|
sim_do_command (SIM_DESC sd, char *cmd)
|
sim_do_command (SIM_DESC sd, char *cmd)
|
{
|
{
|
check_desc (sd);
|
check_desc (sd);
|
|
|
char *p = cmd;
|
char *p = cmd;
|
|
|
/* Skip leading whitespace. */
|
/* Skip leading whitespace. */
|
while (isspace (*p))
|
while (isspace (*p))
|
p++;
|
p++;
|
|
|
/* Find the extent of the command word. */
|
/* Find the extent of the command word. */
|
for (p = cmd; *p; p++)
|
for (p = cmd; *p; p++)
|
if (isspace (*p))
|
if (isspace (*p))
|
break;
|
break;
|
|
|
/* Null-terminate the command word, and record the start of any
|
/* Null-terminate the command word, and record the start of any
|
further arguments. */
|
further arguments. */
|
char *args;
|
char *args;
|
if (*p)
|
if (*p)
|
{
|
{
|
*p = '\0';
|
*p = '\0';
|
args = p + 1;
|
args = p + 1;
|
while (isspace (*args))
|
while (isspace (*args))
|
args++;
|
args++;
|
}
|
}
|
else
|
else
|
args = p;
|
args = p;
|
|
|
if (strcmp (cmd, "trace") == 0)
|
if (strcmp (cmd, "trace") == 0)
|
{
|
{
|
if (strcmp (args, "on") == 0)
|
if (strcmp (args, "on") == 0)
|
trace = 1;
|
trace = 1;
|
else if (strcmp (args, "off") == 0)
|
else if (strcmp (args, "off") == 0)
|
trace = 0;
|
trace = 0;
|
else
|
else
|
printf ("The 'sim trace' command expects 'on' or 'off' "
|
printf ("The 'sim trace' command expects 'on' or 'off' "
|
"as an argument.\n");
|
"as an argument.\n");
|
}
|
}
|
else if (strcmp (cmd, "verbose") == 0)
|
else if (strcmp (cmd, "verbose") == 0)
|
{
|
{
|
if (strcmp (args, "on") == 0)
|
if (strcmp (args, "on") == 0)
|
verbose = 1;
|
verbose = 1;
|
else if (strcmp (args, "off") == 0)
|
else if (strcmp (args, "off") == 0)
|
verbose = 0;
|
verbose = 0;
|
else
|
else
|
printf ("The 'sim verbose' command expects 'on' or 'off'"
|
printf ("The 'sim verbose' command expects 'on' or 'off'"
|
" as an argument.\n");
|
" as an argument.\n");
|
}
|
}
|
else
|
else
|
printf ("The 'sim' command expects either 'trace' or 'verbose'"
|
printf ("The 'sim' command expects either 'trace' or 'verbose'"
|
" as a subcommand.\n");
|
" as a subcommand.\n");
|
}
|
}
|
|
|
