OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [sh64/] [cpu.c] - Diff between revs 834 and 842

Only display areas with differences | Details | Blame | View Log

Rev 834 Rev 842
/* Misc. support for CPU family sh64.
/* Misc. support for CPU family sh64.
 
 
THIS FILE IS MACHINE GENERATED WITH CGEN.
THIS FILE IS MACHINE GENERATED WITH CGEN.
 
 
Copyright 1996-2010 Free Software Foundation, Inc.
Copyright 1996-2010 Free Software Foundation, Inc.
 
 
This file is part of the GNU simulators.
This file is part of the GNU simulators.
 
 
   This file is free software; you can redistribute it and/or modify
   This file is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   the Free Software Foundation; either version 3, or (at your option)
   any later version.
   any later version.
 
 
   It is distributed in the hope that it will be useful, but WITHOUT
   It is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.
   License for more details.
 
 
   You should have received a copy of the GNU General Public License along
   You should have received a copy of the GNU General Public License along
   with this program; if not, write to the Free Software Foundation, Inc.,
   with this program; if not, write to the Free Software Foundation, Inc.,
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 
*/
*/
 
 
#define WANT_CPU sh64
#define WANT_CPU sh64
#define WANT_CPU_SH64
#define WANT_CPU_SH64
 
 
#include "sim-main.h"
#include "sim-main.h"
#include "cgen-ops.h"
#include "cgen-ops.h"
 
 
/* Get the value of h-pc.  */
/* Get the value of h-pc.  */
 
 
UDI
UDI
sh64_h_pc_get (SIM_CPU *current_cpu)
sh64_h_pc_get (SIM_CPU *current_cpu)
{
{
  return GET_H_PC ();
  return GET_H_PC ();
}
}
 
 
/* Set a value for h-pc.  */
/* Set a value for h-pc.  */
 
 
void
void
sh64_h_pc_set (SIM_CPU *current_cpu, UDI newval)
sh64_h_pc_set (SIM_CPU *current_cpu, UDI newval)
{
{
  SET_H_PC (newval);
  SET_H_PC (newval);
}
}
 
 
/* Get the value of h-gr.  */
/* Get the value of h-gr.  */
 
 
DI
DI
sh64_h_gr_get (SIM_CPU *current_cpu, UINT regno)
sh64_h_gr_get (SIM_CPU *current_cpu, UINT regno)
{
{
  return GET_H_GR (regno);
  return GET_H_GR (regno);
}
}
 
 
/* Set a value for h-gr.  */
/* Set a value for h-gr.  */
 
 
void
void
sh64_h_gr_set (SIM_CPU *current_cpu, UINT regno, DI newval)
sh64_h_gr_set (SIM_CPU *current_cpu, UINT regno, DI newval)
{
{
  SET_H_GR (regno, newval);
  SET_H_GR (regno, newval);
}
}
 
 
/* Get the value of h-grc.  */
/* Get the value of h-grc.  */
 
 
SI
SI
sh64_h_grc_get (SIM_CPU *current_cpu, UINT regno)
sh64_h_grc_get (SIM_CPU *current_cpu, UINT regno)
{
{
  return GET_H_GRC (regno);
  return GET_H_GRC (regno);
}
}
 
 
/* Set a value for h-grc.  */
/* Set a value for h-grc.  */
 
 
void
void
sh64_h_grc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
sh64_h_grc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
{
{
  SET_H_GRC (regno, newval);
  SET_H_GRC (regno, newval);
}
}
 
 
/* Get the value of h-cr.  */
/* Get the value of h-cr.  */
 
 
DI
DI
sh64_h_cr_get (SIM_CPU *current_cpu, UINT regno)
sh64_h_cr_get (SIM_CPU *current_cpu, UINT regno)
{
{
  return GET_H_CR (regno);
  return GET_H_CR (regno);
}
}
 
 
/* Set a value for h-cr.  */
/* Set a value for h-cr.  */
 
 
void
void
sh64_h_cr_set (SIM_CPU *current_cpu, UINT regno, DI newval)
sh64_h_cr_set (SIM_CPU *current_cpu, UINT regno, DI newval)
{
{
  SET_H_CR (regno, newval);
  SET_H_CR (regno, newval);
}
}
 
 
/* Get the value of h-sr.  */
/* Get the value of h-sr.  */
 
 
SI
SI
sh64_h_sr_get (SIM_CPU *current_cpu)
sh64_h_sr_get (SIM_CPU *current_cpu)
{
{
  return CPU (h_sr);
  return CPU (h_sr);
}
}
 
 
/* Set a value for h-sr.  */
/* Set a value for h-sr.  */
 
 
void
void
sh64_h_sr_set (SIM_CPU *current_cpu, SI newval)
sh64_h_sr_set (SIM_CPU *current_cpu, SI newval)
{
{
  CPU (h_sr) = newval;
  CPU (h_sr) = newval;
}
}
 
 
/* Get the value of h-fpscr.  */
/* Get the value of h-fpscr.  */
 
 
SI
SI
sh64_h_fpscr_get (SIM_CPU *current_cpu)
sh64_h_fpscr_get (SIM_CPU *current_cpu)
{
{
  return CPU (h_fpscr);
  return CPU (h_fpscr);
}
}
 
 
/* Set a value for h-fpscr.  */
/* Set a value for h-fpscr.  */
 
 
void
void
sh64_h_fpscr_set (SIM_CPU *current_cpu, SI newval)
sh64_h_fpscr_set (SIM_CPU *current_cpu, SI newval)
{
{
  CPU (h_fpscr) = newval;
  CPU (h_fpscr) = newval;
}
}
 
 
/* Get the value of h-frbit.  */
/* Get the value of h-frbit.  */
 
 
BI
BI
sh64_h_frbit_get (SIM_CPU *current_cpu)
sh64_h_frbit_get (SIM_CPU *current_cpu)
{
{
  return GET_H_FRBIT ();
  return GET_H_FRBIT ();
}
}
 
 
/* Set a value for h-frbit.  */
/* Set a value for h-frbit.  */
 
 
void
void
sh64_h_frbit_set (SIM_CPU *current_cpu, BI newval)
sh64_h_frbit_set (SIM_CPU *current_cpu, BI newval)
{
{
  SET_H_FRBIT (newval);
  SET_H_FRBIT (newval);
}
}
 
 
/* Get the value of h-szbit.  */
/* Get the value of h-szbit.  */
 
 
BI
BI
sh64_h_szbit_get (SIM_CPU *current_cpu)
sh64_h_szbit_get (SIM_CPU *current_cpu)
{
{
  return GET_H_SZBIT ();
  return GET_H_SZBIT ();
}
}
 
 
/* Set a value for h-szbit.  */
/* Set a value for h-szbit.  */
 
 
void
void
sh64_h_szbit_set (SIM_CPU *current_cpu, BI newval)
sh64_h_szbit_set (SIM_CPU *current_cpu, BI newval)
{
{
  SET_H_SZBIT (newval);
  SET_H_SZBIT (newval);
}
}
 
 
/* Get the value of h-prbit.  */
/* Get the value of h-prbit.  */
 
 
BI
BI
sh64_h_prbit_get (SIM_CPU *current_cpu)
sh64_h_prbit_get (SIM_CPU *current_cpu)
{
{
  return GET_H_PRBIT ();
  return GET_H_PRBIT ();
}
}
 
 
/* Set a value for h-prbit.  */
/* Set a value for h-prbit.  */
 
 
void
void
sh64_h_prbit_set (SIM_CPU *current_cpu, BI newval)
sh64_h_prbit_set (SIM_CPU *current_cpu, BI newval)
{
{
  SET_H_PRBIT (newval);
  SET_H_PRBIT (newval);
}
}
 
 
/* Get the value of h-sbit.  */
/* Get the value of h-sbit.  */
 
 
BI
BI
sh64_h_sbit_get (SIM_CPU *current_cpu)
sh64_h_sbit_get (SIM_CPU *current_cpu)
{
{
  return GET_H_SBIT ();
  return GET_H_SBIT ();
}
}
 
 
/* Set a value for h-sbit.  */
/* Set a value for h-sbit.  */
 
 
void
void
sh64_h_sbit_set (SIM_CPU *current_cpu, BI newval)
sh64_h_sbit_set (SIM_CPU *current_cpu, BI newval)
{
{
  SET_H_SBIT (newval);
  SET_H_SBIT (newval);
}
}
 
 
/* Get the value of h-mbit.  */
/* Get the value of h-mbit.  */
 
 
BI
BI
sh64_h_mbit_get (SIM_CPU *current_cpu)
sh64_h_mbit_get (SIM_CPU *current_cpu)
{
{
  return GET_H_MBIT ();
  return GET_H_MBIT ();
}
}
 
 
/* Set a value for h-mbit.  */
/* Set a value for h-mbit.  */
 
 
void
void
sh64_h_mbit_set (SIM_CPU *current_cpu, BI newval)
sh64_h_mbit_set (SIM_CPU *current_cpu, BI newval)
{
{
  SET_H_MBIT (newval);
  SET_H_MBIT (newval);
}
}
 
 
/* Get the value of h-qbit.  */
/* Get the value of h-qbit.  */
 
 
BI
BI
sh64_h_qbit_get (SIM_CPU *current_cpu)
sh64_h_qbit_get (SIM_CPU *current_cpu)
{
{
  return GET_H_QBIT ();
  return GET_H_QBIT ();
}
}
 
 
/* Set a value for h-qbit.  */
/* Set a value for h-qbit.  */
 
 
void
void
sh64_h_qbit_set (SIM_CPU *current_cpu, BI newval)
sh64_h_qbit_set (SIM_CPU *current_cpu, BI newval)
{
{
  SET_H_QBIT (newval);
  SET_H_QBIT (newval);
}
}
 
 
/* Get the value of h-fr.  */
/* Get the value of h-fr.  */
 
 
SF
SF
sh64_h_fr_get (SIM_CPU *current_cpu, UINT regno)
sh64_h_fr_get (SIM_CPU *current_cpu, UINT regno)
{
{
  return CPU (h_fr[regno]);
  return CPU (h_fr[regno]);
}
}
 
 
/* Set a value for h-fr.  */
/* Set a value for h-fr.  */
 
 
void
void
sh64_h_fr_set (SIM_CPU *current_cpu, UINT regno, SF newval)
sh64_h_fr_set (SIM_CPU *current_cpu, UINT regno, SF newval)
{
{
  CPU (h_fr[regno]) = newval;
  CPU (h_fr[regno]) = newval;
}
}
 
 
/* Get the value of h-fp.  */
/* Get the value of h-fp.  */
 
 
SF
SF
sh64_h_fp_get (SIM_CPU *current_cpu, UINT regno)
sh64_h_fp_get (SIM_CPU *current_cpu, UINT regno)
{
{
  return GET_H_FP (regno);
  return GET_H_FP (regno);
}
}
 
 
/* Set a value for h-fp.  */
/* Set a value for h-fp.  */
 
 
void
void
sh64_h_fp_set (SIM_CPU *current_cpu, UINT regno, SF newval)
sh64_h_fp_set (SIM_CPU *current_cpu, UINT regno, SF newval)
{
{
  SET_H_FP (regno, newval);
  SET_H_FP (regno, newval);
}
}
 
 
/* Get the value of h-fv.  */
/* Get the value of h-fv.  */
 
 
SF
SF
sh64_h_fv_get (SIM_CPU *current_cpu, UINT regno)
sh64_h_fv_get (SIM_CPU *current_cpu, UINT regno)
{
{
  return GET_H_FV (regno);
  return GET_H_FV (regno);
}
}
 
 
/* Set a value for h-fv.  */
/* Set a value for h-fv.  */
 
 
void
void
sh64_h_fv_set (SIM_CPU *current_cpu, UINT regno, SF newval)
sh64_h_fv_set (SIM_CPU *current_cpu, UINT regno, SF newval)
{
{
  SET_H_FV (regno, newval);
  SET_H_FV (regno, newval);
}
}
 
 
/* Get the value of h-fmtx.  */
/* Get the value of h-fmtx.  */
 
 
SF
SF
sh64_h_fmtx_get (SIM_CPU *current_cpu, UINT regno)
sh64_h_fmtx_get (SIM_CPU *current_cpu, UINT regno)
{
{
  return GET_H_FMTX (regno);
  return GET_H_FMTX (regno);
}
}
 
 
/* Set a value for h-fmtx.  */
/* Set a value for h-fmtx.  */
 
 
void
void
sh64_h_fmtx_set (SIM_CPU *current_cpu, UINT regno, SF newval)
sh64_h_fmtx_set (SIM_CPU *current_cpu, UINT regno, SF newval)
{
{
  SET_H_FMTX (regno, newval);
  SET_H_FMTX (regno, newval);
}
}
 
 
/* Get the value of h-dr.  */
/* Get the value of h-dr.  */
 
 
DF
DF
sh64_h_dr_get (SIM_CPU *current_cpu, UINT regno)
sh64_h_dr_get (SIM_CPU *current_cpu, UINT regno)
{
{
  return GET_H_DR (regno);
  return GET_H_DR (regno);
}
}
 
 
/* Set a value for h-dr.  */
/* Set a value for h-dr.  */
 
 
void
void
sh64_h_dr_set (SIM_CPU *current_cpu, UINT regno, DF newval)
sh64_h_dr_set (SIM_CPU *current_cpu, UINT regno, DF newval)
{
{
  SET_H_DR (regno, newval);
  SET_H_DR (regno, newval);
}
}
 
 
/* Get the value of h-fsd.  */
/* Get the value of h-fsd.  */
 
 
DF
DF
sh64_h_fsd_get (SIM_CPU *current_cpu, UINT regno)
sh64_h_fsd_get (SIM_CPU *current_cpu, UINT regno)
{
{
  return GET_H_FSD (regno);
  return GET_H_FSD (regno);
}
}
 
 
/* Set a value for h-fsd.  */
/* Set a value for h-fsd.  */
 
 
void
void
sh64_h_fsd_set (SIM_CPU *current_cpu, UINT regno, DF newval)
sh64_h_fsd_set (SIM_CPU *current_cpu, UINT regno, DF newval)
{
{
  SET_H_FSD (regno, newval);
  SET_H_FSD (regno, newval);
}
}
 
 
/* Get the value of h-fmov.  */
/* Get the value of h-fmov.  */
 
 
DF
DF
sh64_h_fmov_get (SIM_CPU *current_cpu, UINT regno)
sh64_h_fmov_get (SIM_CPU *current_cpu, UINT regno)
{
{
  return GET_H_FMOV (regno);
  return GET_H_FMOV (regno);
}
}
 
 
/* Set a value for h-fmov.  */
/* Set a value for h-fmov.  */
 
 
void
void
sh64_h_fmov_set (SIM_CPU *current_cpu, UINT regno, DF newval)
sh64_h_fmov_set (SIM_CPU *current_cpu, UINT regno, DF newval)
{
{
  SET_H_FMOV (regno, newval);
  SET_H_FMOV (regno, newval);
}
}
 
 
/* Get the value of h-tr.  */
/* Get the value of h-tr.  */
 
 
DI
DI
sh64_h_tr_get (SIM_CPU *current_cpu, UINT regno)
sh64_h_tr_get (SIM_CPU *current_cpu, UINT regno)
{
{
  return CPU (h_tr[regno]);
  return CPU (h_tr[regno]);
}
}
 
 
/* Set a value for h-tr.  */
/* Set a value for h-tr.  */
 
 
void
void
sh64_h_tr_set (SIM_CPU *current_cpu, UINT regno, DI newval)
sh64_h_tr_set (SIM_CPU *current_cpu, UINT regno, DI newval)
{
{
  CPU (h_tr[regno]) = newval;
  CPU (h_tr[regno]) = newval;
}
}
 
 
/* Get the value of h-endian.  */
/* Get the value of h-endian.  */
 
 
BI
BI
sh64_h_endian_get (SIM_CPU *current_cpu)
sh64_h_endian_get (SIM_CPU *current_cpu)
{
{
  return GET_H_ENDIAN ();
  return GET_H_ENDIAN ();
}
}
 
 
/* Set a value for h-endian.  */
/* Set a value for h-endian.  */
 
 
void
void
sh64_h_endian_set (SIM_CPU *current_cpu, BI newval)
sh64_h_endian_set (SIM_CPU *current_cpu, BI newval)
{
{
  SET_H_ENDIAN (newval);
  SET_H_ENDIAN (newval);
}
}
 
 
/* Get the value of h-ism.  */
/* Get the value of h-ism.  */
 
 
BI
BI
sh64_h_ism_get (SIM_CPU *current_cpu)
sh64_h_ism_get (SIM_CPU *current_cpu)
{
{
  return GET_H_ISM ();
  return GET_H_ISM ();
}
}
 
 
/* Set a value for h-ism.  */
/* Set a value for h-ism.  */
 
 
void
void
sh64_h_ism_set (SIM_CPU *current_cpu, BI newval)
sh64_h_ism_set (SIM_CPU *current_cpu, BI newval)
{
{
  SET_H_ISM (newval);
  SET_H_ISM (newval);
}
}
 
 
/* Get the value of h-frc.  */
/* Get the value of h-frc.  */
 
 
SF
SF
sh64_h_frc_get (SIM_CPU *current_cpu, UINT regno)
sh64_h_frc_get (SIM_CPU *current_cpu, UINT regno)
{
{
  return GET_H_FRC (regno);
  return GET_H_FRC (regno);
}
}
 
 
/* Set a value for h-frc.  */
/* Set a value for h-frc.  */
 
 
void
void
sh64_h_frc_set (SIM_CPU *current_cpu, UINT regno, SF newval)
sh64_h_frc_set (SIM_CPU *current_cpu, UINT regno, SF newval)
{
{
  SET_H_FRC (regno, newval);
  SET_H_FRC (regno, newval);
}
}
 
 
/* Get the value of h-drc.  */
/* Get the value of h-drc.  */
 
 
DF
DF
sh64_h_drc_get (SIM_CPU *current_cpu, UINT regno)
sh64_h_drc_get (SIM_CPU *current_cpu, UINT regno)
{
{
  return GET_H_DRC (regno);
  return GET_H_DRC (regno);
}
}
 
 
/* Set a value for h-drc.  */
/* Set a value for h-drc.  */
 
 
void
void
sh64_h_drc_set (SIM_CPU *current_cpu, UINT regno, DF newval)
sh64_h_drc_set (SIM_CPU *current_cpu, UINT regno, DF newval)
{
{
  SET_H_DRC (regno, newval);
  SET_H_DRC (regno, newval);
}
}
 
 
/* Get the value of h-xf.  */
/* Get the value of h-xf.  */
 
 
SF
SF
sh64_h_xf_get (SIM_CPU *current_cpu, UINT regno)
sh64_h_xf_get (SIM_CPU *current_cpu, UINT regno)
{
{
  return GET_H_XF (regno);
  return GET_H_XF (regno);
}
}
 
 
/* Set a value for h-xf.  */
/* Set a value for h-xf.  */
 
 
void
void
sh64_h_xf_set (SIM_CPU *current_cpu, UINT regno, SF newval)
sh64_h_xf_set (SIM_CPU *current_cpu, UINT regno, SF newval)
{
{
  SET_H_XF (regno, newval);
  SET_H_XF (regno, newval);
}
}
 
 
/* Get the value of h-xd.  */
/* Get the value of h-xd.  */
 
 
DF
DF
sh64_h_xd_get (SIM_CPU *current_cpu, UINT regno)
sh64_h_xd_get (SIM_CPU *current_cpu, UINT regno)
{
{
  return GET_H_XD (regno);
  return GET_H_XD (regno);
}
}
 
 
/* Set a value for h-xd.  */
/* Set a value for h-xd.  */
 
 
void
void
sh64_h_xd_set (SIM_CPU *current_cpu, UINT regno, DF newval)
sh64_h_xd_set (SIM_CPU *current_cpu, UINT regno, DF newval)
{
{
  SET_H_XD (regno, newval);
  SET_H_XD (regno, newval);
}
}
 
 
/* Get the value of h-fvc.  */
/* Get the value of h-fvc.  */
 
 
SF
SF
sh64_h_fvc_get (SIM_CPU *current_cpu, UINT regno)
sh64_h_fvc_get (SIM_CPU *current_cpu, UINT regno)
{
{
  return GET_H_FVC (regno);
  return GET_H_FVC (regno);
}
}
 
 
/* Set a value for h-fvc.  */
/* Set a value for h-fvc.  */
 
 
void
void
sh64_h_fvc_set (SIM_CPU *current_cpu, UINT regno, SF newval)
sh64_h_fvc_set (SIM_CPU *current_cpu, UINT regno, SF newval)
{
{
  SET_H_FVC (regno, newval);
  SET_H_FVC (regno, newval);
}
}
 
 
/* Get the value of h-gbr.  */
/* Get the value of h-gbr.  */
 
 
SI
SI
sh64_h_gbr_get (SIM_CPU *current_cpu)
sh64_h_gbr_get (SIM_CPU *current_cpu)
{
{
  return GET_H_GBR ();
  return GET_H_GBR ();
}
}
 
 
/* Set a value for h-gbr.  */
/* Set a value for h-gbr.  */
 
 
void
void
sh64_h_gbr_set (SIM_CPU *current_cpu, SI newval)
sh64_h_gbr_set (SIM_CPU *current_cpu, SI newval)
{
{
  SET_H_GBR (newval);
  SET_H_GBR (newval);
}
}
 
 
/* Get the value of h-vbr.  */
/* Get the value of h-vbr.  */
 
 
SI
SI
sh64_h_vbr_get (SIM_CPU *current_cpu)
sh64_h_vbr_get (SIM_CPU *current_cpu)
{
{
  return GET_H_VBR ();
  return GET_H_VBR ();
}
}
 
 
/* Set a value for h-vbr.  */
/* Set a value for h-vbr.  */
 
 
void
void
sh64_h_vbr_set (SIM_CPU *current_cpu, SI newval)
sh64_h_vbr_set (SIM_CPU *current_cpu, SI newval)
{
{
  SET_H_VBR (newval);
  SET_H_VBR (newval);
}
}
 
 
/* Get the value of h-pr.  */
/* Get the value of h-pr.  */
 
 
SI
SI
sh64_h_pr_get (SIM_CPU *current_cpu)
sh64_h_pr_get (SIM_CPU *current_cpu)
{
{
  return GET_H_PR ();
  return GET_H_PR ();
}
}
 
 
/* Set a value for h-pr.  */
/* Set a value for h-pr.  */
 
 
void
void
sh64_h_pr_set (SIM_CPU *current_cpu, SI newval)
sh64_h_pr_set (SIM_CPU *current_cpu, SI newval)
{
{
  SET_H_PR (newval);
  SET_H_PR (newval);
}
}
 
 
/* Get the value of h-macl.  */
/* Get the value of h-macl.  */
 
 
SI
SI
sh64_h_macl_get (SIM_CPU *current_cpu)
sh64_h_macl_get (SIM_CPU *current_cpu)
{
{
  return GET_H_MACL ();
  return GET_H_MACL ();
}
}
 
 
/* Set a value for h-macl.  */
/* Set a value for h-macl.  */
 
 
void
void
sh64_h_macl_set (SIM_CPU *current_cpu, SI newval)
sh64_h_macl_set (SIM_CPU *current_cpu, SI newval)
{
{
  SET_H_MACL (newval);
  SET_H_MACL (newval);
}
}
 
 
/* Get the value of h-mach.  */
/* Get the value of h-mach.  */
 
 
SI
SI
sh64_h_mach_get (SIM_CPU *current_cpu)
sh64_h_mach_get (SIM_CPU *current_cpu)
{
{
  return GET_H_MACH ();
  return GET_H_MACH ();
}
}
 
 
/* Set a value for h-mach.  */
/* Set a value for h-mach.  */
 
 
void
void
sh64_h_mach_set (SIM_CPU *current_cpu, SI newval)
sh64_h_mach_set (SIM_CPU *current_cpu, SI newval)
{
{
  SET_H_MACH (newval);
  SET_H_MACH (newval);
}
}
 
 
/* Get the value of h-tbit.  */
/* Get the value of h-tbit.  */
 
 
BI
BI
sh64_h_tbit_get (SIM_CPU *current_cpu)
sh64_h_tbit_get (SIM_CPU *current_cpu)
{
{
  return GET_H_TBIT ();
  return GET_H_TBIT ();
}
}
 
 
/* Set a value for h-tbit.  */
/* Set a value for h-tbit.  */
 
 
void
void
sh64_h_tbit_set (SIM_CPU *current_cpu, BI newval)
sh64_h_tbit_set (SIM_CPU *current_cpu, BI newval)
{
{
  SET_H_TBIT (newval);
  SET_H_TBIT (newval);
}
}
 
 
/* Record trace results for INSN.  */
/* Record trace results for INSN.  */
 
 
void
void
sh64_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
sh64_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
                            int *indices, TRACE_RECORD *tr)
                            int *indices, TRACE_RECORD *tr)
{
{
}
}
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.