OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [d10v-elf/] [t-ae-st2w-im.s] - Diff between revs 834 and 842

Only display areas with differences | Details | Blame | View Log

Rev 834 Rev 842
.include "t-macros.i"
.include "t-macros.i"
 
 
        start
        start
 
 
        PSW_BITS = 0
        PSW_BITS = 0
        point_dmap_at_imem
        point_dmap_at_imem
        check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st2w
        check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st2w
 
 
        ldi r10, #0x4000
        ldi r10, #0x4000
        st2w r8, @r10-
        st2w r8, @r10-
 
 
        ldi r10, #0x4001
        ldi r10, #0x4001
test_st2w:
test_st2w:
        st2w r8,@r10-
        st2w r8,@r10-
        nop
        nop
        exit47
        exit47
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.