URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Go to most recent revision |
Only display areas with differences |
Details |
Blame |
View Log
Rev 227 |
Rev 816 |
# frv testcase for bgelr $ICCi,$hint
|
# frv testcase for bgelr $ICCi,$hint
|
# mach: all
|
# mach: all
|
|
|
.include "testutils.inc"
|
.include "testutils.inc"
|
|
|
start
|
start
|
|
|
.global bgelr
|
.global bgelr
|
bgelr:
|
bgelr:
|
set_spr_addr ok1,lr
|
set_spr_addr ok1,lr
|
set_icc 0x0 0
|
set_icc 0x0 0
|
bgelr icc0,0
|
bgelr icc0,0
|
fail
|
fail
|
ok1:
|
ok1:
|
set_spr_addr ok2,lr
|
set_spr_addr ok2,lr
|
set_icc 0x1 1
|
set_icc 0x1 1
|
bgelr icc1,1
|
bgelr icc1,1
|
fail
|
fail
|
ok2:
|
ok2:
|
set_spr_addr bad,lr
|
set_spr_addr bad,lr
|
set_icc 0x2 2
|
set_icc 0x2 2
|
bgelr icc2,2
|
bgelr icc2,2
|
|
|
set_spr_addr bad,lr
|
set_spr_addr bad,lr
|
set_icc 0x3 3
|
set_icc 0x3 3
|
bgelr icc3,3
|
bgelr icc3,3
|
|
|
set_spr_addr ok5,lr
|
set_spr_addr ok5,lr
|
set_icc 0x4 0
|
set_icc 0x4 0
|
bgelr icc0,0
|
bgelr icc0,0
|
fail
|
fail
|
ok5:
|
ok5:
|
set_spr_addr ok6,lr
|
set_spr_addr ok6,lr
|
set_icc 0x5 1
|
set_icc 0x5 1
|
bgelr icc1,1
|
bgelr icc1,1
|
fail
|
fail
|
ok6:
|
ok6:
|
set_spr_addr bad,lr
|
set_spr_addr bad,lr
|
set_icc 0x6 2
|
set_icc 0x6 2
|
bgelr icc2,2
|
bgelr icc2,2
|
|
|
set_spr_addr bad,lr
|
set_spr_addr bad,lr
|
set_icc 0x7 3
|
set_icc 0x7 3
|
bgelr icc3,3
|
bgelr icc3,3
|
|
|
set_spr_addr bad,lr
|
set_spr_addr bad,lr
|
set_icc 0x8 0
|
set_icc 0x8 0
|
bgelr icc0,0
|
bgelr icc0,0
|
|
|
set_spr_addr bad,lr
|
set_spr_addr bad,lr
|
set_icc 0x9 1
|
set_icc 0x9 1
|
bgelr icc1,1
|
bgelr icc1,1
|
|
|
set_spr_addr okb,lr
|
set_spr_addr okb,lr
|
set_icc 0xa 2
|
set_icc 0xa 2
|
bgelr icc2,2
|
bgelr icc2,2
|
fail
|
fail
|
okb:
|
okb:
|
set_spr_addr okc,lr
|
set_spr_addr okc,lr
|
set_icc 0xb 3
|
set_icc 0xb 3
|
bgelr icc3,3
|
bgelr icc3,3
|
fail
|
fail
|
okc:
|
okc:
|
set_spr_addr bad,lr
|
set_spr_addr bad,lr
|
set_icc 0xc 0
|
set_icc 0xc 0
|
bgelr icc0,0
|
bgelr icc0,0
|
|
|
set_spr_addr bad,lr
|
set_spr_addr bad,lr
|
set_icc 0xd 1
|
set_icc 0xd 1
|
bgelr icc1,1
|
bgelr icc1,1
|
|
|
set_spr_addr okf,lr
|
set_spr_addr okf,lr
|
set_icc 0xe 2
|
set_icc 0xe 2
|
bgelr icc2,2
|
bgelr icc2,2
|
fail
|
fail
|
okf:
|
okf:
|
set_spr_addr okg,lr
|
set_spr_addr okg,lr
|
set_icc 0xf 3
|
set_icc 0xf 3
|
bgelr icc3,3
|
bgelr icc3,3
|
fail
|
fail
|
okg:
|
okg:
|
pass
|
pass
|
bad:
|
bad:
|
fail
|
fail
|
|
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.