# frv testcase for stq $GRk,@($GRi,$GRj)
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# frv testcase for stq $GRk,@($GRi,$GRj)
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# mach: frv
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# mach: frv
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# as(frv): -mcpu=frv
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# as(frv): -mcpu=frv
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.include "testutils.inc"
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.include "testutils.inc"
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start
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start
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.global stq
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.global stq
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stq:
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stq:
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set_mem_limmed 0xbeef,0xdead,sp
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set_mem_limmed 0xbeef,0xdead,sp
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inc_gr_immed -4,sp
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inc_gr_immed -4,sp
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set_mem_limmed 0xdead,0xbeef,sp
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set_mem_limmed 0xdead,0xbeef,sp
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inc_gr_immed -4,sp
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inc_gr_immed -4,sp
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set_mem_limmed 0xdead,0xdead,sp
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set_mem_limmed 0xdead,0xdead,sp
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inc_gr_immed -4,sp
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inc_gr_immed -4,sp
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set_mem_limmed 0xbeef,0xbeef,sp
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set_mem_limmed 0xbeef,0xbeef,sp
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set_gr_immed 0,gr7
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set_gr_immed 0,gr7
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set_gr_limmed 0xbeef,0xdead,gr8
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set_gr_limmed 0xbeef,0xdead,gr8
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set_gr_limmed 0xdead,0xbeef,gr9
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set_gr_limmed 0xdead,0xbeef,gr9
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set_gr_limmed 0xdead,0xdead,gr10
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set_gr_limmed 0xdead,0xdead,gr10
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set_gr_limmed 0xbeef,0xbeef,gr11
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set_gr_limmed 0xbeef,0xbeef,gr11
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stq gr8,@(sp,gr7)
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stq gr8,@(sp,gr7)
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test_mem_limmed 0xbeef,0xdead,sp
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test_mem_limmed 0xbeef,0xdead,sp
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inc_gr_immed 4,sp
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inc_gr_immed 4,sp
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test_mem_limmed 0xdead,0xbeef,sp
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test_mem_limmed 0xdead,0xbeef,sp
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inc_gr_immed 4,sp
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inc_gr_immed 4,sp
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test_mem_limmed 0xdead,0xdead,sp
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test_mem_limmed 0xdead,0xdead,sp
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inc_gr_immed 4,sp
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inc_gr_immed 4,sp
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test_mem_limmed 0xbeef,0xbeef,sp
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test_mem_limmed 0xbeef,0xbeef,sp
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set_mem_limmed 0xbeef,0xdead,sp
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set_mem_limmed 0xbeef,0xdead,sp
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inc_gr_immed -4,sp
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inc_gr_immed -4,sp
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set_mem_limmed 0xdead,0xbeef,sp
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set_mem_limmed 0xdead,0xbeef,sp
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inc_gr_immed -4,sp
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inc_gr_immed -4,sp
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set_mem_limmed 0xdead,0xdead,sp
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set_mem_limmed 0xdead,0xdead,sp
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inc_gr_immed -4,sp
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inc_gr_immed -4,sp
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set_mem_limmed 0xbeef,0xbeef,sp
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set_mem_limmed 0xbeef,0xbeef,sp
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set_gr_gr sp,gr4 ; sp is gr1
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set_gr_gr sp,gr4 ; sp is gr1
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set_gr_limmed 0xbeef,0xdead,gr0
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set_gr_limmed 0xbeef,0xdead,gr0
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set_gr_limmed 0xdead,0xbeef,gr1
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set_gr_limmed 0xdead,0xbeef,gr1
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set_gr_limmed 0xdead,0xdead,gr2
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set_gr_limmed 0xdead,0xdead,gr2
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set_gr_limmed 0xbeef,0xbeef,gr3
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set_gr_limmed 0xbeef,0xbeef,gr3
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stq gr0,@(gr4,gr7)
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stq gr0,@(gr4,gr7)
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test_mem_immed 0,gr4
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test_mem_immed 0,gr4
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inc_gr_immed 4,gr4
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inc_gr_immed 4,gr4
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test_mem_immed 0,gr4
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test_mem_immed 0,gr4
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inc_gr_immed 4,gr4
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inc_gr_immed 4,gr4
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test_mem_immed 0,gr4
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test_mem_immed 0,gr4
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inc_gr_immed 4,gr4
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inc_gr_immed 4,gr4
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test_mem_immed 0,gr4
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test_mem_immed 0,gr4
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pass
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pass
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