#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,cp0-names=mips32
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#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,cp0-names=mips32
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#name: MIPS CP0 register disassembly (mips32)
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#name: MIPS CP0 register disassembly (mips32)
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#source: cp0-names.s
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#source: cp0-names.s
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# Check objdump's handling of -M cp0-names=foo options.
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# Check objdump's handling of -M cp0-names=foo options.
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.*: +file format .*mips.*
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.*: +file format .*mips.*
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Disassembly of section .text:
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Disassembly of section .text:
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0+0000 <[^>]*> 40800000 mtc0 \$0,c0_index
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0+0000 <[^>]*> 40800000 mtc0 \$0,c0_index
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0+0004 <[^>]*> 40800800 mtc0 \$0,c0_random
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0+0004 <[^>]*> 40800800 mtc0 \$0,c0_random
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0+0008 <[^>]*> 40801000 mtc0 \$0,c0_entrylo0
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0+0008 <[^>]*> 40801000 mtc0 \$0,c0_entrylo0
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0+000c <[^>]*> 40801800 mtc0 \$0,c0_entrylo1
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0+000c <[^>]*> 40801800 mtc0 \$0,c0_entrylo1
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0+0010 <[^>]*> 40802000 mtc0 \$0,c0_context
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0+0010 <[^>]*> 40802000 mtc0 \$0,c0_context
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0+0014 <[^>]*> 40802800 mtc0 \$0,c0_pagemask
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0+0014 <[^>]*> 40802800 mtc0 \$0,c0_pagemask
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0+0018 <[^>]*> 40803000 mtc0 \$0,c0_wired
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0+0018 <[^>]*> 40803000 mtc0 \$0,c0_wired
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0+001c <[^>]*> 40803800 mtc0 \$0,\$7
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0+001c <[^>]*> 40803800 mtc0 \$0,\$7
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0+0020 <[^>]*> 40804000 mtc0 \$0,c0_badvaddr
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0+0020 <[^>]*> 40804000 mtc0 \$0,c0_badvaddr
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0+0024 <[^>]*> 40804800 mtc0 \$0,c0_count
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0+0024 <[^>]*> 40804800 mtc0 \$0,c0_count
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0+0028 <[^>]*> 40805000 mtc0 \$0,c0_entryhi
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0+0028 <[^>]*> 40805000 mtc0 \$0,c0_entryhi
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0+002c <[^>]*> 40805800 mtc0 \$0,c0_compare
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0+002c <[^>]*> 40805800 mtc0 \$0,c0_compare
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0+0030 <[^>]*> 40806000 mtc0 \$0,c0_status
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0+0030 <[^>]*> 40806000 mtc0 \$0,c0_status
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0+0034 <[^>]*> 40806800 mtc0 \$0,c0_cause
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0+0034 <[^>]*> 40806800 mtc0 \$0,c0_cause
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0+0038 <[^>]*> 40807000 mtc0 \$0,c0_epc
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0+0038 <[^>]*> 40807000 mtc0 \$0,c0_epc
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0+003c <[^>]*> 40807800 mtc0 \$0,c0_prid
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0+003c <[^>]*> 40807800 mtc0 \$0,c0_prid
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0+0040 <[^>]*> 40808000 mtc0 \$0,c0_config
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0+0040 <[^>]*> 40808000 mtc0 \$0,c0_config
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0+0044 <[^>]*> 40808800 mtc0 \$0,c0_lladdr
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0+0044 <[^>]*> 40808800 mtc0 \$0,c0_lladdr
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0+0048 <[^>]*> 40809000 mtc0 \$0,c0_watchlo
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0+0048 <[^>]*> 40809000 mtc0 \$0,c0_watchlo
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0+004c <[^>]*> 40809800 mtc0 \$0,c0_watchhi
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0+004c <[^>]*> 40809800 mtc0 \$0,c0_watchhi
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0+0050 <[^>]*> 4080a000 mtc0 \$0,c0_xcontext
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0+0050 <[^>]*> 4080a000 mtc0 \$0,c0_xcontext
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0+0054 <[^>]*> 4080a800 mtc0 \$0,\$21
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0+0054 <[^>]*> 4080a800 mtc0 \$0,\$21
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0+0058 <[^>]*> 4080b000 mtc0 \$0,\$22
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0+0058 <[^>]*> 4080b000 mtc0 \$0,\$22
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0+005c <[^>]*> 4080b800 mtc0 \$0,c0_debug
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0+005c <[^>]*> 4080b800 mtc0 \$0,c0_debug
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0+0060 <[^>]*> 4080c000 mtc0 \$0,c0_depc
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0+0060 <[^>]*> 4080c000 mtc0 \$0,c0_depc
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0+0064 <[^>]*> 4080c800 mtc0 \$0,c0_perfcnt
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0+0064 <[^>]*> 4080c800 mtc0 \$0,c0_perfcnt
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0+0068 <[^>]*> 4080d000 mtc0 \$0,c0_errctl
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0+0068 <[^>]*> 4080d000 mtc0 \$0,c0_errctl
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0+006c <[^>]*> 4080d800 mtc0 \$0,c0_cacheerr
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0+006c <[^>]*> 4080d800 mtc0 \$0,c0_cacheerr
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0+0070 <[^>]*> 4080e000 mtc0 \$0,c0_taglo
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0+0070 <[^>]*> 4080e000 mtc0 \$0,c0_taglo
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0+0074 <[^>]*> 4080e800 mtc0 \$0,c0_taghi
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0+0074 <[^>]*> 4080e800 mtc0 \$0,c0_taghi
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0+0078 <[^>]*> 4080f000 mtc0 \$0,c0_errorepc
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0+0078 <[^>]*> 4080f000 mtc0 \$0,c0_errorepc
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0+007c <[^>]*> 4080f800 mtc0 \$0,c0_desave
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0+007c <[^>]*> 4080f800 mtc0 \$0,c0_desave
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\.\.\.
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\.\.\.
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