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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.18.50/] [ld/] [testsuite/] [ld-arm/] [armthumb-lib.d] - Diff between revs 38 and 156

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Rev 38 Rev 156
tmpdir/armthumb-lib.so:     file format elf32-(little|big)arm
tmpdir/armthumb-lib.so:     file format elf32-(little|big)arm
architecture: arm, flags 0x00000150:
architecture: arm, flags 0x00000150:
HAS_SYMS, DYNAMIC, D_PAGED
HAS_SYMS, DYNAMIC, D_PAGED
start address 0x.*
start address 0x.*
Disassembly of section .plt:
Disassembly of section .plt:
.* <.plt>:
.* <.plt>:
 .*:    e52de004        push    {lr}            ; \(str lr, \[sp, #-4\]!\)
 .*:    e52de004        push    {lr}            ; \(str lr, \[sp, #-4\]!\)
 .*:    e59fe004        ldr     lr, \[pc, #4\]  ; .* 
 .*:    e59fe004        ldr     lr, \[pc, #4\]  ; .* 
 .*:    e08fe00e        add     lr, pc, lr
 .*:    e08fe00e        add     lr, pc, lr
 .*:    e5bef008        ldr     pc, \[lr, #8\]!
 .*:    e5bef008        ldr     pc, \[lr, #8\]!
 .*:    .*
 .*:    .*
 .*:    e28fc6.*        add     ip, pc, #.*     ; 0x.*
 .*:    e28fc6.*        add     ip, pc, #.*     ; 0x.*
 .*:    e28cca.*        add     ip, ip, #.*     ; 0x.*
 .*:    e28cca.*        add     ip, ip, #.*     ; 0x.*
 .*:    e5bcf.*         ldr     pc, \[ip, #.*\]!
 .*:    e5bcf.*         ldr     pc, \[ip, #.*\]!
Disassembly of section .text:
Disassembly of section .text:
.* :
.* :
 .*:    e1a0c00d        mov     ip, sp
 .*:    e1a0c00d        mov     ip, sp
 .*:    e92dd800        push    {fp, ip, lr, pc}
 .*:    e92dd800        push    {fp, ip, lr, pc}
 .*:    ebfffff.        bl      .* 
 .*:    ebfffff.        bl      .* 
 .*:    e89d6800        ldm     sp, {fp, sp, lr}
 .*:    e89d6800        ldm     sp, {fp, sp, lr}
 .*:    e12fff1e        bx      lr
 .*:    e12fff1e        bx      lr
 .*:    e1a00000        nop                     \(mov r0,r0\)
 .*:    e1a00000        nop                     \(mov r0,r0\)
 .*:    e1a00000        nop                     \(mov r0,r0\)
 .*:    e1a00000        nop                     \(mov r0,r0\)
 .*:    e1a00000        nop                     \(mov r0,r0\)
 .*:    e1a00000        nop                     \(mov r0,r0\)
.* <__real_lib_func2>:
.* <__real_lib_func2>:
 .*:    4770            bx      lr
 .*:    4770            bx      lr
 .*:    46c0            nop                     \(mov r8, r8\)
 .*:    46c0            nop                     \(mov r8, r8\)
 .*:    46c0            nop                     \(mov r8, r8\)
 .*:    46c0            nop                     \(mov r8, r8\)
 .*:    46c0            nop                     \(mov r8, r8\)
 .*:    46c0            nop                     \(mov r8, r8\)
 .*:    46c0            nop                     \(mov r8, r8\)
 .*:    46c0            nop                     \(mov r8, r8\)
 .*:    46c0            nop                     \(mov r8, r8\)
 .*:    46c0            nop                     \(mov r8, r8\)
 .*:    46c0            nop                     \(mov r8, r8\)
 .*:    46c0            nop                     \(mov r8, r8\)
 .*:    46c0            nop                     \(mov r8, r8\)
 .*:    46c0            nop                     \(mov r8, r8\)
.* :
.* :
 .*:    e59fc004        ldr     ip, \[pc, #4\]  ; .* 
 .*:    e59fc004        ldr     ip, \[pc, #4\]  ; .* 
 .*:    e08cc00f        add     ip, ip, pc
 .*:    e08cc00f        add     ip, ip, pc
 .*:    e12fff1c        bx      ip
 .*:    e12fff1c        bx      ip
 .*:    ffffffe5        .*
 .*:    ffffffe5        .*
 
 

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