OpenCores

URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.18.50/] [ld/] [testsuite/] [ld-arm/] [tls-app.d] - Diff between revs 38 and 156

Go to most recent revision | Only display areas with differences | Details | Blame | View Log

Rev 38	Rev 156

`.: file format elf32-.arm`	`.: file format elf32-.arm`
`architecture: arm, flags 0x00000112:`	`architecture: arm, flags 0x00000112:`
`EXEC_P, HAS_SYMS, D_PAGED`	`EXEC_P, HAS_SYMS, D_PAGED`
`start address 0x00008204`	`start address 0x00008204`

`Disassembly of section .text:`	`Disassembly of section .text:`

`00008204 :`	`00008204 :`
`8204: e1a00000 nop \(mov r0,r0\)`	`8204: e1a00000 nop \(mov r0,r0\)`
`8208: e1a00000 nop \(mov r0,r0\)`	`8208: e1a00000 nop \(mov r0,r0\)`
`820c: e1a0f00e mov pc, lr`	`820c: e1a0f00e mov pc, lr`
`8210: 000080bc .word 0x000080bc`	`8210: 000080bc .word 0x000080bc`
`8214: 000080b4 .word 0x000080b4`	`8214: 000080b4 .word 0x000080b4`
`8218: 000080ac .word 0x000080ac`	`8218: 000080ac .word 0x000080ac`
`821c: 00000004 .word 0x00000004`	`821c: 00000004 .word 0x00000004`
`8220: 000080c4 .word 0x000080c4`	`8220: 000080c4 .word 0x000080c4`
`8224: 00000014 .word 0x00000014`	`8224: 00000014 .word 0x00000014`

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.