OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.2.2/] [gcc/] [config/] [arc/] [arc.opt] - Diff between revs 38 and 154

Go to most recent revision | Only display areas with differences | Details | Blame | View Log

Rev 38 Rev 154
; Options for the Argonaut ARC port of the compiler
; Options for the Argonaut ARC port of the compiler
;
;
; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
;
;
; This file is part of GCC.
; This file is part of GCC.
;
;
; GCC is free software; you can redistribute it and/or modify it under
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; Software Foundation; either version 3, or (at your option) any later
; version.
; version.
;
;
; GCC is distributed in the hope that it will be useful, but WITHOUT
; GCC is distributed in the hope that it will be useful, but WITHOUT
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
; License for more details.
; License for more details.
;
;
; You should have received a copy of the GNU General Public License
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3.  If not see
; along with GCC; see the file COPYING3.  If not see
; .
; .
malign-loops
malign-loops
Target Undocumented Report Mask(ALIGN_LOOPS)
Target Undocumented Report Mask(ALIGN_LOOPS)
mbig-endian
mbig-endian
Target Undocumented Report RejectNegative Mask(BIG_ENDIAN)
Target Undocumented Report RejectNegative Mask(BIG_ENDIAN)
mlittle-endian
mlittle-endian
Target Undocumented Report RejectNegative InverseMask(BIG_ENDIAN)
Target Undocumented Report RejectNegative InverseMask(BIG_ENDIAN)
mmangle-cpu
mmangle-cpu
Target Report Mask(MANGLE_CPU)
Target Report Mask(MANGLE_CPU)
Prepend the name of the cpu to all public symbol names
Prepend the name of the cpu to all public symbol names
; mmangle-cpu-libgcc
; mmangle-cpu-libgcc
; Target Undocumented Mask(MANGLE_CPU_LIBGC)
; Target Undocumented Mask(MANGLE_CPU_LIBGC)
mno-cond-exec
mno-cond-exec
Target Undocumented Report RejectNegative Mask(NO_COND_EXEC)
Target Undocumented Report RejectNegative Mask(NO_COND_EXEC)
mcpu=
mcpu=
Target RejectNegative Joined Var(arc_cpu_string) Init("base")
Target RejectNegative Joined Var(arc_cpu_string) Init("base")
-mcpu=CPU       Compile code for ARC variant CPU
-mcpu=CPU       Compile code for ARC variant CPU
mtext=
mtext=
Target RejectNegative Joined Var(arc_text_string) Init(ARC_DEFAULT_TEXT_SECTION)
Target RejectNegative Joined Var(arc_text_string) Init(ARC_DEFAULT_TEXT_SECTION)
-mtext=SECTION  Put functions in SECTION
-mtext=SECTION  Put functions in SECTION
mdata=
mdata=
Target RejectNegative Joined Var(arc_data_string) Init(ARC_DEFAULT_DATA_SECTION)
Target RejectNegative Joined Var(arc_data_string) Init(ARC_DEFAULT_DATA_SECTION)
-mdata=SECTION  Put data in SECTION
-mdata=SECTION  Put data in SECTION
mrodata=
mrodata=
Target RejectNegative Joined Var(arc_rodata_string) Init(ARC_DEFAULT_RODATA_SECTION)
Target RejectNegative Joined Var(arc_rodata_string) Init(ARC_DEFAULT_RODATA_SECTION)
-mrodata=SECTION        Put read-only data in SECTION
-mrodata=SECTION        Put read-only data in SECTION
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.