OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.2.2/] [gcc/] [config/] [mips/] [windiss.h] - Diff between revs 38 and 154

Go to most recent revision | Only display areas with differences | Details | Blame | View Log

Rev 38 Rev 154
/* Support for GCC on MIPS using WindISS simulator.
/* Support for GCC on MIPS using WindISS simulator.
   Copyright (C) 2002, 2003, 2004, 2007 Free Software Foundation, Inc.
   Copyright (C) 2002, 2003, 2004, 2007 Free Software Foundation, Inc.
   Contributed by CodeSourcery, LLC.
   Contributed by CodeSourcery, LLC.
 
 
This file is part of GCC.
This file is part of GCC.
 
 
GCC is free software; you can redistribute it and/or modify
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
the Free Software Foundation; either version 3, or (at your option)
any later version.
any later version.
 
 
GCC is distributed in the hope that it will be useful,
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.
GNU General Public License for more details.
 
 
You should have received a copy of the GNU General Public License
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3.  If not see
along with GCC; see the file COPYING3.  If not see
<http://www.gnu.org/licenses/>.  */
<http://www.gnu.org/licenses/>.  */
 
 
#undef TARGET_VERSION
#undef TARGET_VERSION
#define TARGET_VERSION fprintf (stderr, " (MIPS WindISS)");
#define TARGET_VERSION fprintf (stderr, " (MIPS WindISS)");
 
 
/* Combination of mips.h and svr4.h.  */
/* Combination of mips.h and svr4.h.  */
#undef  SWITCH_TAKES_ARG
#undef  SWITCH_TAKES_ARG
#define SWITCH_TAKES_ARG(CHAR)          \
#define SWITCH_TAKES_ARG(CHAR)          \
  (DEFAULT_SWITCH_TAKES_ARG (CHAR)      \
  (DEFAULT_SWITCH_TAKES_ARG (CHAR)      \
   || (CHAR) == 'G'                     \
   || (CHAR) == 'G'                     \
   || (CHAR) == 'h'                     \
   || (CHAR) == 'h'                     \
   || (CHAR) == 'x'                     \
   || (CHAR) == 'x'                     \
   || (CHAR) == 'z')
   || (CHAR) == 'z')
 
 
#undef SUBTARGET_CPP_SPEC
#undef SUBTARGET_CPP_SPEC
#define SUBTARGET_CPP_SPEC \
#define SUBTARGET_CPP_SPEC \
"%{!DCPU=*: %{mips3|mips4|mips64:-DCPU=MIPS64;:-DCPU=MIPS32}} \
"%{!DCPU=*: %{mips3|mips4|mips64:-DCPU=MIPS64;:-DCPU=MIPS32}} \
  %{EL|mel:-DMIPSEL;:-DMIPSEB} \
  %{EL|mel:-DMIPSEL;:-DMIPSEB} \
  %{msoft-float:-DSOFT_FLOAT} \
  %{msoft-float:-DSOFT_FLOAT} \
  %{mips1:-D_WRS_R3K_EXC_SUPPORT}"
  %{mips1:-D_WRS_R3K_EXC_SUPPORT}"
 
 
#undef  ASM_SPEC
#undef  ASM_SPEC
#define ASM_SPEC "\
#define ASM_SPEC "\
%{!G:-G 0} %{G*} %(endian_spec) %{mips1} %{mips2} %{mips3} %{mips4} \
%{!G:-G 0} %{G*} %(endian_spec) %{mips1} %{mips2} %{mips3} %{mips4} \
%{mips32} %{mips32r2} %{mips64} \
%{mips32} %{mips32r2} %{mips64} \
%{mips16:%{!mno-mips16:-mips16}} %{mno-mips16:-no-mips16} \
%{mips16:%{!mno-mips16:-mips16}} %{mno-mips16:-no-mips16} \
%(subtarget_asm_optimizing_spec) \
%(subtarget_asm_optimizing_spec) \
%(subtarget_asm_debugging_spec) \
%(subtarget_asm_debugging_spec) \
%{mabi=*} %{!mabi*: %(asm_abi_default_spec)} \
%{mabi=*} %{!mabi*: %(asm_abi_default_spec)} \
%{mgp32} %{mgp64} %{march=*} %{mxgot:-xgot} \
%{mgp32} %{mgp64} %{march=*} %{mxgot:-xgot} \
%{mtune=*} %{v} \
%{mtune=*} %{v} \
%(subtarget_asm_spec)"
%(subtarget_asm_spec)"
 
 
#undef LINK_SPEC
#undef LINK_SPEC
/* LINK_SPEC is clobbered in svr4.h. ugh!  */
/* LINK_SPEC is clobbered in svr4.h. ugh!  */
#define LINK_SPEC "\
#define LINK_SPEC "\
-m elf32mipswindiss \
-m elf32mipswindiss \
%{!G:-G 0} %{G*} %{mips1} %{mips2} %{mips3} %{mips4} %{mips32} %{mips64} \
%{!G:-G 0} %{G*} %{mips1} %{mips2} %{mips3} %{mips4} %{mips32} %{mips64} \
%{bestGnum}"
%{bestGnum}"
 
 
/* Diab libs MIPS{,E,F,L,M,W,X,Y,Z}{,H,N,S}
/* Diab libs MIPS{,E,F,L,M,W,X,Y,Z}{,H,N,S}
 
 
   .
   .
   E - Elf (small-data/const=8
   E - Elf (small-data/const=8
   F - Elf Far (small-data/const=0)
   F - Elf Far (small-data/const=0)
   L - Little Elf
   L - Little Elf
   M - Little Elf Far
   M - Little Elf Far
   W - elf32 bigmips
   W - elf32 bigmips
   X - elf32 bigmips (far?)
   X - elf32 bigmips (far?)
   Y - elf32 littlemips
   Y - elf32 littlemips
   Z - elf32 littlemips (far?)
   Z - elf32 littlemips (far?)
 
 
   . - Integer routines
   . - Integer routines
   H - Hard float
   H - Hard float
   N - No float
   N - No float
   S - Soft float
   S - Soft float
 
 
   Want {F,M}{,H,S}
   Want {F,M}{,H,S}
 
 
*/
*/
 
 
#undef LIB_SPEC
#undef LIB_SPEC
#define LIB_SPEC "--start-group -li -lcfp -lwindiss -lram -limpl -limpfp --end-group"
#define LIB_SPEC "--start-group -li -lcfp -lwindiss -lram -limpl -limpfp --end-group"
 
 
#undef STARTFILE_SPEC
#undef STARTFILE_SPEC
#define STARTFILE_SPEC "crt0.o%s crtbegin.o%s"
#define STARTFILE_SPEC "crt0.o%s crtbegin.o%s"
 
 
#undef ENDFILE_SPEC
#undef ENDFILE_SPEC
#define ENDFILE_SPEC "crtend.o%s"
#define ENDFILE_SPEC "crtend.o%s"
 
 
/* We have no shared libraries.  These two shouldn't be necessary.  */
/* We have no shared libraries.  These two shouldn't be necessary.  */
#undef LINK_SHLIB_SPEC
#undef LINK_SHLIB_SPEC
#define LINK_SHLIB_SPEC ""
#define LINK_SHLIB_SPEC ""
#undef LINK_EH_SPEC
#undef LINK_EH_SPEC
#define LINK_EH_SPEC ""
#define LINK_EH_SPEC ""
 
 
#undef CRTSAVRES_DEFAULT_SPEC
#undef CRTSAVRES_DEFAULT_SPEC
#define CRTSAVRES_DEFAULT_SPEC ""
#define CRTSAVRES_DEFAULT_SPEC ""
 
 
/* No sdata.  */
/* No sdata.  */
#undef MIPS_DEFAULT_GVALUE
#undef MIPS_DEFAULT_GVALUE
#define MIPS_DEFAULT_GVALUE 0
#define MIPS_DEFAULT_GVALUE 0
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.