/* Assembly functions for the Xtensa version of libgcc1.
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/* Assembly functions for the Xtensa version of libgcc1.
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Copyright (C) 2001, 2002, 2003, 2005, 2006 Free Software Foundation, Inc.
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Copyright (C) 2001, 2002, 2003, 2005, 2006 Free Software Foundation, Inc.
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Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
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Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
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This file is part of GCC.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 2, or (at your option) any later
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Software Foundation; either version 2, or (at your option) any later
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version.
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version.
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In addition to the permissions in the GNU General Public License, the
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In addition to the permissions in the GNU General Public License, the
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Free Software Foundation gives you unlimited permission to link the
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Free Software Foundation gives you unlimited permission to link the
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compiled version of this file into combinations with other programs,
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compiled version of this file into combinations with other programs,
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and to distribute those combinations without any restriction coming
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and to distribute those combinations without any restriction coming
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from the use of this file. (The General Public License restrictions
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from the use of this file. (The General Public License restrictions
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do apply in other respects; for example, they cover modification of
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do apply in other respects; for example, they cover modification of
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the file, and distribution when not linked into a combine
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the file, and distribution when not linked into a combine
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executable.)
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executable.)
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING. If not, write to the Free
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along with GCC; see the file COPYING. If not, write to the Free
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Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
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Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
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02110-1301, USA. */
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02110-1301, USA. */
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#include "xtensa-config.h"
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#include "xtensa-config.h"
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# Define macros for the ABS and ADDX* instructions to handle cases
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# Define macros for the ABS and ADDX* instructions to handle cases
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# where they are not included in the Xtensa processor configuration.
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# where they are not included in the Xtensa processor configuration.
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.macro do_abs dst, src, tmp
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.macro do_abs dst, src, tmp
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#if XCHAL_HAVE_ABS
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#if XCHAL_HAVE_ABS
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abs \dst, \src
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abs \dst, \src
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#else
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#else
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neg \tmp, \src
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neg \tmp, \src
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movgez \tmp, \src, \src
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movgez \tmp, \src, \src
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mov \dst, \tmp
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mov \dst, \tmp
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#endif
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#endif
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.endm
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.endm
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.macro do_addx2 dst, as, at, tmp
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.macro do_addx2 dst, as, at, tmp
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#if XCHAL_HAVE_ADDX
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#if XCHAL_HAVE_ADDX
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addx2 \dst, \as, \at
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addx2 \dst, \as, \at
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#else
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#else
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slli \tmp, \as, 1
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slli \tmp, \as, 1
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add \dst, \tmp, \at
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add \dst, \tmp, \at
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#endif
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#endif
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.endm
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.endm
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.macro do_addx4 dst, as, at, tmp
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.macro do_addx4 dst, as, at, tmp
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#if XCHAL_HAVE_ADDX
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#if XCHAL_HAVE_ADDX
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addx4 \dst, \as, \at
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addx4 \dst, \as, \at
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#else
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#else
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slli \tmp, \as, 2
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slli \tmp, \as, 2
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add \dst, \tmp, \at
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add \dst, \tmp, \at
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#endif
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#endif
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.endm
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.endm
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.macro do_addx8 dst, as, at, tmp
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.macro do_addx8 dst, as, at, tmp
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#if XCHAL_HAVE_ADDX
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#if XCHAL_HAVE_ADDX
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addx8 \dst, \as, \at
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addx8 \dst, \as, \at
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#else
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#else
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slli \tmp, \as, 3
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slli \tmp, \as, 3
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add \dst, \tmp, \at
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add \dst, \tmp, \at
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#endif
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#endif
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.endm
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.endm
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# Define macros for leaf function entry and return, supporting either the
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# Define macros for leaf function entry and return, supporting either the
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# standard register windowed ABI or the non-windowed call0 ABI. These
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# standard register windowed ABI or the non-windowed call0 ABI. These
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# macros do not allocate any extra stack space, so they only work for
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# macros do not allocate any extra stack space, so they only work for
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# leaf functions that do not need to spill anything to the stack.
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# leaf functions that do not need to spill anything to the stack.
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.macro leaf_entry reg, size
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.macro leaf_entry reg, size
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#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
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#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
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entry \reg, \size
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entry \reg, \size
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#else
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#else
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/* do nothing */
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/* do nothing */
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#endif
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#endif
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.endm
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.endm
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.macro leaf_return
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.macro leaf_return
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#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
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#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
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retw
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retw
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#else
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#else
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ret
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ret
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#endif
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#endif
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.endm
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.endm
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#ifdef L_mulsi3
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#ifdef L_mulsi3
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.align 4
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.align 4
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.global __mulsi3
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.global __mulsi3
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.type __mulsi3,@function
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.type __mulsi3,@function
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__mulsi3:
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__mulsi3:
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leaf_entry sp, 16
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leaf_entry sp, 16
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#if XCHAL_HAVE_MUL16
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#if XCHAL_HAVE_MUL16
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or a4, a2, a3
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or a4, a2, a3
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srai a4, a4, 16
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srai a4, a4, 16
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bnez a4, .LMUL16
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bnez a4, .LMUL16
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mul16u a2, a2, a3
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mul16u a2, a2, a3
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leaf_return
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leaf_return
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.LMUL16:
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.LMUL16:
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srai a4, a2, 16
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srai a4, a2, 16
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srai a5, a3, 16
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srai a5, a3, 16
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mul16u a7, a4, a3
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mul16u a7, a4, a3
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mul16u a6, a5, a2
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mul16u a6, a5, a2
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mul16u a4, a2, a3
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mul16u a4, a2, a3
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add a7, a7, a6
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add a7, a7, a6
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slli a7, a7, 16
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slli a7, a7, 16
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add a2, a7, a4
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add a2, a7, a4
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#elif XCHAL_HAVE_MAC16
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#elif XCHAL_HAVE_MAC16
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mul.aa.hl a2, a3
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mul.aa.hl a2, a3
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mula.aa.lh a2, a3
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mula.aa.lh a2, a3
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rsr a5, ACCLO
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rsr a5, ACCLO
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umul.aa.ll a2, a3
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umul.aa.ll a2, a3
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rsr a4, ACCLO
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rsr a4, ACCLO
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slli a5, a5, 16
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slli a5, a5, 16
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add a2, a4, a5
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add a2, a4, a5
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#else /* !XCHAL_HAVE_MUL16 && !XCHAL_HAVE_MAC16 */
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#else /* !XCHAL_HAVE_MUL16 && !XCHAL_HAVE_MAC16 */
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# Multiply one bit at a time, but unroll the loop 4x to better
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# Multiply one bit at a time, but unroll the loop 4x to better
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# exploit the addx instructions and avoid overhead.
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# exploit the addx instructions and avoid overhead.
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# Peel the first iteration to save a cycle on init.
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# Peel the first iteration to save a cycle on init.
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# Avoid negative numbers.
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# Avoid negative numbers.
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xor a5, a2, a3 # top bit is 1 iff one of the inputs is negative
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xor a5, a2, a3 # top bit is 1 iff one of the inputs is negative
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do_abs a3, a3, a6
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do_abs a3, a3, a6
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do_abs a2, a2, a6
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do_abs a2, a2, a6
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# Swap so the second argument is smaller.
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# Swap so the second argument is smaller.
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sub a7, a2, a3
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sub a7, a2, a3
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mov a4, a3
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mov a4, a3
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movgez a4, a2, a7 # a4 = max(a2, a3)
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movgez a4, a2, a7 # a4 = max(a2, a3)
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movltz a3, a2, a7 # a3 = min(a2, a3)
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movltz a3, a2, a7 # a3 = min(a2, a3)
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movi a2, 0
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movi a2, 0
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extui a6, a3, 0, 1
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extui a6, a3, 0, 1
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movnez a2, a4, a6
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movnez a2, a4, a6
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do_addx2 a7, a4, a2, a7
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do_addx2 a7, a4, a2, a7
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extui a6, a3, 1, 1
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extui a6, a3, 1, 1
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movnez a2, a7, a6
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movnez a2, a7, a6
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do_addx4 a7, a4, a2, a7
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do_addx4 a7, a4, a2, a7
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extui a6, a3, 2, 1
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extui a6, a3, 2, 1
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movnez a2, a7, a6
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movnez a2, a7, a6
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do_addx8 a7, a4, a2, a7
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do_addx8 a7, a4, a2, a7
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extui a6, a3, 3, 1
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extui a6, a3, 3, 1
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movnez a2, a7, a6
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movnez a2, a7, a6
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bgeui a3, 16, .Lmult_main_loop
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bgeui a3, 16, .Lmult_main_loop
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neg a3, a2
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neg a3, a2
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movltz a2, a3, a5
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movltz a2, a3, a5
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leaf_return
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leaf_return
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.align 4
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.align 4
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.Lmult_main_loop:
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.Lmult_main_loop:
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srli a3, a3, 4
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srli a3, a3, 4
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slli a4, a4, 4
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slli a4, a4, 4
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add a7, a4, a2
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add a7, a4, a2
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extui a6, a3, 0, 1
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extui a6, a3, 0, 1
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movnez a2, a7, a6
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movnez a2, a7, a6
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do_addx2 a7, a4, a2, a7
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do_addx2 a7, a4, a2, a7
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extui a6, a3, 1, 1
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extui a6, a3, 1, 1
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movnez a2, a7, a6
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movnez a2, a7, a6
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do_addx4 a7, a4, a2, a7
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do_addx4 a7, a4, a2, a7
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extui a6, a3, 2, 1
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extui a6, a3, 2, 1
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movnez a2, a7, a6
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movnez a2, a7, a6
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do_addx8 a7, a4, a2, a7
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do_addx8 a7, a4, a2, a7
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extui a6, a3, 3, 1
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extui a6, a3, 3, 1
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movnez a2, a7, a6
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movnez a2, a7, a6
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bgeui a3, 16, .Lmult_main_loop
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bgeui a3, 16, .Lmult_main_loop
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neg a3, a2
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neg a3, a2
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movltz a2, a3, a5
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movltz a2, a3, a5
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#endif /* !XCHAL_HAVE_MUL16 && !XCHAL_HAVE_MAC16 */
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#endif /* !XCHAL_HAVE_MUL16 && !XCHAL_HAVE_MAC16 */
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leaf_return
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leaf_return
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.size __mulsi3,.-__mulsi3
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.size __mulsi3,.-__mulsi3
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#endif /* L_mulsi3 */
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#endif /* L_mulsi3 */
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# Define a macro for the NSAU (unsigned normalize shift amount)
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# Define a macro for the NSAU (unsigned normalize shift amount)
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# instruction, which computes the number of leading zero bits,
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# instruction, which computes the number of leading zero bits,
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# to handle cases where it is not included in the Xtensa processor
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# to handle cases where it is not included in the Xtensa processor
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# configuration.
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# configuration.
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.macro do_nsau cnt, val, tmp, a
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.macro do_nsau cnt, val, tmp, a
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#if XCHAL_HAVE_NSA
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#if XCHAL_HAVE_NSA
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nsau \cnt, \val
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nsau \cnt, \val
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#else
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#else
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mov \a, \val
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mov \a, \val
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movi \cnt, 0
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movi \cnt, 0
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extui \tmp, \a, 16, 16
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extui \tmp, \a, 16, 16
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bnez \tmp, 0f
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bnez \tmp, 0f
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movi \cnt, 16
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movi \cnt, 16
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slli \a, \a, 16
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slli \a, \a, 16
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0:
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0:
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extui \tmp, \a, 24, 8
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extui \tmp, \a, 24, 8
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bnez \tmp, 1f
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bnez \tmp, 1f
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addi \cnt, \cnt, 8
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addi \cnt, \cnt, 8
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slli \a, \a, 8
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slli \a, \a, 8
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1:
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1:
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movi \tmp, __nsau_data
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movi \tmp, __nsau_data
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extui \a, \a, 24, 8
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extui \a, \a, 24, 8
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add \tmp, \tmp, \a
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add \tmp, \tmp, \a
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l8ui \tmp, \tmp, 0
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l8ui \tmp, \tmp, 0
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add \cnt, \cnt, \tmp
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add \cnt, \cnt, \tmp
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#endif /* !XCHAL_HAVE_NSA */
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#endif /* !XCHAL_HAVE_NSA */
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.endm
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.endm
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#ifdef L_nsau
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#ifdef L_nsau
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.section .rodata
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.section .rodata
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.align 4
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.align 4
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.global __nsau_data
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.global __nsau_data
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.type __nsau_data,@object
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.type __nsau_data,@object
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__nsau_data:
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__nsau_data:
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#if !XCHAL_HAVE_NSA
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#if !XCHAL_HAVE_NSA
|
.byte 8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4
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.byte 8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4
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.byte 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3
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.byte 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3
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.byte 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
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.byte 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
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.byte 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
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.byte 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
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.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
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.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
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.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
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.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
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.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
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.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
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.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
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.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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#endif /* !XCHAL_HAVE_NSA */
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#endif /* !XCHAL_HAVE_NSA */
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.size __nsau_data,.-__nsau_data
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.size __nsau_data,.-__nsau_data
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.hidden __nsau_data
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.hidden __nsau_data
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#endif /* L_nsau */
|
#endif /* L_nsau */
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|
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|
|
#ifdef L_udivsi3
|
#ifdef L_udivsi3
|
.align 4
|
.align 4
|
.global __udivsi3
|
.global __udivsi3
|
.type __udivsi3,@function
|
.type __udivsi3,@function
|
__udivsi3:
|
__udivsi3:
|
leaf_entry sp, 16
|
leaf_entry sp, 16
|
bltui a3, 2, .Lle_one # check if the divisor <= 1
|
bltui a3, 2, .Lle_one # check if the divisor <= 1
|
|
|
mov a6, a2 # keep dividend in a6
|
mov a6, a2 # keep dividend in a6
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do_nsau a5, a6, a2, a7 # dividend_shift = nsau(dividend)
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do_nsau a5, a6, a2, a7 # dividend_shift = nsau(dividend)
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do_nsau a4, a3, a2, a7 # divisor_shift = nsau(divisor)
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do_nsau a4, a3, a2, a7 # divisor_shift = nsau(divisor)
|
bgeu a5, a4, .Lspecial
|
bgeu a5, a4, .Lspecial
|
|
|
sub a4, a4, a5 # count = divisor_shift - dividend_shift
|
sub a4, a4, a5 # count = divisor_shift - dividend_shift
|
ssl a4
|
ssl a4
|
sll a3, a3 # divisor <<= count
|
sll a3, a3 # divisor <<= count
|
movi a2, 0 # quotient = 0
|
movi a2, 0 # quotient = 0
|
|
|
# test-subtract-and-shift loop; one quotient bit on each iteration
|
# test-subtract-and-shift loop; one quotient bit on each iteration
|
#if XCHAL_HAVE_LOOPS
|
#if XCHAL_HAVE_LOOPS
|
loopnez a4, .Lloopend
|
loopnez a4, .Lloopend
|
#endif /* XCHAL_HAVE_LOOPS */
|
#endif /* XCHAL_HAVE_LOOPS */
|
.Lloop:
|
.Lloop:
|
bltu a6, a3, .Lzerobit
|
bltu a6, a3, .Lzerobit
|
sub a6, a6, a3
|
sub a6, a6, a3
|
addi a2, a2, 1
|
addi a2, a2, 1
|
.Lzerobit:
|
.Lzerobit:
|
slli a2, a2, 1
|
slli a2, a2, 1
|
srli a3, a3, 1
|
srli a3, a3, 1
|
#if !XCHAL_HAVE_LOOPS
|
#if !XCHAL_HAVE_LOOPS
|
addi a4, a4, -1
|
addi a4, a4, -1
|
bnez a4, .Lloop
|
bnez a4, .Lloop
|
#endif /* !XCHAL_HAVE_LOOPS */
|
#endif /* !XCHAL_HAVE_LOOPS */
|
.Lloopend:
|
.Lloopend:
|
|
|
bltu a6, a3, .Lreturn
|
bltu a6, a3, .Lreturn
|
addi a2, a2, 1 # increment quotient if dividend >= divisor
|
addi a2, a2, 1 # increment quotient if dividend >= divisor
|
.Lreturn:
|
.Lreturn:
|
leaf_return
|
leaf_return
|
|
|
.Lle_one:
|
.Lle_one:
|
beqz a3, .Lerror # if divisor == 1, return the dividend
|
beqz a3, .Lerror # if divisor == 1, return the dividend
|
leaf_return
|
leaf_return
|
|
|
.Lspecial:
|
.Lspecial:
|
# return dividend >= divisor
|
# return dividend >= divisor
|
bltu a6, a3, .Lreturn0
|
bltu a6, a3, .Lreturn0
|
movi a2, 1
|
movi a2, 1
|
leaf_return
|
leaf_return
|
|
|
.Lerror:
|
.Lerror:
|
# just return 0; could throw an exception
|
# just return 0; could throw an exception
|
|
|
.Lreturn0:
|
.Lreturn0:
|
movi a2, 0
|
movi a2, 0
|
leaf_return
|
leaf_return
|
.size __udivsi3,.-__udivsi3
|
.size __udivsi3,.-__udivsi3
|
|
|
#endif /* L_udivsi3 */
|
#endif /* L_udivsi3 */
|
|
|
|
|
#ifdef L_divsi3
|
#ifdef L_divsi3
|
.align 4
|
.align 4
|
.global __divsi3
|
.global __divsi3
|
.type __divsi3,@function
|
.type __divsi3,@function
|
__divsi3:
|
__divsi3:
|
leaf_entry sp, 16
|
leaf_entry sp, 16
|
xor a7, a2, a3 # sign = dividend ^ divisor
|
xor a7, a2, a3 # sign = dividend ^ divisor
|
do_abs a6, a2, a4 # udividend = abs(dividend)
|
do_abs a6, a2, a4 # udividend = abs(dividend)
|
do_abs a3, a3, a4 # udivisor = abs(divisor)
|
do_abs a3, a3, a4 # udivisor = abs(divisor)
|
bltui a3, 2, .Lle_one # check if udivisor <= 1
|
bltui a3, 2, .Lle_one # check if udivisor <= 1
|
do_nsau a5, a6, a2, a8 # udividend_shift = nsau(udividend)
|
do_nsau a5, a6, a2, a8 # udividend_shift = nsau(udividend)
|
do_nsau a4, a3, a2, a8 # udivisor_shift = nsau(udivisor)
|
do_nsau a4, a3, a2, a8 # udivisor_shift = nsau(udivisor)
|
bgeu a5, a4, .Lspecial
|
bgeu a5, a4, .Lspecial
|
|
|
sub a4, a4, a5 # count = udivisor_shift - udividend_shift
|
sub a4, a4, a5 # count = udivisor_shift - udividend_shift
|
ssl a4
|
ssl a4
|
sll a3, a3 # udivisor <<= count
|
sll a3, a3 # udivisor <<= count
|
movi a2, 0 # quotient = 0
|
movi a2, 0 # quotient = 0
|
|
|
# test-subtract-and-shift loop; one quotient bit on each iteration
|
# test-subtract-and-shift loop; one quotient bit on each iteration
|
#if XCHAL_HAVE_LOOPS
|
#if XCHAL_HAVE_LOOPS
|
loopnez a4, .Lloopend
|
loopnez a4, .Lloopend
|
#endif /* XCHAL_HAVE_LOOPS */
|
#endif /* XCHAL_HAVE_LOOPS */
|
.Lloop:
|
.Lloop:
|
bltu a6, a3, .Lzerobit
|
bltu a6, a3, .Lzerobit
|
sub a6, a6, a3
|
sub a6, a6, a3
|
addi a2, a2, 1
|
addi a2, a2, 1
|
.Lzerobit:
|
.Lzerobit:
|
slli a2, a2, 1
|
slli a2, a2, 1
|
srli a3, a3, 1
|
srli a3, a3, 1
|
#if !XCHAL_HAVE_LOOPS
|
#if !XCHAL_HAVE_LOOPS
|
addi a4, a4, -1
|
addi a4, a4, -1
|
bnez a4, .Lloop
|
bnez a4, .Lloop
|
#endif /* !XCHAL_HAVE_LOOPS */
|
#endif /* !XCHAL_HAVE_LOOPS */
|
.Lloopend:
|
.Lloopend:
|
|
|
bltu a6, a3, .Lreturn
|
bltu a6, a3, .Lreturn
|
addi a2, a2, 1 # increment quotient if udividend >= udivisor
|
addi a2, a2, 1 # increment quotient if udividend >= udivisor
|
.Lreturn:
|
.Lreturn:
|
neg a5, a2
|
neg a5, a2
|
movltz a2, a5, a7 # return (sign < 0) ? -quotient : quotient
|
movltz a2, a5, a7 # return (sign < 0) ? -quotient : quotient
|
leaf_return
|
leaf_return
|
|
|
.Lle_one:
|
.Lle_one:
|
beqz a3, .Lerror
|
beqz a3, .Lerror
|
neg a2, a6 # if udivisor == 1, then return...
|
neg a2, a6 # if udivisor == 1, then return...
|
movgez a2, a6, a7 # (sign < 0) ? -udividend : udividend
|
movgez a2, a6, a7 # (sign < 0) ? -udividend : udividend
|
leaf_return
|
leaf_return
|
|
|
.Lspecial:
|
.Lspecial:
|
bltu a6, a3, .Lreturn0 # if dividend < divisor, return 0
|
bltu a6, a3, .Lreturn0 # if dividend < divisor, return 0
|
movi a2, 1
|
movi a2, 1
|
movi a4, -1
|
movi a4, -1
|
movltz a2, a4, a7 # else return (sign < 0) ? -1 : 1
|
movltz a2, a4, a7 # else return (sign < 0) ? -1 : 1
|
leaf_return
|
leaf_return
|
|
|
.Lerror:
|
.Lerror:
|
# just return 0; could throw an exception
|
# just return 0; could throw an exception
|
|
|
.Lreturn0:
|
.Lreturn0:
|
movi a2, 0
|
movi a2, 0
|
leaf_return
|
leaf_return
|
.size __divsi3,.-__divsi3
|
.size __divsi3,.-__divsi3
|
|
|
#endif /* L_divsi3 */
|
#endif /* L_divsi3 */
|
|
|
|
|
#ifdef L_umodsi3
|
#ifdef L_umodsi3
|
.align 4
|
.align 4
|
.global __umodsi3
|
.global __umodsi3
|
.type __umodsi3,@function
|
.type __umodsi3,@function
|
__umodsi3:
|
__umodsi3:
|
leaf_entry sp, 16
|
leaf_entry sp, 16
|
bltui a3, 2, .Lle_one # check if the divisor is <= 1
|
bltui a3, 2, .Lle_one # check if the divisor is <= 1
|
|
|
do_nsau a5, a2, a6, a7 # dividend_shift = nsau(dividend)
|
do_nsau a5, a2, a6, a7 # dividend_shift = nsau(dividend)
|
do_nsau a4, a3, a6, a7 # divisor_shift = nsau(divisor)
|
do_nsau a4, a3, a6, a7 # divisor_shift = nsau(divisor)
|
bgeu a5, a4, .Lspecial
|
bgeu a5, a4, .Lspecial
|
|
|
sub a4, a4, a5 # count = divisor_shift - dividend_shift
|
sub a4, a4, a5 # count = divisor_shift - dividend_shift
|
ssl a4
|
ssl a4
|
sll a3, a3 # divisor <<= count
|
sll a3, a3 # divisor <<= count
|
|
|
# test-subtract-and-shift loop
|
# test-subtract-and-shift loop
|
#if XCHAL_HAVE_LOOPS
|
#if XCHAL_HAVE_LOOPS
|
loopnez a4, .Lloopend
|
loopnez a4, .Lloopend
|
#endif /* XCHAL_HAVE_LOOPS */
|
#endif /* XCHAL_HAVE_LOOPS */
|
.Lloop:
|
.Lloop:
|
bltu a2, a3, .Lzerobit
|
bltu a2, a3, .Lzerobit
|
sub a2, a2, a3
|
sub a2, a2, a3
|
.Lzerobit:
|
.Lzerobit:
|
srli a3, a3, 1
|
srli a3, a3, 1
|
#if !XCHAL_HAVE_LOOPS
|
#if !XCHAL_HAVE_LOOPS
|
addi a4, a4, -1
|
addi a4, a4, -1
|
bnez a4, .Lloop
|
bnez a4, .Lloop
|
#endif /* !XCHAL_HAVE_LOOPS */
|
#endif /* !XCHAL_HAVE_LOOPS */
|
.Lloopend:
|
.Lloopend:
|
|
|
.Lspecial:
|
.Lspecial:
|
bltu a2, a3, .Lreturn
|
bltu a2, a3, .Lreturn
|
sub a2, a2, a3 # subtract once more if dividend >= divisor
|
sub a2, a2, a3 # subtract once more if dividend >= divisor
|
.Lreturn:
|
.Lreturn:
|
leaf_return
|
leaf_return
|
|
|
.Lle_one:
|
.Lle_one:
|
# the divisor is either 0 or 1, so just return 0.
|
# the divisor is either 0 or 1, so just return 0.
|
# someday we may want to throw an exception if the divisor is 0.
|
# someday we may want to throw an exception if the divisor is 0.
|
movi a2, 0
|
movi a2, 0
|
leaf_return
|
leaf_return
|
.size __umodsi3,.-__umodsi3
|
.size __umodsi3,.-__umodsi3
|
|
|
#endif /* L_umodsi3 */
|
#endif /* L_umodsi3 */
|
|
|
|
|
#ifdef L_modsi3
|
#ifdef L_modsi3
|
.align 4
|
.align 4
|
.global __modsi3
|
.global __modsi3
|
.type __modsi3,@function
|
.type __modsi3,@function
|
__modsi3:
|
__modsi3:
|
leaf_entry sp, 16
|
leaf_entry sp, 16
|
mov a7, a2 # save original (signed) dividend
|
mov a7, a2 # save original (signed) dividend
|
do_abs a2, a2, a4 # udividend = abs(dividend)
|
do_abs a2, a2, a4 # udividend = abs(dividend)
|
do_abs a3, a3, a4 # udivisor = abs(divisor)
|
do_abs a3, a3, a4 # udivisor = abs(divisor)
|
bltui a3, 2, .Lle_one # check if udivisor <= 1
|
bltui a3, 2, .Lle_one # check if udivisor <= 1
|
do_nsau a5, a2, a6, a8 # udividend_shift = nsau(udividend)
|
do_nsau a5, a2, a6, a8 # udividend_shift = nsau(udividend)
|
do_nsau a4, a3, a6, a8 # udivisor_shift = nsau(udivisor)
|
do_nsau a4, a3, a6, a8 # udivisor_shift = nsau(udivisor)
|
bgeu a5, a4, .Lspecial
|
bgeu a5, a4, .Lspecial
|
|
|
sub a4, a4, a5 # count = udivisor_shift - udividend_shift
|
sub a4, a4, a5 # count = udivisor_shift - udividend_shift
|
ssl a4
|
ssl a4
|
sll a3, a3 # udivisor <<= count
|
sll a3, a3 # udivisor <<= count
|
|
|
# test-subtract-and-shift loop
|
# test-subtract-and-shift loop
|
#if XCHAL_HAVE_LOOPS
|
#if XCHAL_HAVE_LOOPS
|
loopnez a4, .Lloopend
|
loopnez a4, .Lloopend
|
#endif /* XCHAL_HAVE_LOOPS */
|
#endif /* XCHAL_HAVE_LOOPS */
|
.Lloop:
|
.Lloop:
|
bltu a2, a3, .Lzerobit
|
bltu a2, a3, .Lzerobit
|
sub a2, a2, a3
|
sub a2, a2, a3
|
.Lzerobit:
|
.Lzerobit:
|
srli a3, a3, 1
|
srli a3, a3, 1
|
#if !XCHAL_HAVE_LOOPS
|
#if !XCHAL_HAVE_LOOPS
|
addi a4, a4, -1
|
addi a4, a4, -1
|
bnez a4, .Lloop
|
bnez a4, .Lloop
|
#endif /* !XCHAL_HAVE_LOOPS */
|
#endif /* !XCHAL_HAVE_LOOPS */
|
.Lloopend:
|
.Lloopend:
|
|
|
.Lspecial:
|
.Lspecial:
|
bltu a2, a3, .Lreturn
|
bltu a2, a3, .Lreturn
|
sub a2, a2, a3 # subtract once more if udividend >= udivisor
|
sub a2, a2, a3 # subtract once more if udividend >= udivisor
|
.Lreturn:
|
.Lreturn:
|
bgez a7, .Lpositive
|
bgez a7, .Lpositive
|
neg a2, a2 # if (dividend < 0), return -udividend
|
neg a2, a2 # if (dividend < 0), return -udividend
|
.Lpositive:
|
.Lpositive:
|
leaf_return
|
leaf_return
|
|
|
.Lle_one:
|
.Lle_one:
|
# udivisor is either 0 or 1, so just return 0.
|
# udivisor is either 0 or 1, so just return 0.
|
# someday we may want to throw an exception if udivisor is 0.
|
# someday we may want to throw an exception if udivisor is 0.
|
movi a2, 0
|
movi a2, 0
|
leaf_return
|
leaf_return
|
.size __modsi3,.-__modsi3
|
.size __modsi3,.-__modsi3
|
|
|
#endif /* L_modsi3 */
|
#endif /* L_modsi3 */
|
|
|
#include "ieee754-df.S"
|
#include "ieee754-df.S"
|
#include "ieee754-sf.S"
|
#include "ieee754-sf.S"
|
|
|
