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[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.2.2/] [gcc/] [testsuite/] [gcc.c-torture/] [compile/] [20040109-1.c] - Diff between revs 149 and 154

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Rev 149 Rev 154
/* PR target/13380.
/* PR target/13380.
   On m32r, the condition code register, (reg:SI 17), was replaced with
   On m32r, the condition code register, (reg:SI 17), was replaced with
   a pseudo reg, which would cause an unrecognized insn.  */
   a pseudo reg, which would cause an unrecognized insn.  */
 
 
void
void
foo (unsigned int a, unsigned int b)
foo (unsigned int a, unsigned int b)
{
{
  if (a > b)
  if (a > b)
    {
    {
      while (a)
      while (a)
        {
        {
          switch (b)
          switch (b)
            {
            {
            default:
            default:
              a = 0;
              a = 0;
            case 2:
            case 2:
              a = 0;
              a = 0;
            case 1:
            case 1:
              a = 0;
              a = 0;
            case 0:
            case 0:
              ;
              ;
            }
            }
        }
        }
    }
    }
}
}
 
 

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