URL
https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
Only display areas with differences |
Details |
Blame |
View Log
Rev 149 |
Rev 154 |
/* Origin: PR target/11535 from H. J. Lu <hjl@lucon.org> */
|
/* Origin: PR target/11535 from H. J. Lu <hjl@lucon.org> */
|
|
|
void vararg (int i, ...)
|
void vararg (int i, ...)
|
{
|
{
|
(void) i;
|
(void) i;
|
}
|
}
|
|
|
int i0[0], i1;
|
int i0[0], i1;
|
|
|
void test1 (void)
|
void test1 (void)
|
{
|
{
|
int a = (int) (long long) __builtin_return_address (0);
|
int a = (int) (long long) __builtin_return_address (0);
|
vararg (0, a);
|
vararg (0, a);
|
}
|
}
|
|
|
void test2 (void)
|
void test2 (void)
|
{
|
{
|
i0[0] = (int) (long long) __builtin_return_address (0);
|
i0[0] = (int) (long long) __builtin_return_address (0);
|
}
|
}
|
|
|
void test3 (void)
|
void test3 (void)
|
{
|
{
|
i1 = (int) (long long) __builtin_return_address (0);
|
i1 = (int) (long long) __builtin_return_address (0);
|
}
|
}
|
|
|
void test4 (void)
|
void test4 (void)
|
{
|
{
|
volatile long long a = (long long) __builtin_return_address (0);
|
volatile long long a = (long long) __builtin_return_address (0);
|
i0[0] = (int) a;
|
i0[0] = (int) a;
|
}
|
}
|
|
|
int main (void)
|
int main (void)
|
{
|
{
|
return 0;
|
return 0;
|
}
|
}
|
|
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.